Abstract: In some aspects, the invention relates to an antibody-drug conjugate, comprising an anti-epidermal growth factor receptor (“EGFR”) antibody; a linker; and an active agent. The antibody-drug conjugate may comprise a self-immolative group. The linker may comprise an O-substituted oxime, e.g., wherein the oxygen atom of the oxime is substituted with a group that covalently links the oxime to the drug; and the carbon atom of the oxime is substituted with a group that covalently links the oxime to the antibody.

Abstract: A semiconductor memory device includes a memory cell array, an error correction circuit, an error log register and a control logic circuit. The memory cell array includes a plurality of memory bank arrays and each of the memory bank arrays includes a plurality of pages. The control logic circuit is configured to control the error correction circuit to perform an ECC decoding sequentially on some of the pages designated at least one access address for detecting at least one bit error, in response to a first command received from a memory controller. The control logic circuit performs an error logging operation to write page error information into the error log register and the page error information includes a number of error occurrence on each of the some pages determined from the detecting.

Abstract: Provided are a memory device and a memory system performing request-based refresh, and an operating method of the memory device. The operating method includes: determining a weak row by counting an activated number of at least one row; requesting for refresh on the weak row based on a result of the determining; and performing target refresh on the weak row upon receiving a refresh command according to the requesting.

Abstract: Provided are methods of use of compounds comprising a self-immolative group, which compounds may include a protein (for example, an oligopeptide, a polypeptide, an antibody, or the like) having substrate-specificity for a target and an active agent (for example, a drug, a toxin, a ligand, a detection probe, or the like) having a specific function or activity.

Abstract: The present invention relates to a novel crystalline form of 5-chloro-N-({(5S)-2-oxo-3-[4-(5,6-dihydro-4H-[1,2,4]triazin-1-yl)phenyl]-1,3-oxazolidin-5-yl}methyl)thiophene-2-carboxamide methanesulfonate and a pharmaceutical composition containing the same. The novel crystalline form of a compound according to the present invention exhibits excellent stability even in high-temperature and humidity environments, and thus can be favorably used to prevent or treat diseases, such as thrombosis, myocardial infarction, atherosclerosis, inflammation, stroke, angina pectoris, restenosis after angioplasty, and thromboembolism.

Abstract: A refresh controller of a memory device may include a timing controller, a refresh counter and an address generator. The timing controller generates a counter refresh signal in response to receiving a refresh command provided from an external device, and generates a hammer refresh signal that is activated periodically. The refresh counter generates a counter refresh address signal in response to the counter refresh signal, such that the counter refresh address signal represents a row address, the refresh counter being configured sequentially change the counter refresh address signal. The address generator generates a hammer refresh address signal in response to the hammer refresh signal, the hammer refresh address signal representing an address of a row of the memory device that is physically adjacent to a row of the memory device corresponding to a hammer address that is accessed intensively.

Abstract: A memory module includes a memory device, a command/address buffering device, and a processing data buffer. The memory device includes a memory cell array, a first set of input/output terminals, each terminal configured to receive first command/address bits, and a second set of input/output terminals, each terminal configured to receive both data bits and second command/address bits. The command/address buffering device is configured to output the first command/address bits to the first set of input/output terminals. The processing data buffer is configured to output the data bits and second command/address bits to the second set of input/output terminals. The memory device is configured such that the first command/address bits, second command/address bits, and data bits are all used to access the memory cell array.

Abstract: A memory device including a stack semiconductor device including; an upper substrate vertically stacked on a lower substrate, the upper substrate including N upper through-silicon vias (UTSV) and upper driving circuits, and the lower substrate including N lower through-silicon vias (LTSV) and lower driving circuits, wherein each one of the upper driving circuits is stagger-connected between a Kth UTSV and a (K+1)th LTSV, where ‘N’ is a natural number greater than 1, and ‘K’ is a natural number ranging from 1 to (N?1).

Abstract: Provided are a memory device and a memory system performing request-based refresh, and an operating method of the memory device. The operating method includes: determining a weak row by counting an activated number of at least one row; requesting for refresh on the weak row based on a result of the determining; and performing target refresh on the weak row upon receiving a refresh command according to the requesting.

Abstract: Provided are compounds comprising a self-immolative group, and the compounds comprising a self-immolative group according to the present invention may include a protein (for example, an oligopeptide, a polypeptide, an antibody, or the like) having substrate-specificity for a target and an active agent (for example, a drug, a toxin, a ligand, a detection probe, or the like) having a specific function or activity.

Abstract: Provided are a method and an apparatus for repairing a memory cell in a memory test system. A test device detects a fail address by testing a memory device according to a test command, and temporarily stores the fail address in a fail address memory (FAM). The fail address is transmitted to the memory device according to a fail address transmission mode, is temporarily stored in a temporary fail address storage of the memory device, and is then stored in an anti-fuse array, which is a non-volatile storage device. To secure the reliability of data, stored data can be read to verify the data and a verification result can be transmitted in series or in parallel to the test device.

Abstract: Communication method and apparatus based on QoS in network slice-based mobile communication network. The method includes determining whether first sum of bitrate of SDF requested from PDU and a using NSB of network slice corresponding to requested SDF exceeds reference NSB allocated to network slice, determining whether second sum of bitrate of requested SDF and a first using SB of APN corresponding to requested SDF exceeds first reference SB allocated to APN, unless the first sum exceeds the reference NSB, determining whether third sum of bitrate of requested SDF and a second using SB of PDU flow corresponding to requested SDF exceeds second reference SB allocated to PDU flow, unless the second sum exceeds the first reference SB, and processing the requested SDF to guarantee that quality of requested SDF is greater than or equal to a predetermined level, unless the third sum exceeds the second reference SB.

Abstract: A memory device including: an error correction code (ECC) cell array; an ECC engine configured to receive write data to be written to a memory cell array and generate internal parity bits for the write data; and an ECC select unit configured to receive the internal parity bits and external parity bits and, in response to a first level of a control signal, store the internal parity bits in the ECC cell array and, in response to a second level of the control signal store the external parity bits in the ECC cell array.

Abstract: Provided are a method and an apparatus for repairing a memory cell in a memory test system. A test device detects a fail address by testing a memory device according to a test command, and temporarily stores the fail address in a fail address memory (FAM). The fail address is transmitted to the memory device according to a fail address transmission mode, is temporarily stored in a temporary fail address storage of the memory device, and is then stored in an anti-fuse array, which is a non-volatile storage device. To secure the reliability of data, stored data can be read to verify the data and a verification result can be transmitted in series or in parallel to the test device.

Abstract: A lead frame includes a bonding part to bond to a semiconductor chip, a first trench in the bonding part along a first central axis, the first central axis dividing the bonding part into two parts, and second trenches in the bonding part along a second central axis, the second central axis dividing the bonding part into two parts, and the first and second central axes vertically intersecting each other.

Abstract: A semiconductor memory device includes a memory cell array and a first buffer. The memory cell array includes a plurality of bank arrays. Each of the plurality of bank arrays includes a plurality of memory cells. The memory cell array and the first buffer are configured for performing a first internal read operation, which represents operations of retrieving first data from a first region of the memory cell array and of storing the first data into the first buffer, based on a first read command and a first read address. The first internal read operation is performed based on a deterministic interface in which the first data is stored into the first buffer within a predetermined first duration after the first read command is received and a generation of a first acknowledgement signal is unnecessary after storing the first data into the first buffer is completed.

Abstract: A communication method and apparatus using a network slice. A method of performing communication on a control plane of a network system including an access network and a core network may receive an attach request from a user equipment, may perform a mutual authentication with the user equipment in response to the attach request, may retrieve a subscription profile for the user equipment in response to the attach request, when the mutual authentication is completed, and may determine a network slice for the user equipment based on the subscription profile.

Abstract: The present invention provides a terminal connection control apparatus, including: a cell position determining unit which provides information on a cell in which a terminal is located; a requested data speed determining unit which figures out a data speed requested by the terminal; and a connection cell control unit which controls a connection cell of the terminal based on cell position information and the requested data speed.

Abstract: Provided are a light source package and a display device including the light source package. The light source package includes a substrate; a light-emitting device mounted on the substrate; a red phosphor layer formed adjacent to a surface of the light-emitting device; and an encapsulation layer for encapsulating the light-emitting device and the red phosphor layer, wherein a phosphor of the red phosphor layer is a fluoride-based red phosphor or a sulfide-based red phosphor. The light source package and the display device including the light source package display excellent color reproduction, without discoloration due to moisture after a long period of time.

Abstract: A lead frame includes a bonding part to bond to a semiconductor chip, a first trench in the bonding part along a first central axis, the first central axis dividing the bonding part into two parts, and second trenches in the bonding part along a second central axis, the second central axis dividing the bonding part into two parts, and the first and second central axes vertically intersecting each other.