Patents by Inventor Hokyun Ahn

Hokyun Ahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6933543
    Abstract: A high frequency switch device includes an epitaxy substrate that is formed by sequentially stacking an AlGaAs/GaAs superlattic buffer layer, a first Si planar doping layer, an undoped first AlGaAs spacer, an undoped InGaAs layer, an undoped second AlGaAs spacer, a second Si planar doping layer having a doping density greater than that of the first Si planar doping layer, and an undoped GaAs/AlGaAs capping layer on a GaAs semi-insulated substrate. The undoped GaAs/AlGaAs capping layer is formed with a source electrode and a drain electrode that form an ohmic contact with the undoped GaAs/AlGaAs capping layer thereon, and a gate electrode formed between the source electrode and the drain electrode, thereby forming a Schottky contact with the undoped GaAs/AlGaAs capping layer.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: August 23, 2005
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Kyoung Mun, Hong Gu Ji, Hokyun Ahn, Heacheon Kim
  • Publication number: 20050121694
    Abstract: A high frequency switch device includes an epitaxy substrate that is formed by sequentially stacking an AlGaAs/GaAs superlattic buffer layer, a first Si planar doping layer, an undoped first AlGaAs spacer, an undoped InGaAs layer, an undoped second AlGaAs spacer, a second Si planar doping layer having a doping density greater than that of the first Si planar doping layer, and an undoped GaAs/AlGaAs capping layer on a GaAs semi-insulated substrate. The undoped GaAs/AlGaAs capping layer is formed with a source electrode and a drain electrode that form an ohmic contact with the undoped GaAs/AlGaAs capping layer thereon, and a gate electrode formed between the source electrode and the drain electrode, thereby forming a Schottky contact with the undoped GaAs/AlGaAs capping layer.
    Type: Application
    Filed: June 22, 2004
    Publication date: June 9, 2005
    Inventors: Jae Mun, Hong Ji, Hokyun Ahn, Heacheon Kim
  • Publication number: 20040104443
    Abstract: A semiconductor device in which a silica aerogel layer having a very low dielectric constant is used as an insulating layer such that parasitic capacitance between a gate electrode and a source electrode in a field effect transistor having a T-shaped gate electrode, and a method of manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, source and drain electrodes, which are formed on the semiconductor substrate to make ohmic contact with the semiconductor substrate, a T-shaped gate electrode, which is formed between the source and drain electrodes on the semiconductor substrate, and an insulating layer including a silica aerogel layer, the silica aerogel layer being interposed between the gate electrode and the source and drain electrodes.
    Type: Application
    Filed: November 25, 2003
    Publication date: June 3, 2004
    Inventors: Hokyun Ahn, Jae Kyoung Mun, Haecheon Kim