Abstract: A semiconductor device includes a substrate divided into an NMOS region and a PMOS region, a first gate pattern formed on the PMOS region, and a second gate pattern formed on the NMOS region. The first gate pattern includes a first gate oxide layer pattern, a metal oxide layer pattern, a silicon nitride layer pattern and a first polysilicon layer pattern that are sequentially stacked. The second gate pattern includes a second oxide layer pattern and a second polysilicon layer pattern. Related methods are also provided.

Abstract: A method of forming a high dielectric film for a semiconductor device comprises supplying a first source gas to a reaction chamber during a first time interval, supplying a first reactant gas to the reaction chamber during a second time interval after the first time interval, supplying a second source gas to the reaction chamber for a third time interval after the second time interval, supplying a second reactant gas to the reaction chamber for a fourth time interval after the third time interval, and supplying an additive gas including nitrogen to the reaction chamber during a fifth time interval.

Abstract: Methods of forming a composite layer, a gate structure and a capacitor are disclosed. In the methods, a first dielectric layer is atomic layer deposited on a substrate by using an oxidation gas and a first precursor gas that includes hafnium precursors. A second dielectric layer is then atomic layer deposited on the first dielectric layer by using a nitriding gas and a second precursor gas that includes hafnium precursors.

Abstract: A flat luminescent lamp includes first and second substrates attached to each other at a plurality of adhesive portions, a plurality of discharge spaces in regions other than the plurality of adhesive portions between the first and second substrates, first and second electrodes arranged in the discharge spaces to be separated from each other, first and second phosphor layers formed in the discharge spaces, and first and second frames sealing the first and second substrates.

Abstract: A semiconductor device may include a gate structure having a gate insulation layer formed on a substrate, and a gate electrode formed on the gate insulation layer. A composite barrier layer may be formed on the gate structure.

Abstract: The present invention can provide methods of manufacturing a thin film including hafnium titanium oxide. The methods can include introducing a first reactant including a hafnium precursor onto a substrate; chemisorbing a first portion of the first reactant to the substrate, and physisorbing a second portion of the first reactant to the substrate and the chemisorbed first portion of the first reactant; providing a first oxidant onto the substrate; forming a first thin film including hafnium oxide on the substrate; introducing a second reactant including a titanium precursor onto the first thin film; chemisorbing a first portion of the second reactant to the first thin film, and physisorbing a second portion of the second reactant to the first thin film and the chemisorbed first portion of the second reactant; providing a second oxidant onto the first thin film; and forming a second thin film including titanium oxide on the first thin film.

Abstract: A flat luminescent lamp and a method for manufacturing the same are disclosed in the present invention. More specifically, a flat luminescent lamp includes first and second substrates each having a plurality of grooves in sides which the first and second substrates face into each other, first and second electrodes in the grooves, first and second phosphor layers in the first and second substrates including the first and second electrodes, respectively, and a frame for sealing the first and second substrates.

Abstract: A method of forming transistor gate structures in an integrated circuit device can include forming a high-k gate insulating layer on a substrate including a first region to include PMOS transistors and a second region to include NMOS transistors. A polysilicon gate layer can be formed on the high-k gate insulating layer in the first and second regions. A metal silicide gate layer can be formed directly on the high-k gate insulating layer in the first region and avoiding forming the metal-silicide in the second region. Related gate structures are also disclosed.

Abstract: Methods of forming a thin film include applying a first reactant to a substrate, chemisorbing a first portion of the first reactant and physisorbing a second portion of the first reactant on the substrate, applying a first oxidizer to the substrate, chemically reacting the first oxidizer with the first portion of the first reactant to form a first solid material on the substrate, applying a second reactant to the first solid material, chemisorbing a first portion of the second reactant and physisorbing a second portion of the second reactant on the first solid material, applying a second oxidizer to the first solid material; and chemically reacting the second oxidizer with the first portion of the second reactant to form a second solid material on the first solid material.

Abstract: A thin film structure is formed that includes hafnium silicon oxide using an atomic layer deposition process. A first reactant including tetrakis ethyl methyl amino hafnium (TEMAH) is introduced onto a substrate. A first portion of the first reactant is chemisorbed to the substrate, whereas a second portion of the first reactant is physorbed to the first portion of the first reactant. A first oxidant is provided onto the substrate. A first thin film including hafnium oxide is formed on the substrate by chemically reacting the first oxidant with the first portion of the first reactant. A second reactant including amino propyl tri ethoxy silane (APTES) is introduced onto the first thin film. A first portion of the second reactant is chemisorbed to the first thin film, whereas a second portion of the second reactant is physorbed to the first portion of the second reactant. A second oxidant is provided onto the first thin film.

Abstract: A driving apparatus is provided for a for a liquid crystal display. The driving apparatus includes a lamp housing, a plurality of lamps arranged in the lamp housing, and a lamp driver. The lamp driver drives a first set of the plurality of lamps to sequentially turn on and off and substantially simultaneously drives a second set of the lamps to be constantly turned on.

Abstract: A ferroelectric random access memory (FRAM) device, and a fabrication method therefor, includes seed layers above and below a ferroelectric layer. The seed layers formed above and below faces of the ferroelectric layer can prevent an imprint phenomenon from being generated in a ferroelectric capacitor by making the characteristics of the upper and lower interfaces of the ferroelectric layer be the same. This is accomplished by providing upper and lower seed layers that are crystallized prior to the ferroelectric layer during a thermal treatment. This results in crystallization occurring from the upper and lower faces to the center of the ferroelectric layer, making the characteristics of the upper and lower interfaces of the ferroelectric layer the same, thereby improving ferroelectric capacitor characteristics.

Abstract: A method of forming a high dielectric film using atomic layer deposition (ALD), and a method of manufacturing a capacitor having the high dielectric film, include supplying a precursor containing a metal element to a semiconductor substrate and purging a reactor; supplying an oxidizer and purging the reactor; and supplying a reaction source containing nitrogen and purging the reactor.

Abstract: An ESD protection circuit including an NMOS transistor connected between an input/output pad and a ground. The NMOS transistor has a parasitic bipolar transistor, and at least one diode is connected between the input/output pad and the NMOS transistor.

Abstract: A plasma enhanced chemical vapor deposition apparatus and a method of forming a nitride layer using the same, wherein the plasma enhanced CVD apparatus includes a process chamber including an upper chamber with a dome shape, a lower chamber, and an insulator therebetween, a gas distributing ring, a susceptor for supporting a wafer and heating the process chamber, a plasma compensation ring surrounding the susceptor, a vacuum pump and an electric power source connected to the process chamber. The gas distributing ring has a plurality of upwardly inclined nozzles, allowing upward distribution of reactive gases. The method of forming a nitride layer includes forming a protective film on inner walls of a process chamber, the protective film having at least two layers of differeing dielectric constant, and sequentially supplying reactive gases to the process chamber. A nitride layer formed thereby has low hydrogen content, good density and oxidation resistance.

Abstract: A multi-finger type electrostatic discharge protection circuit is disclosed. In an NMOS type ESD protection circuit, a pair of gates are formed in parallel with each other in one of multiple active regions so as to enable all the gate fingers in the active regions to perform npn bipolar operations uniformly. The present invention discharges an ESD pulse effectively by forming one or more additional n+ (or p+) type active regions, which are connected to Vcc (or Vss), between respective active regions.

Abstract: A plasma enhanced chemical vapor deposition apparatus and a method of forming a nitride layer using the same, wherein the plasma enhanced CVD apparatus includes a process chamber including an upper chamber with a dome shape, a lower chamber, and an insulator therebetween, a gas distributing ring, a susceptor for supporting a wafer and heating the process chamber, a plasma compensation ring surrounding the susceptor, a vacuum pump and an electric power source connected to the process chamber. The gas distributing ring has a plurality of upwardly inclined nozzles, allowing upward distribution of reactive gases. The method of forming a nitride layer includes forming a protective film on inner walls of a process chamber, the protective film having at least two layers of differeing dielectric constant, and sequentially supplying reactive gases to the process chamber. A nitride layer formed thereby has low hydrogen content, good density and oxidation resistance.

Abstract: A flat luminescent lamp and a method for manufacturing the same are disclosed in the present invention. More specifically, a flat luminescent lamp includes first and second substrates each having a plurality of grooves in sides which the first and second substrates face into each other, first and second electrodes in the grooves, first and second phosphor layers in the first and second substrates including the first and second electrodes, respectively, and a frame for sealing the first and second substrates.

Abstract: Methods and apparatus for plasma annealing layers of a microelectronic capacitor on a substrate are provided to improve the leakage current characteristics of a capacitor and/or to reduce the number of impurities in an electrode.

Abstract: A plasma enhanced chemical vapor deposition apparatus and a method of forming a nitride layer using the same, wherein the plasma enhanced CVD apparatus includes a process chamber including an upper chamber with a dome shape, a lower chamber, and an insulator therebetween, a gas distributing ring, a susceptor for supporting a wafer and heating the process chamber, a plasma compensation ring surrounding the susceptor, a vacuum pump and an electric power source connected to the process chamber. The gas distributing ring has a plurality of upwardly inclined nozzles, allowing upward distribution of reactive gases. The method of forming a nitride layer includes forming a protective film on inner walls of a process chamber, the protective film having at least two layers of differeing dielectric constant, and sequentially supplying reactive gases to the process chamber. A nitride layer formed thereby has low hydrogen content, good density and oxidation resistance.