Abstract: A display device includes a display panel that includes a plurality of pixels, a data driver configured to provide a data voltage to the plurality of pixels, a scan driver configured to provide a first scan signal and a second scan signal to the plurality of pixels, and a controller configured to control the data driver and the scan driver. The display panel is driven at a driving frequency that is variable within a driving frequency range. The scan driver provides the first scan signal to the plurality of pixels at the driving frequency, and provides the second scan signal to the plurality of pixels at a second driving frequency that is equal to or higher than the driving frequency.

Abstract: A gate driver includes M active stages configured to generate first through M-th carry signals and first through M-th gate signals based on clock signals, where M is an integer greater than or equal to 4, and K back dummy stages configured to generate (M+1)-th through (M+K)-th carry signals based on the clock signals, where K is an integer greater than or equal to 3. An N-th active stage of the M active stages discharges a control node of the N-th active stage based on an (N+3)-th carry signal, where N is an integer greater than or equal to 1, and is less than or equal to M. At least one back dummy stage of the K back dummy stages discharges a control node of the at least one back dummy stage based on a corresponding clock signal of the clock signals.

Abstract: A display device includes a data driver providing a data voltage to each of multiple pixels, a scan driver providing first and second scan signals to each of the pixels, and a controller to control the data driver and the scan driver. The scan driver performs a first active scan operation that sequentially provides the first and second scan signals to the pixels in an active period of a first frame period, and initiates a dummy scan operation that sequentially provides the second scan signal to the pixels in a blank period of the first frame period. When a second frame period starts before the dummy scan operation for the pixel in a last row, the data driver changes a level of the data voltage in an overlap period in which the dummy scan operation and a second active scan operation in the second frame period are simultaneously performed.

Abstract: A scan driving circuit including scan stage circuits that each output a first carry signal and a scan signal, and sense stage circuits that each output a second carry signal and a sense signal. Each of the scan stage circuits receives the first carry signal from at least one preceding or subsequent scan stage circuit. Each of the sense stage circuits receives the second carry signal from at least one preceding or subsequent sense stage circuit. Each of the plurality of sense stage circuits receives the first carry signal from one of the at least one preceding or subsequent scan stage circuit.

Abstract: Provided herein may be a display device including: a display panel first scan lines, second scan lines, and pixels electrically connected to the first and second scan lines; a first scan driving circuit including a plurality of first shift registers each of which is configured to output a first scan signal to a corresponding first scan line and is configured to be reset by a first reset signal; a second scan driving circuit including a plurality of second shift registers each of which is configured to output a second scan signal to a corresponding second scan line and is configured to be reset by a second reset signal; and a timing controller configured to respectively output the first reset signal and the second reset signal through different signal lines. The display device may be improved in visibility so that images can be displayed at various refresh rates.

Abstract: A display device includes: a pixel connected to each of a first scan line, a second scan line, and a data line; a scan driver supplying a first scan signal to the first scan line and a second scan signal to the second scan line; a controller dividing one frame period into an active period and a blank period and generating a count signal in which a time duration of the blank period is counted and a power control signal; a data driver supplying a data signal to the data line; and a power supply controlling a source driving voltage supplied to the data driver according to a duration of the blank period based on the power control signal. When the count signal reaches a reference value, the controller supplies a start signal for output of the first scan signal to the scan driver.

Abstract: The present invention relates to novel benzylideneacetone derivatives or uses thereof, more specifically, the present invention relates to a pharmaceutical composition for preventing or treating, or food composition for ameliorating a cancer or a bone disease comprising a compound defined by Formula 1 or pharmaceutically acceptable salt thereof as an active ingredient.

Abstract: A display device includes: a pixel connected to each of a first scan line, a second scan line, and a data line; a scan driver supplying a first scan signal to the first scan line and a second scan signal to the second scan line; a controller dividing one frame period into an active period and a blank period and generating a count signal in which a time duration of the blank period is counted and a power control signal; a data driver supplying a data signal to the data line; and a power supply controlling a source driving voltage supplied to the data driver according to a duration of the blank period based on the power control signal. When the count signal reaches a reference value, the controller supplies a start signal for output of the first scan signal to the scan driver.

Abstract: A display device includes: a pixel connected to each of a first scan line, a second scan line, and a data line; a scan driver supplying a first scan signal to the first scan line and a second scan signal to the second scan line; a controller dividing one frame period into an active period and a blank period and generating a count signal in which a time duration of the blank period is counted and a power control signal; a data driver supplying a data signal to the data line; and a power supply controlling a source driving voltage supplied to the data driver according to a duration of the blank period based on the power control signal. When the count signal reaches a reference value, the controller supplies a start signal for output of the first scan signal to the scan driver.

Abstract: A display device includes: a pixel connected to each of a first scan line, a second scan line, and a data line; a scan driver supplying a first scan signal to the first scan line and a second scan signal to the second scan line; a controller dividing one frame period into an active period and a blank period and generating a count signal in which a time duration of the blank period is counted and a power control signal; a data driver supplying a data signal to the data line; and a power supply controlling a source driving voltage supplied to the data driver according to a duration of the blank period based on the power control signal. When the count signal reaches a reference value, the controller supplies a start signal for output of the first scan signal to the scan driver.

Abstract: A display device includes a display panel that includes a plurality of pixels, a data driver configured to provide a data voltage to the plurality of pixels, a scan driver configured to provide a first scan signal and a second scan signal to the plurality of pixels, and a controller configured to control the data driver and the scan driver. The display panel is driven at a driving frequency that is variable within a driving frequency range. The scan driver provides the first scan signal to the plurality of pixels at the driving frequency, and provides the second scan signal to the plurality of pixels at a second driving frequency that is equal to or higher than the driving frequency.

Abstract: A display device includes a driving controller controlling a data driving circuit and providing a clock signal and a driving voltage in response to an image signal and a control signal received from an external source. The driving controller restores a data enable signal having a display period and a blank period in one frame on the basis of the control signal and sets a voltage level of the driving voltage applied to the gate driving circuit in accordance with a duration of the blank period. During a sequence of frames having a changing frame rate, the driving voltage for each respective frame may be set based on the duration of each respective blank period.

Abstract: In a method of operating a display device supporting a variable frame mode, frame data are received during a constant active period of a frame period including the active period and a variable blank period, the received frame data are written to a frame memory in the active period, the received frame data are outputted to a data driver in the active period to display an image based on the received frame data, a time of the variable blank period is counted, and, when the time of the variable blank period reaches a predetermined threshold blank time, the frame data stored in the frame memory are outputted to the data driver in the variable blank period to display an image based on the frame data stored in the frame memory.

Abstract: The present invention relates to novel benzylideneacetone derivatives or uses thereof, more specifically, the present invention relates to a pharmaceutical composition for preventing or treating, or food composition for ameliorating a cancer or a bone disease comprising a compound defined by Formula 1 or pharmaceutically acceptable salt thereof as an active ingredient. Since compounds according to the present invention exhibit strong inhibitory activity on proliferation and differentiation of osteoclast, and activity on proliferation and differentiation of osteoblast, it can be usefully used to develop safe and effective anti-cancer agents, and therapeutic agents for preventing and treating or foods for ameliorating bone diseases including osteoporosis, and the like.

Abstract: A display panel driving apparatus includes a data driving part, a data driving part and an off voltage controlling part. The data driving part is configured to output a data signal to a data line of a display panel. The gate driving part is configured to output a gate signal to a gate line of the display panel. The off voltage controlling part is configured to receive a first off voltage and a second off voltage applied to the gate driving part to generate the gate signal, measure a leakage current of the gate driving part, and control the first off voltage based on the leakage current. Thus, display quality of a display apparatus including the gate driving part may be improved.

Abstract: A timing controller resetting circuit including: a resistor connected to an output node from which a reset signal is output and a first voltage source which supplies a first voltage; a capacitor connected to the output node and a second voltage source which supplies a second voltage that is lower than the first voltage; a reference voltage source configured to generate a reference voltage that is lower than the first voltage and higher than the second voltage; a comparator including a first input terminal which receives the first voltage, a second input terminal which receives the reference voltage, and an output terminal which outputs a comparison result signal generated by comparing the first voltage with the reference voltage; and a transistor including a first terminal which is connected to the output node, a second terminal which receives the second voltage, and a gate terminal which receives the comparison result signal.

Abstract: A display device includes a display panel including: a plurality of pixels; and a signal controller which generates, on a frame-by-frame basis, a display signal based on an input image signal and a control signal from an outside. The signal controller includes a memory which stores a preset image signal, a receiver which receives the control signal, a clock signal modulator which generates an internal clock signal having a first frequency during a blank period, which is determined based on the control signal in a frame period, and a data processor which reads the preset image signal from the memory in response to the internal clock signal for an image processing.

Abstract: A display device includes a driving controller controlling a data driving circuit and providing a clock signal and a driving voltage in response to an image signal and a control signal received from an external source. The driving controller restores a data enable signal having a display period and a blank period in one frame on the basis of the control signal and sets a voltage level of the driving voltage applied to the gate driving circuit in accordance with a duration of the blank period. During a sequence of frames having a changing frame rate, the driving voltage for each respective frame may be set based on the duration of each respective blank period.

Abstract: A display device includes a driving controller controlling a data driving circuit and providing a clock signal and a driving voltage in response to an image signal and a control signal received from an external source. The driving controller restores a data enable signal having a display period and a blank period in one frame on the basis of the control signal and sets a voltage level of the driving voltage applied to the gate driving circuit in accordance with a duration of the blank period. During a sequence of frames having a changing frame rate, the driving voltage for each respective frame may be set based on the duration of each respective blank period.

Abstract: A display panel driving control circuit includes a configuration channel configured to determine whether a reversible connector not having designated up and down sides is connected in a first connection state or in a second connection state, and to generate a selection signal based on the determination, and a timing control circuit configured to receive image data in the first connection state and image data in the second connection state based on the selection signal, to process the received image data in the first connection state and the received image data in the second connection state, and to generate a data signal based on the processing.