Abstract: A signal transceiver apparatus suitable for a wired signal transceiver system includes a differential signal transmitter, an impendence matching control module and a signal receiver. The signal transmitter has an output terminal which is connected to a transceiver wire. The signal transmitter includes a first impendence tuner and is used to receive a control signal so as to tune impendence of the first impendence tuner according to the control signal. Moreover, the impendence matching control module generates the control signal according to a compare signal and a lock signal. Besides, the signal receiver generates the lock signal and the compare signal according to a compare result between a current flowing through the first impendence tuner and a reference current.

Abstract: The present innovation discloses a network communication establishment method between a portable device and a computer. The major feature of the present innovation is that the parameters are transmitted via the email and after the connection is established, the commands or requests for data transmission are still transmitted via email. As to the data under transmission, it is transmitted by peer to peer (P2P) technology. In another embodiment, the data may also be transmitted via email.

Abstract: The present invention discloses a data transmission method for a first electronic device and a second electronic device. The method includes the steps of finding a first available port of the first electronic device, finding a second available port of the second electronic device, transforming a first data into a second data, wherein a format of the second data is an XML format, and transmitting the second data to the first electronic device or the second electronic device via the first available port or the second available port.

Abstract: A digitally controlled oscillator (DCO) includes a pulse generator for generating a pulse signal upon an edge of a trigger signal, and at least one delay circuit coupled to delay the pulse signal generated by the pulse generator. The pulse generator is coupled to receive one of the delayed pulse signal from the at least one delay circuit and an enable signal as the trigger signal. A digitally controlled varactor (DCV) includes a transistor having a gate, a source, a drain, and a substrate, wherein at least one of the gate, the source, the drain, and the substrate is coupled to receive one of two or more voltages, wherein at least one of the two or more voltages is not a power supply voltage or ground.

Abstract: A voltage generating apparatus including a voltage generator and a current splitter is provided. The voltage generator has an output node, and generates a first output voltage from the output node. The first output voltage rises when the temperature rises and the current flowing from the output end of the voltage generator is fixed. And the first output voltage drops when the temperature is fixed and the current flowing from the output node of the voltage generator rises. The current splitter is used for increasing the current flowing through the current splitter when the temperature rises. Therefore, the rise of the first output voltage of the voltage generator will be restrained, and the temperature compensation can be achieved.

Abstract: A time-to-digital converter apparatus including a delay phase-locked loop, a subtracter, a multi-phase detector and a Vernier detector is disclosed. The delay phase-locked loop herein includes digital delay components for producing counting signals. The multi-phase detector includes digital delay components for producing delay outputs according to the counting signals and thereby detecting a pulse input signal. The Vernier detector includes digital delay components for detecting the remainder of the pulse input signal according to the difference between the delay outputs produced by the subtracter.

Abstract: An onion waveform generator and a spread spectrum clock generator (SSCG) using the same are provided. The onion waveform generator includes a value generation unit and an accumulating unit. The value generation unit outputs a counting value. The accumulating unit accumulates the counting value to output a waveform value. The accumulating unit switches from an increasing mode to a decreasing mode if the waveform value is a third boundary value, and the accumulating unit switches from the decreasing mode to the increasing mode if the waveform value is a fourth boundary value.

Abstract: A clock generator is illustrated. The clock generator mentioned above includes a multimodulus frequency divider and a delta-sigma modulator. The multimodulus frequency divider is archived by switching the phase thereof. The multimodulus frequency divider increases the operating frequency of the clock generator effectively, and has a characteristic with half period resolution for reducing the jitter of an output clock signal when its spectrum is spread. Besides, the delta-sigma modulator increases the accuracy of the triangle modulation and reduces error of quantization by adding a few components therein. Thus, the clock generator could be expanded to a programmable clock generator.

Abstract: A thin film, a casing with decorative pattern, a thin film manufacturing method, and a casing manufacturing method are disclosed. The thin film includes a carrier film, a structure layer formed on the carrier film, a hardened layer, a release layer between the hardened layer and the carrier film, and an adhesive layer. The structure layer has a first pattern. The hardened player includes a recess portion forming a second pattern the same as the first pattern. The thin film manufacturing method comprises preparing the carrier film, forming in order the structure layer on the carrier film, the release layer on the structure layer, and the hardened layer on the release layer, and forming the adhesive layer above the hardened layer. By the casing manufacturing method, the hardened layer of the thin film adheres to a casing through the adhesive layer so as to obtain the casing with decorative pattern.

Abstract: A clock generator is illustrated. The clock generator mentioned above includes a multimodulus frequency divider and a delta-sigma modulator. The multimodulus frequency divider is archived by switching the phase thereof. The multimodulus frequency divider increases the operating frequency of the clock generator effectively, and has a characteristic with half period resolution for reducing the jitter of an output clock signal when its spectrum is spread. Besides, the delta-sigma modulator increases the accuracy of the triangle modulation and reduces error of quantization by adding a few components therein. Thus, the clock generator could be expanded to a programmable clock generator.

Abstract: A digitally controlled oscillator (DCO) includes a pulse generator for generating a pulse signal upon an edge of a trigger signal, and at least one delay circuit coupled to delay the pulse signal generated by the pulse generator. The pulse generator is coupled to receive one of the delayed pulse signal from the at least one delay circuit and an enable signal as the trigger signal. A digitally controlled varactor (DCV) includes a transistor having a gate, a source, a drain, and a substrate, wherein at least one of the gate, the source, the drain, and the substrate is coupled to receive one of two or more voltages, wherein at least one of the two or more voltages is not a power supply voltage or ground.

Abstract: A digitally controlled oscillator (DCO) includes a pulse generator for generating a pulse signal upon an edge of a trigger signal, and at least one delay circuit coupled to delay the pulse signal generated by the pulse generator. The pulse generator is coupled to receive one of the delayed pulse signal from the at least one delay circuit and an enable signal as the trigger signal. A digitally controlled varactor (DCV) includes a transistor having a gate, a source, a drain, and a substrate, wherein at least one of the gate, the source, the drain, and the substrate is coupled to receive one of two or more voltages, wherein at least one of the two or more voltages is not a power supply voltage or ground.

Abstract: A spread spectrum clock generating apparatus is disclosed. The spread spectrum clock generating apparatus includes a phase lock loop module and a spread spectrum module. The phase lock loop module is used for dynamically tuning frequency of an output clock. The spread spectrum module includes a counter, a plurality of delta-sigma counters and a data shifter. These delta-sigma counters accumulate input signals, and enable a first overflow signal while accumulation of a last stage delta-sigma counter is overflowed. The frequency of the output clock can be tuned dynamically according to the first overflow signal, and the spectrum of the output clock can be spread.

Abstract: A clock generator is illustrated. The clock generator mentioned above includes a multimodulus frequency divider and a delta-sigma modulator. The multimodulus frequency divider is archived by switching the phase thereof. The multimodulus frequency divider increases the operating frequency of the clock generator effectively, and has a characteristic with half period resolution for reducing the jitter of an output clock signal when its spectrum is spread. Besides, the delta-sigma modulator increases the accuracy of the triangle modulation and reduces error of quantization by adding a few components therein. Thus, the clock generator could be expanded to a programmable clock generator.

Abstract: A gas releasable key structure including a base, a thin-film circuit, a key cap and an elastic structure is disclosed. The elastic structure is disposed between the key cap and the thin-film circuit and includes a cap body, a ring-shaped flange, a motion pillar and a conductor. The cap body has a first opening and a second opening. The ring-shaped flange connects an edge around the first opening. The motion pillar in the cap body has a through hole, an upper surface and a lower surface. The through hole is extended to the upper surface from the lower surface, connecting the second opening. The conductor on the lower surface has an indent and a breach that connects the through hole. When the first opening is closed, the gas inside the cap body is dissipated to the exterior via the indent, the breach, the through hole and the second opening.

Abstract: A signal transceiver apparatus suitable for a wired signal transceiver system includes a differential signal transmitter, an impendence matching control module and a signal receiver. The signal transmitter has an output terminal which is connected to a transceiver wire. The signal transmitter includes a first impendence tuner and is used to receive a control signal so as to tune impendence of the first impendence tuner according to the control signal. Moreover, the impendence matching control module generates the control signal according to a compare signal and a lock signal. Besides, the signal receiver generates the lock signal and the compare signal according to a compare result between a current flowing through the first impendence tuner and a reference current.

Abstract: A rubber dome is disclosed in this invention. The rubber dome includes a rubber body and a hole. When the bottom of a first mold and the top of a second mold are closely connected, a specific space is generated between them. After a rubber material is poured into the specific space, the rubber material will form the rubber body. When the first mold and the second mold are separated, the hole will be automatically formed on the top of the rubber body.

Abstract: A current switch logic circuit is disclosed. The circuit includes a current sense amplifier formed by a first transistor to a fifth transistor, and a logic tree. The logic tree is used to generate a first current and a second current. The current sense amplifier generates a first output signal and a second output signal according to the first current and the second current.

Abstract: A current switch logic circuit is disclosed. The circuit includes a current sense amplifier formed by a first transistor to a fifth transistor, and a logic tree. The logic tree is used to generate a first current and a second current. The current sense amplifier generates a first output signal and a second output signal according to the first current and the second current.

Abstract: A current switch logic circuit is disclosed. The circuit includes a current sense amplifier formed by a first transistor to a fifth transistor, and a logic tree. The logic tree is used to generate a first current and a second current. The current sense amplifier generates a first output signal and a second output signal according to the first current and the second current.