Abstract: A display substrate and a preparation method therefor, and a display apparatus are provided. The display substrate includes a drive circuit layer (102) and a light emitting structure layer (103) arranged on a base substrate (101), the drive circuit layer (102) includes a plurality of circuit units, at least one circuit unit is provided with at least one light transmitting region, the light emitting structure layer (103) includes a plurality of light emitting units, the light emitting unit at least includes an anode, and the light transmitting region is located between adjacent anodes; and there is a first dimension between two adjacent anodes in two adjacent pixel rows, and the light transmitting region has a second dimension, wherein a ratio of the second dimension to the first dimension is greater than or equal to 0.5.

Abstract: Provided is a display panel, including: a base substrate, a plurality of display sub-pixels, a plurality of power voltage lines, and a plurality of data signal lines. The display sub-pixel includes a display pixel drive circuit connected to the power voltage line and the data signal line. The display pixel drive circuit includes at least a first transistor and a second transistor. Each of the first transistor and the second transistor includes an active layer. The first transistor includes a shield. An orthographic projection of the shield on the base substrate is at least partially overlapped with an orthographic projection of a channel connection region of the active layer of the first transistor on the base substrate. An orthographic projection of the shield and the data signal line is not overlapped with an orthographic projection of the active layer of the second transistor on the base substrate.

Abstract: The present invention provides a method for producing sponge iron comprising the steps of: subjecting a cracking feedstock containing low-carbon alkanes to a steam cracking reaction in which the energy is provided by electricity; separating the products of steam cracking reaction to give a mixed gas containing hydrogen, methane and ethane, as well as ethylene, propylene and/or 1,3-butadiene; and mixing the mixed gas with water and/or CO2 to produce a syngas for producing sponge iron by a catalytic conversion reaction in which the energy is provided by electricity. The present invention utilizes electricity to provide energy for the steam cracking reaction and the catalytic conversion reaction through an electromagnetic coil, which is a new use of electricity and solve the current problem of excess electricity.

Abstract: A display substrate comprises a display area and a bezel area, wherein a side of the display area close to the bezel area forms a first step-shaped display area boundary, the bezel area at least comprises a capacitance area, the capacitance area comprises a plurality of compensation capacitors, and the plurality of compensation capacitors form a second step-shaped capacitance area boundary on a side far away from the display area; the display area boundary comprises a plurality of first steps connected in sequence, the first steps having a first step length and a first step width, and the capacitance area boundary comprises a plurality of second steps connected in sequence.

Abstract: A display substrate includes a base substrate, a first encapsulation adhesive base substrate, multiple first signal lead lines, multiple test connection traces and multiple test signal access pins. The base substrate at least includes a display area and a peripheral area located on a side of the display area. The first encapsulation adhesive base substrate is located in the peripheral area. The multiple first signal lead lines, the multiple test connection traces, and the multiple test signal access pins are located on a side of the first encapsulation adhesive base substrate away from the display area. At least one first signal lead line is electrically connected with at least one test signal access pin through at least one test connection trace.

Abstract: The present invention discloses a receptor inhibitor of formula (I), a pharmaceutical composition comprising the same and the use thereof.

Abstract: A display substrate, a method for manufacturing the same and a display device. In the display substrate, a sealant region includes: a corner sealant region, a lead-in sealant region, and a first sealant region on a first side of a display area. The corner sealant region is provided with an encapsulation base layer. A non-display area is provided with a second power line, a gate drive circuit and multiple first signal lines configured to provide signals to the gate drive circuit. The second power line includes a power line corner portion and a first power line portion, the first power line portion overlaps the first sealant region, and the first power line portion extends in a first direction. A target portion of each first signal line is at least located in the corner sealant region.

Abstract: Shallow Trench Isolation (STI) chemical mechanical planarization (CMP) polishing compositions, methods and systems of use therefore are provided. The CMP polishing composition comprises abrasives of ceria coated inorganic oxide particles, such as ceria-coated silica; and dual chemical additives for providing the tunable oxide film removal rates and tunable SiN film removal rates; low oxide trench dishing, and high oxide: SiN selectivity. Dual chemical additives comprise at least one silicone-containing compound comprising at least one of (1) ethylene oxide and propylene oxide (EO-PO) group, and at least one of substituted ethylene diamine group on the same molecule; and (2) at least one non-ionic organic molecule having at least two, preferably at least four hydroxyl functional groups.

Abstract: A display substrate, a manufacturing method therefor, and a display apparatus are provided. The display substrate includes a display area (100) and a bezel area (300), the bezel area (300) includes a circuit area (310) and a partition area (320), the circuit area (310) includes a third gate driving circuit, a second gate driving circuit (GOA-2) and a first gate driving circuit (GOA-1) arranged in sequence along a direction away from the display area (100), the partition area (320) includes a power supply line, the power supply line includes a first branch (VSS-1) and a second branch (VSS-2); orthographic projections of the second branch (VSS-2) and the first branch (VSS-1) of the power supply line on the base substrate have an overlapped area.

Abstract: A display panel and a display device are provided. The display panel includes: a plurality of first pixel units, a plurality of second pixel units, a plurality of third pixel units and a plurality of first data lines. An effective light-emitting area of the first pixel unit is larger than an effective light-emitting area of the second pixel unit, and larger than an effective light-emitting area of the third pixel unit; orthographic projection of the first data line on the base substrate is not overlapped with an orthographic projection of any one of the first electrode of the first pixel unit, the first electrode of the second pixel unit, and the first electrode of the third pixel unit on the base substrate.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a display region, and a non-display region surrounding the display region and including an encapsulation adhesive region surrounding the display region. The display substrate further includes an encapsulation base layer arranged at the encapsulation adhesive region; and a fanout layer arranged at the non-display region and including a first reuse portion. An orthogonal projection of the first reuse portion onto a base substrate of the display substrate at least partially overlaps an orthogonal projection of a first target region of the encapsulation adhesive region onto the base substrate, and the first reuse portion is reused as the encapsulation base layer at the first target region.

Abstract: A method for developing or improving a process for producing a product from a material comprising steps of acquiring the composition for at least two slurries as raw material data (17) for the CMP based manufacturing process and its relevant parameters (2) by using a Data Collecting computer (9); physically performing specific method steps of a CMP process; measuring relevant parameters of the used slurries and the physically performed CMP process to determine the CMP process performance by using the Data Collecting computer (9); analyzing the measured data about the relevant parameters with a specific software performed on an Analyzing computer (11) by creating for the software and applying with it a predictive model using Machine Learning to understand the intercorrelation of the different parameters and using the results to improve the CMP process performance and the resulting product quality of the CMP based manufacturing process.

Abstract: A connector includes an outer shell with opposite connecting end and rear end in an insertion direction, the connecting end being located at a front end of the outer shell, a receiving space being defined in the outer shell, an opening being defined in the connecting end; a first terminal fixed in the receiving space; a fastener being connected to and rotatable relative the outer shell about a rotary axis, the fastener including a locking portion and a button, the locking portion being set in the outer shell and extending towards the opening, the button including a pressing portion capable of being operated from outside, the pressing portion being set at a front end of the rotary axis, and the locking portion being set at a front end of the pressing portion; and an elastic member being connected to the fastener and generating an elastic force on the fastener.

Abstract: The present disclosure provides a light-emitting substrate, a light-emitting apparatus and a lighting apparatus. The light-emitting substrate includes: a base substrate including a plurality of light-emitting regions and a plurality of non-light-emitting regions, where the plurality of light-emitting regions are arranged in an array; a plurality of light-emitting units located in the plurality of light-emitting regions, respectively, where in each light-emitting region, more than one light-emitting unit is arranged in an array; a covering layer covering the light-emitting region and the non-light-emitting region; and a plurality of support structures arranged in an array and evenly distributed in the plurality of non-light-emitting regions and/or between the plurality of light-emitting units, where the support structures are used to support the covering layer.

Abstract: A display substrate and manufacturing method therefor, and a display device. The display substrate includes a base substrate, a drive circuit layer and a light emitting structure layer; the drive circuit layer includes multiple circuit units, a circuit unit at least includes a pixel drive circuit at least including a storage capacitor and a compensation transistor, a first electrode of the compensation transistor is connected to a first electrode plate of the storage capacitor through a first connection electrode; light emitting structure layer includes multiple light emitting units, a light emitting unit at least includes an anode connected to the pixel drive circuit; an orthographic projection of the anode of at least one light emitting unit on base substrate at least partially overlaps that of the first connection electrode of at least one circuit unit on base substrate, first connection electrodes of at least two circuit units have different shapes.

Abstract: The present invention discloses Chemical Mechanical Planarization (CMP) polishing compositions, methods and systems that offer high and near equal removal rates of silicon dioxide and silicon nitride for achieving a topographically corrected wafer surface with low defects. The CMP polishing compositions use a unique combination of non-spherical, non-surface modified silica particles having low specific surface area (<300 or <150 m2/gm) due to low surface silanol density (<4 SiOH/nm2); and a chemical additive contains diphosphonic acid.

Abstract: The present disclosure provides a display substrate, a manufacturing method and a display device. The display substrate includes a display region, and a non-display region surrounding the display region and including an encapsulation adhesive region surrounding the display region. The display substrate further includes an encapsulation base layer arranged at the encapsulation adhesive region; and a fanout layer arranged at the non-display region and including a first reuse portion. An orthogonal projection of the first reuse portion onto a base substrate of the display substrate at least partially overlaps an orthogonal projection of a first target region of the encapsulation adhesive region onto the base substrate, and the first reuse portion is reused as the encapsulation base layer at the first target region.

Abstract: A display motherboard comprises at least one substrate region; the substrate region comprises at least one test pad region, at least one test wire region and at least two display substrates; the test pad region comprises a plurality of pads; the test wire region comprises a plurality of signal wires, first ends of the plurality of signal wires being correspondingly connected to the plurality of pads, and second ends of the plurality of signal wires extending to the display substrates in the substrate region, so as to be connected to test circuits of the display substrates; the plurality of pads are configured to allow an external test device to provide, by means of the plurality of pads, test signals to the test circuits of the display substrates in the substrate region, so as to simultaneously perform light-on tests or aging procedures on the display substrates in the substrate region.

Abstract: The present invention discloses Shallow Trench Isolation (STI) Chemical Mechanical Planarization (CMP) polishing compositions, methods and systems that offer high and tunable Oxide: SiN and Oxide: Poly-Si removal selectivity, and low oxide trench dishing at different pH conditions in addition to suppressed Poly-Si removal rates. The polishing compositions comprise abrasive particles such as calcined ceria, and at least two preferably at least three chemical additives. The additives are (1) chemicals such as D-mannose, L-mannose, ribitol (D-ribitol), xylitol, meso-erythritol, D-sorbitol, mannitol, dulcitol, iditol, maltitol, fructose, sorbitan, sucrose, D-ribose, inositol, and glucose; (2) polyacrylic acid or polyacrylate and its ammonium, potassium or sodium salt, and (3) polyethylene glycol (PEG) with different molecular weight distributions as film selectivity tuning and oxide trench dishing reducing additives.