Abstract: A method can include at a first station in a wireless network, receiving path loss (PL) transmissions from at least a second station, dynamically changing power for transmissions from the first station to the second station based on the received PL information, determining PL values for transmissions received at the first station from other stations, and sending PL transmissions from the first station that include the determined PL values for at least one other station. The PL transmissions are configured to be received by stations of the same wireless network and stations of a different wireless network. Corresponding devices and systems are also disclosed.

Abstract: A method can include detecting local devices with a wireless first communication interface (IF) of a gateway device; authenticating at least one local device with the gateway device, including by operation of the first communication IF and a second communication IF, relaying secure communications between the at least one local device and a server to enable authentication of the at least one local device by the server, and after receiving authentication of the at least one local device at the gateway device, transmitting user information for storage in a secure memory of the authenticated local device; and operating the gateway device as a common access point to the network for any of a plurality of local devices authenticated with the gateway device. Related systems and gateway devices are also disclosed.

Abstract: Calibrating a Gaussian frequency-shift keying modulation index includes generating a training sequence of bits, shaping a pulse from the training sequence according to an initial modulation index, and converting the shaped signal to a transmission signal. The transmission signal is then either looped through a radio frequency core or processed by frequency deviation estimation hardware to determine a frequency deviation. The frequency deviation is converted to a new modulation index, and potentially a ratio between a target modulation index and a measured modulation index as a scaling factor. The process is then iteratively repeated until a threshold frequency deviation is achieved.

Abstract: A method can include detecting local devices with a wireless first communication interface (IF) of a gateway device; authenticating at least one local device with the gateway device, including by operation of the first communication IF and a second communication IF, relaying secure communications between the at least one local device and a server to enable authentication of the at least one local device by the server, and after receiving authentication of the at least one local device at the gateway device, transmitting user information for storage in a secure memory of the authenticated local device; and operating the gateway device as a common access point to the network for any of a plurality of local devices authenticated with the gateway device. Related systems and gateway devices are also disclosed.

Abstract: A communication system and method are disclosed for parallel processing of received signals to improve sensitivity of the system. Generally, the method includes demodulating a modulated signal in a first demodulator circuit and a second demodulator circuit in parallel. The first and second demodulated signals are then de-whitened, and a cyclic redundancy code (CRC) check performed on each. If the de-whitened first demodulated signal passes the CRC check a first packet included in the signal is sent to a central processing unit (CPU) for further processing. If the de-whitened second demodulated signal passes the CRC check, and the de-whitened first demodulated signal fails, a second packet included in the de-whitened second demodulated signal is transmitted to the CPU for further processing. In one embodiment, one of demodulator circuits is a GFSK demodulator operated in the phase domain and configured to use maximum likelihood sequence estimation. Other embodiments are also described.

Abstract: Calibrating a Gaussian frequency-shift keying modulation index includes generating a training sequence of bits, shaping a pulse from the training sequence according to an initial modulation index, and converting the shaped signal to a transmission signal. The transmission signal is then either looped through a radio frequency core or processed by frequency deviation estimation hardware to determine a frequency deviation. The frequency deviation is converted to a new modulation index, and potentially a ratio between a target modulation index and a measured modulation index as a scaling factor. The process is then iteratively repeated until a threshold frequency deviation is achieved.

Abstract: A modem includes a modulator and a demodulator. The demodulator includes a direct current removing (DCR) circuit to transition between an acquisition mode, where the DCR circuit operates with a first loop gain; and a tracking mode, where the DCR circuit operates with a second loop gain. The second loop gain is smaller than the first loop gain, and the timing of the transition between the acquisition mode and tracking mode is programmable.

Abstract: Calibrating a Gaussian frequency-shift keying modulation index includes generating a training sequence of bits, shaping a pulse from the training sequence according to an initial modulation index, and converting the shaped signal to a transmission signal. The transmission signal is then either looped through a radio frequency core or processed by frequency deviation estimation hardware to determine a frequency deviation. The frequency deviation is converted to a new modulation index, and potentially a ratio between a target modulation index and a measured modulation index as a scaling factor. The process is then iteratively repeated until a threshold frequency deviation is achieved.

Abstract: A modem includes a modulator and a demodulator. The demodulator includes a direct current removing (DCR) circuit to transition between an acquisition mode, where the DCR circuit operates with a first loop gain; and a tracking mode, where the DCR circuit operates with a second loop gain. The second loop gain is smaller than the first loop gain, and the timing of the transition between the acquisition mode and tracking mode is programmable.

Abstract: A frequency-shift keying (FSK) demodulator includes a digital phase-locked loop (DPLL) based frequency estimator to convert a phase signal to a frequency signal, a frequency offset estimator to estimate and track direct current (DC) component of the frequency signal, and an average filter communicatively coupled to the frequency offset estimator to perform an accumulate-and-dump operation to improve a symbol-level signal to noise ratio (SNR) of the frequency signal.

Abstract: In some aspects, the disclosure is directed to methods and systems for dense small cell deployment. In one or more embodiments, a plurality of small cells is grouped into a first group of small cells having a first power level and a second group of small cells having a second power level. In one or more embodiments, each power level in the first set of power levels is greater than each power level in the second set of power levels. In one or more embodiments, the small cells of the first group performs frequency domain inter-cell interference coordination (ICIC) between the small cells of the first group. In one or more embodiments, the small cells of the second group performs time domain ICIC with the small cells in the first group. In one or more embodiments, the small cells of the first group use a same almost blank subframe (ABS) pattern.

Abstract: In some aspects, the disclosure is directed to methods and systems for dense small cell deployment. In one or more embodiments, a plurality of small cells is grouped into a first group of small cells having a first power level and a second group of small cells having a second power level. In one or more embodiments, each power level in the first set of power levels is greater than each power level in the second set of power levels. In one or more embodiments, the small cells of the first group performs frequency domain inter-cell interference coordination (ICIC) between the small cells of the first group. In one or more embodiments, the small cells of the second group performs time domain ICIC with the small cells in the first group. In one or more embodiments, the small cells of the first group use a same almost blank subframe (ABS) pattern.

Abstract: In a hardware audio CODEC which processes audio signals from a plurality of inputs, voltage and/or power levels of the input audio signals may be adjusted such that the digitally adjusted levels are approximately equal for each of the plurality of inputs. The digital adjustment may comprise, for each audio sample of one of the input audio signals, adding the audio sample to one or more right shifted versions of the audio sample and selecting a portion of a summed audio signal resulting from the addition. The portion of the summed audio that is selected may be determined based on the type of audio content being processed. The one or more right shifted versions of the audio sample may be selected via one or more switching elements which may be controlled via a digital control word which may be dynamically generated.

Abstract: An audio codec in a baseband processor may be utilized for mixing audio signals received at a plurality of data sampling rates. The mixed audio signals may be up sampled to a very large sampling rate, and then down sampled to a specified sampling rate that is compatible with a Bluetooth-enabled device by utilizing an interpolator in the audio codec. The down-sampled signals may be communicated to Bluetooth-enabled devices, such as Bluetooth headsets, or Bluetooth-enabled devices with a USB interface. The interpolator may be a linear interpolator for which the audio codec may enable generation of triggering and/or coefficient signals based on the specified output sampling rate. An interpolation coefficient may be generated based on a base value associated with the specified output sampling rate. The audio codec may enable selecting the specified output sampling rate from a plurality of rates.

Abstract: Disclosed are various embodiments providing carrier separation to effectuate a dual carrier operation of a wireless communication device. Processing circuitry may acquire a single carrier signal based on a determined time slot boundary, the single carrier signal comprising primary carrier data. The processing circuitry may receive a dual carrier radio frequency signal based on the determined time slot boundary, the dual carrier radio frequency signal comprising the primary carrier data and secondary carrier data. The processing circuitry may then generate a baseband dual carrier signal by demodulating the dual carrier radio frequency signal. The processing circuitry may separate the primary carrier data from the baseband dual carrier signal by filtering the baseband dual carrier signal. The processing circuitry may also separate the secondary carrier data from the baseband dual carrier signal by filtering the baseband dual carrier signal.

Abstract: In a 3G cellular network, a Reverse Link Channel Quality Indicator Channel (R-CQICH) may be transmitted on a reverse link to support forward link high-speed data transmissions. Accordingly, the R-CQICH may be utilized to track the quality of the signal path between the wireless unit and the base station. The base station may include a CQI component that utilizes a received Channel Quality Indicator (CQI) signal from the wireless unit to generate CQI quality metrics based on the quality of the received signal. Also, the CQI quality metrics may be compared to different thresholds to adjust various system configurations in the base station. The base station may also provide feedback to the wireless unit with the updated system configurations. This technique allows CQI quality metrics to be utilized to adjust system configurations dynamically and enhance the operation of a wireless system.

Abstract: Aspects of a method and system for processing control channel signals may include calculating at a receiver, for a portion of a sub-frame of each one of a plurality of control channels, first and second quality metrics. A control channel may be selected on the basis of the quality metrics. The calculating and selecting may be done for a first slot of a corresponding sub-frame. A validity of a selected control channel may be determined based on a CRC derived from decoding the selected control channel's sub-frame.

Abstract: A system for determining a time delay between an in-phase signal component and a quadrature-phase signal component includes an in-phase signal start time determination module coupled to an in-phase delay module, the in-phase signal start time determination module and the in-phase delay module configured to receive an in-phase signal component of a received signal. The in-phase signal start time determination module is configured to receive a reference signal. The system also includes a quadrature-phase signal start time determination module coupled to a quadrature-phase delay module, the quadrature-phase signal start time determination module and the quadrature-phase delay module configured to receive a quadrature-phase signal component of a received signal.

Abstract: A channel receiver operable to implement fractional dedicated physical channel (F-DPCH) for high-speed data packet access is provided. A received RF signal is processed to produce a set of soft symbol outputs. The receiver detects whether transmit power control (TPC) command bits are present in the set of soft symbol outputs. The TPC command bits are conveyed with the RF signal over non-dedicated pilot bits in the processed baseband signal. When TPC command bits are detected, the set of soft symbol outputs are processed to produce estimated TPC command bits. A TPC quality estimate is generated based on the estimated TPC command bits. A signal-to-interference ratio for the WCDMA dedicated physical channel is adjusted based upon a comparison of the TPC quality estimate with a TPC quality target to effect F-DPCH power control.

Abstract: In a method and system for audio level detection and control, an amplitude of an audio signal may be compared to a threshold and an attenuation applied to the audio signal may be adjusted based on the comparison. In instances that the amplitude of the audio signal is greater than or equal to the threshold the adjustment may comprise increasing a first attenuation factor until the amplitude of the audio signal is less than the threshold. The first attenuation factor may be subsequently decreased until the amplitude of the audio signal is greater than or equal to the threshold or until the first attenuation factor is equal to zero. The attenuation of the audio signal may be controlled via a digital gain circuit within the hardware audio CODEC, wherein an overall attenuation factor of the digital gain circuit is a sum of the first attenuation factor and a second attenuation factor.