Patents by Inventor Hongyong Zhang

Hongyong Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050037549
    Abstract: A thin film transistor device reduced substantially in resistance between the source and the drain by incorporating a silicide film, which is fabricated by a process comprising forming a gate insulator film and a gate contact on a silicon substrate, anodically oxidizing the gate contact, covering an exposed surface of the silicon semiconductor with a metal, and irradiating an intense light such as a laser beam to the metal film either from the upper side or from an insulator substrate side to allow the metal coating to react with silicon to obtain a silicide film. The metal silicide layer may be obtained otherwise by tightly adhering a metal coating to the exposed source and drain regions using an insulator formed into an approximately triangular shape, preferably 1 ?m or less in width, and allowing the metal to react with silicon. A high performance TFT can be realized.
    Type: Application
    Filed: September 13, 2004
    Publication date: February 17, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiko Takemura, Hongyong Zhang, Satoshi Teramoto
  • Publication number: 20050029524
    Abstract: Disposing the light absorption layer formed in contact with a polycrystal silicon layer of a bottom gate type polycrystal silicon TFT allows a depletion layer formed between drain and channel forming regions to extend further into the inside of the light absorption layer, resulting in collection of photo carriers produced in the depletion layer into the channel forming region. The photo carriers collected into the channel forming region are subsequently collected into the source region to be output as large photocurrents by high mobility of the polycrystal silicon.
    Type: Application
    Filed: September 7, 2004
    Publication date: February 10, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Masayuki Sakakura
  • Patent number: 6853364
    Abstract: A liquid crystal display device includes a display circuit having data lines and scanning lines arranged in two-dimensional matrix, and switching elements connected between the data lines and the scanning lines. A first inspection circuit is also provided, including an inspection voltage input and/or output terminal for inputting and/or outputting an inspection voltage to/from one ends of the data lines via a first analog switch. A second inspection circuit includes an inspection voltage input and/or output terminal for inputting and/or outputting an inspection voltage to/from the other ends of the data lines. The display circuit, the first inspection circuit, and the second inspection circuit are provided on one substrate, and the first inspection circuit is constructed to be separated from the rest of the display circuit.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: February 8, 2005
    Assignee: Fujitsu Display Technologies Corporation
    Inventors: Tsutomu Kai, Susumu Okazaki, Hongyong Zhang, Noriyuki Ohashi
  • Publication number: 20050017241
    Abstract: A semiconductor device having CMOS circuits formed on a glass substrate. The CMOS circuits are composed of TFTs. Lightly doped regions are formed only in the N-channel TFTs. When P-channel TFTs are formed, the conductivity type of the lightly doped regions is converted by a boron ion implant. Each CMOS circuit consists of an N-channel TFT having the lightly doped regions and a P-channel TFT having no lightly doped regions.
    Type: Application
    Filed: August 16, 2004
    Publication date: January 27, 2005
    Inventor: Hongyong Zhang
  • Publication number: 20050017243
    Abstract: A semiconductor device having a pair of impurity doped second semiconductor layers, formed on a first semiconductor layer having a channel formation region therein, an outer edge of the first semiconductor film being at least partly coextensive with an outer edge of the impurity doped second semiconductor layers. The semiconductor device further includes source and drain electrodes formed on the pair of impurity doped second semiconductor layers, wherein the pair of impurity doped second semiconductor layers extend beyond inner sides edges of the source and drain electrodes so that a stepped portion is formed from an upper surface of the source and drain electrodes to a surface of the first semiconductor film.
    Type: Application
    Filed: August 26, 2004
    Publication date: January 27, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Naoto Kusumoto
  • Publication number: 20050020006
    Abstract: A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.
    Type: Application
    Filed: August 26, 2004
    Publication date: January 27, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Hideki Uochi, Toru Takayama, Takeshi Fukunaga, Yasuhiko Takemura
  • Patent number: 6847422
    Abstract: A liquid crystal display device manufacturing method, including the steps of forming first-layer metal patterns in a display portion and a peripheral circuit portion of a first substrate; forming a first insulating film on the first-layer metal patterns; forming second-layer metal patterns on the first insulating film; and forming a color resin film on the second-layer metal patterns. The method also including the steps of patterning the color resin film to form color filters made of the color resin film in a pixel region of the display portion and to leave the color resin film in the peripheral circuit portion and forming a third-layer metal pattern on the color resin film in the peripheral circuit portion.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: January 25, 2005
    Assignee: Fujitsu Display Technologies Corporation
    Inventors: Hongyong Zhang, Seii Sato
  • Patent number: 6847064
    Abstract: A semiconductor device having a pair of impurity doped second semiconductor layers, formed on a first semiconductor layer having a channel formation region therein, an outer edge of the first semiconductor film being at least partly coextensive with an outer edge of the impurity doped second semiconductor layers. The semiconductor device further includes source and drain electrodes formed on the pair of impurity doped second semiconductor layers, wherein the pair of impurity doped second semiconductor layers extend beyond inner sides edges of the source and drain electrodes so that a stepped portion is formed from an upper surface of the source and drain electrodes to a surface of the first semiconductor film.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: January 25, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Naoto Kusumoto
  • Publication number: 20050009254
    Abstract: A process for fabricating thin film transistors is disclosed, which comprises a two-step laser annealing process as follows: crystallizing the channel portion by irradiating the channel portion with an irradiation beam; and modifying the electric properties of the source and the drain by irradiating the source and the drain with an irradiation beam in a step independent to the first step of crystallizing the channel portion.
    Type: Application
    Filed: May 25, 2004
    Publication date: January 13, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 6842214
    Abstract: There are contained a peripheral circuit portion B having first metal patterns formed on a first substrate, a first insulating film formed on the first metal patterns, a second metal pattern formed on the first insulating film, a second insulating film formed on the second metal pattern to have at least a first resin film, and third metal patterns formed on the second insulating film, and a display portion A having an active element formed on the first substrate and covered with the second insulating film and a second resin film, and a pixel electrode formed in a pixel region on the second insulating film and connected electrically to the active element via a hole that is formed in the second insulating film. Accordingly, the liquid crystal display device that has the display portion A and the peripheral circuit portion B is capable of reducing the capacitance between wirings and improving the throughput.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: January 11, 2005
    Assignee: Fujitsu Display Technologies Corporation
    Inventor: Hongyong Zhang
  • Publication number: 20050003568
    Abstract: A low temperature process for fabricating a high-performance and reliable semiconductor device in high yield, comprising forming a silicon oxide film as a gate insulator by chemical vapor deposition using TEOS as a starting material under an oxygen, ozone, or a nitrogen oxide atmosphere on a semiconductor coating having provided on an insulator substrate; and irradiating a pulsed laser beam or an intense light thereto to remove clusters of such as carbon and hydrocarbon to thereby eliminate trap centers from the silicon oxide film. Also claimed is a process comprising implanting nitrogen ions into a silicon oxide film and annealing the film thereafter using an infrared light, to thereby obtain a silicon oxynitride film as a gate insulator having a densified film structure, a high dielectric constant, and an improved-withstand voltage.
    Type: Application
    Filed: July 28, 2004
    Publication date: January 6, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang
  • Publication number: 20040256621
    Abstract: A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.
    Type: Application
    Filed: July 20, 2004
    Publication date: December 23, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshimitsu Konuma, Akira Sugawara, Yukiko Uehara, Hongyong Zhang, Atsunori Suzuki, Hideto Ohnuma, Naoaki Yamaguchi, Hideomi Suzawa, Hideki Uochi, Yasuhiko Takemura
  • Patent number: 6831333
    Abstract: To provide a thin film transistor having a low OFF characteristic and to provide P-channel type and N-channel type thin film transistors where a difference in characteristics of the P-channel type and the N-channel type thin film transistors is corrected, a region 145 having a P-type behavior more potential than that of a drain region 146 is arranged between a channel forming region 134 and the drain region 146 in the P-channel type thin film transistor whereby the P-channel type thin film transistor having the low OFF characteristic can be provided and a low concentration impurity region 136 is arranged between a channel forming region 137 and a drain region 127 in the N-channel type thin film transistor whereby the N-channel type thin film transistor having the low OFF characteristic and where deterioration is restrained can be provided.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: December 14, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Satoshi Teramoto
  • Patent number: 6815271
    Abstract: A semiconductor device having CMOS circuits formed on a glass substrate. The CMOS circuits are composed of TFTs. Lightly doped regions are formed only in the N-channel TFTs. When P-channel TFTs are formed, the conductivity type of the lightly doped regions is converted by a boron ion implant. Each CMOS circuit consists of an N-channel TFT having the lightly doped regions and a P-channel TFT having no lightly doped regions.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: November 9, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Publication number: 20040217357
    Abstract: In an active matrix display device integrated with peripheral drive circuits, an image sensor is provided on the same substrate as a pixel matrix and peripheral drive circuits. The image sensor is formed on the substrate having pixel electrodes, pixel TFTs connected to the pixel electrodes and CMOS-TFTs for driving the pixel TFTs. The light receiving unit of the image sensor has light receiving elements having a photoelectric conversion layer and light receiving TFTs. These TFTs are produced in the same step. The lower electrode and transparent electrode of the light receiving element are produced by patterning the same film as the light shielding film and the pixel electrodes arranged in the pixel matrix.
    Type: Application
    Filed: June 7, 2004
    Publication date: November 4, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Masayuki Sakakura
  • Publication number: 20040214359
    Abstract: An electronic device having a long life and high quality pixel unit, said electronic device comprising a plurality of active elements, an insulator layer which covers the plurality of active elements, and a pixel region having placed thereon a plurality of pixel electrodes and being formed on the insulator layer, wherein, the insulator layer comprises a groove portion having an opening which is superposed on the interstice between the neighboring pixel electrodes, and said groove portion comprises an insulating light absorber buried therein.
    Type: Application
    Filed: May 19, 2004
    Publication date: October 28, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Masayuki Sakakura
  • Patent number: 6806125
    Abstract: A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: October 19, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Hideki Uochi, Toru Takayama, Takeshi Fukunaga, Yasuhiko Takemura
  • Patent number: 6806862
    Abstract: A liquid crystal display device including a display part having pixels arranged in a matrix formation; signal lines and scan lines connected to the pixels; a data driver which supplies display signals to the signal lines; and a reset circuit which resets the potentials of the signal lines to a predetermined potential with a given period. In one embodiment, the reset circuit includes a first reset circuit connected to the signal lines, and a second reset circuit connected to an output part of the driver.
    Type: Grant
    Filed: April 8, 1999
    Date of Patent: October 19, 2004
    Assignee: Fujitsu Display Technologies Corporation
    Inventors: Hongyong Zhang, Hirokazu Miwa, Michiya Oura, Hiroshi Murakami, Kazuhiro Takahara
  • Patent number: 6803261
    Abstract: There is provided a laminated type photoelectric converter whose sensitivity is enhanced uniformly. In the photoelectric converter in which a photoelectric conversion device is laminated above a signal transfer device, the sensitivity is enhanced by providing bends on a lower electrode of the photoelectric conversion device and by confining light uniformly.
    Type: Grant
    Filed: June 24, 2002
    Date of Patent: October 12, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Masayuki Sakakura
  • Patent number: 6803600
    Abstract: An LDD structure is manufactured to have a desired aspect ratio of the height to the width of a gate electrode. The gate electrode is first deposited on a semiconductor substrate followed by ion implantation with the gate electrode as a mask to form a pair of impurity regions. The gate electrode is then anodic oxidized to form an oxide film enclosing the electrode. With the oxide film as a mask, highly doped regions are formed by ion implantation in order to define lightly doped regions between the highly doped regions and the channel region located therebetween.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: October 12, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Hongyong Zhang