Abstract: An active matrix display device with a semiconductor layer, an organic layer above the semiconductor layer and a pixel electrode and a conductor layer thereon connected to the source/drain region(s).

Abstract: An electronic device having an active matrix liquid crystal device comprising a sealing layer with a region overlapping an insulating film formed over another insulating film, which extends beyond said insulating film and forms on a peripheral switching device, a region in contact with said another insulating film, and a region where said second insulating film is not formed over said another insulating film.

Abstract: A method for manufacturing an active matrix type display device is disclosed. The method comprises the steps of forming a plurality of semiconductor regions over a substrate; forming a short ring electrode and gate electrodes adjacent to the plurality of semiconductor regions with an insulating film interposed there between, wherein the short ring electrode and at least one of the gate electrodes are electrically connected with each other; and forming impurity regions by implanting impurity ions into the plurality of semiconductor regions, wherein a capacitor comprising the short ring electrode, the insulating film, and at least one of the plurality of semiconductor regions is formed.

Abstract: A preparing method of a semiconductor, particularly a preparing method of a polycrystal semiconductor film which has a good electrical property is disclosed. In order to obtain a non-crystalline silicon film containing a lot of combination of hydrogen and silicon, a forming process of a non-crystalline silicon film by a low temperature gas phase chemical reaction, a process of a heat annealing to produce a lot of dangling bonds of silicon, so as to draw out hydrogen from said non-crystalline silicon film, and a process of applying a laser irradiation to said non-crystal silicon film having a lot of dangling bond of silicon are conducted.

Abstract: Method of fabricating a semiconductor circuit is initiated with formation of an amorphous silicon film. Then, a second layer containing at least one catalytic element is so formed as to be in intimate contact with the amorphous silicon film, or the catalytic element is introduced into the amorphous silicon film. This amorphous silicon film is selectively irradiated with laser light or other equivalent intense light to crystallize the amorphous silicon film.

Abstract: A semiconductor device having CMOS circuits formed on a glass substrate. The CMOS circuits are composed of TFTs. Lightly doped regions are formed only in the N-channel TFTs. When P-channel TFTs are formed, the conductivity type of the lightly doped regions is converted by a boron ion implant. Each CMOS circuit consists of an N-channel TFT having the lightly doped regions and a P-channel TFT having no lightly doped regions.

Abstract: A liquid crystal display device has: a first substrate having an insulating surface; a display unit disposed in a central area of the first substrate and including a plurality of pixels disposed in a matrix shape, a plurality of scan lines for activating pixels disposed in a row direction, and a plurality of signal lines each for transferring video data to an activated pixel among pixels disposed in a column direction; a scan line driver circuit formed in a first row direction side area of a peripheral area of the first substrate outside of the display unit, the scan line driver circuit generating a signal for driving the scan lines; a signal line driver circuit formed in a first column direction side area of the peripheral area of the first substrate, the signal line driver circuit generating a signal for driving the signal lines; and a repair circuit formed in a partial area of the peripheral area of the first substrate, the repair circuit having substantially a same structure as a portion of the scan line

Abstract: A simulation method is provided in which by using a device model of a thin film transistor in which a nonlinear resistance element or a transistor having characteristics different from an intrinsic transistor is connected to the intrinsic transistor without characteristic deterioration due to a hot carrier, and a circuit operation after hot carrier deterioration can be simulated even by a general-purpose circuit simulator. The nonlinear resistance element is connected to a drain electrode of the intrinsic transistor (conventional device model) without hot carrier deterioration, and an increase of nonlinear resistance due to hot carrier injection is simulated by the nonlinear resistance element. As the nonlinear resistance element, a transistor in which a drain and a gate are connected is used. An increase of channel resistance due to hot carrier deterioration is set by setting the channel length, channel width, and threshold value of the transistor to predetermined values.

Abstract: In the fabrication of a CMOS-TFT, non-selectively doping (for both of p- and n-type TFTS) and selectively doping (only for the n-type TFT) with p-type impurities (B: boron) are successively performed at very low concentrations to control the threshold voltages (Vthp and Vthn). More specifically, the Id-Vg characteristics of the p- and n-type TFTs are initially negatively shifted. In this state, non-selectively doping is performed positively to shift the p- and n-type TFTs first to adjust the Vthp to a specified value. Selectively doping is then performed positively to shift only the n-type TFT to adjust the Vthn to a specified value. The threshold voltages of the p- and n-type TFTs constructing the CMOS-TFT can be independently and efficiently (with minimum photolithography) controlled with high accuracy.

Abstract: An active matrix type liquid crystal display capable of displaying an image of high quality and brightness.

Abstract: TFTs of peripheral logic circuits and TFTs of an active matrix circuit (pixel circuit) are formed on a single substrate by using a crystalline silicon film. The crystalline silicon film is obtained by introducing a catalyst element, such as nickel, for accelerating crystallization into an amorphous silicon film and heating it. In doing so, the catalyst element is introduced into regions for the peripheral logic circuits in a non-selective manner, and is selectively introduced into regions for the active matrix circuit. As a result, vertical crystal growth and lateral crystal growth are effected in the former regions and the latter regions, respectively. Particularly in the latter regions, the off-current and its variation can be reduced.

Abstract: In a thin-film insulated gate type field effect transistor having a metal gate in which the surface of the gate electrode is subjected to anodic oxidation, a silicon nitride film is provided so as to be interposed between the gate electrode and the gate insulating film to prevent invasion of movable ions into a channel, and also to prevent the breakdown of the gate insulating film due to a potential difference between the gate electrode and the channel region. By coating a specific portion of the gate electrode with metal material such as chrome or the like for the anodic oxidation, and then removing only the metal material such as chrome or the like together with the anodic oxide of the metal material such as chrome or the like, an exposed portion of metal gate (e.g. aluminum) is formed, and an upper wiring is connected to the exposed portion.

Abstract: A monolithic circuit comprises a plurality of thin film transistors. Source and drain regions of the TFT are provided with a metal silicide layer having a relatively low resistivity. Thereby, the effective distance between a gate and a source/drain electrode can be reduced.

Abstract: An insulated-gate field-effect transistor adapted to be used in an active-matrix liquid-crystal display. The channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.

Abstract: A method of manufacturing thin film field effect transistors is described. The channel region of the transistors is formed by depositing an amorphous semiconductor film in a first sputtering apparatus followed by thermal treatment for converting the amorphous phase to a polycrystalline phase. The gate insulating film is formed by depositing an oxide film in a second sputtering apparatus connected to the first apparatus through a gate valve. The sputtering for the deposition of the amorphous semiconductor film is carried out in an atmosphere comprising hydrogen in order to introduce hydrogen into the amorphous semiconductor film. On the other hand the gate insulating oxide film is deposited by sputtering in an atmosphere comprising oxygen.

Abstract: The present invention relates to a semiconductor device and a semiconductor integrated circuit. The semiconductor device comprises a semiconductor layer comprising a channel region, a source and a drain regions and at least one lower impurity concentration region interposed between the channel region and the source or the drain region. The source and the drain regions comprise metal silicide region. The lower impurity concentration region is not covered with the metal silicide region. The operational speed of the circuit can be improved, and the leak current of the transistor can be reduced.

Abstract: A semiconductor device having CMOS circuits formed on a glass substrate. The CMOS circuits are composed of TFTs. Lightly doped regions are formed only in the N-channel TFTs. When P-channel TFTs are formed, the conductivity type of the lightly doped regions is converted by a boron ion implant. Each CMOS circuit consists of an N-channel TFT having the lightly doped regions and a P-channel TFT having no lightly doped regions.

Abstract: A process for fabricating a thin film transistor, which comprises crystallizing an amorphous silicon film, forming thereon a gate insulating film and a gate electrode, implanting impurities in a self-aligned manner, adhering a coating containing a catalyst element which accelerates the crystallization of the silicon film, and annealing the resulting structure at a temperature lower than the deformation temperature of the substrate to activate the doped impurities. Otherwise, the catalyst element can be incorporated into the structure by introducing it into the impurity region by means of ion implantation and the like.

Abstract: A process for fabricating a semiconductor at a lower crystallization temperature and yet at a shorter period of time, which comprises forming an insulator coating on a substrate; exposing said insulator coating to a plasma; forming an amorphous silicon film on said insulator coating after its exposure to said plasma; and heat treating said silicon film in the temperature range of from 400 to 650° C. or at a temperature not higher than the glass transition temperature of the substrate. The nucleation sites are controlled by selectively exposing the amorphous silicon film to a plasma or by selectively applying a substance containing elements having a catalytic effect thereto. A process for fabricating a thin film transistor using the same is also disclosed.

Abstract: A semiconductor device having high carrier mobility, which comprises a substrate provided thereon a base film and further thereon a crystalline non-single crystal silicon film by crystal growth, wherein, the crystals are grown along the crystallographic [110] axis, and source/drain regions are provided approximately along the direction of carrier movement which coincides to the direction of crystal growth. Moreover, the electric conductivity along this direction of crystal growth is higher than any in other directions.