Abstract: A manufacturing method for an array substrate is disclosed. The method includes: forming a gate electrode on a substrate; depositing a gate insulation layer, a semiconductor layer, a source-drain metal layer and a passivation layer on the gate electrode and the substrate, and through a mask process to perform a patterning process to the semiconductor layer, the source-drain metal layer and the passivation layer in order to form a semiconductor pattern, a source-drain pattern and a contact hole pattern; and forming an ITO pixel electrode on the passivation layer and the contact hole pattern. An array substrate is also disclosed. The present invention adopts one mask process to form the semiconductor pattern, the source-drain pattern and the contact hole pattern such that the process of the array substrate is reduced to three masks in order to reduce the manufacturing cost, reduce the operation time and increase the production efficiency.

Abstract: The present invention discloses a GOA circuit, comprising a plurality of GOA units which are cascade coupled, and the Nth stage GOA unit is employed to control charge to the Nth level scan line G(N), and the pull-down holding circuit of the Nth stage GOA unit comprises a Nth control circuit, a Nth holding circuit and a Nth shared circuit; the pull-down holding circuit of the (N+4)th stage GOA unit comprises a (N+4)th control circuit, a (N+4)th holding circuit and a Nth shared circuit; a first control end Q(N) of the Nth control circuit and a second control end receiving the first control signal regulates and controls a voltage level of the output end P(N) thereof; a first control end Q(N+4) of the (N+4)th control circuit and a second control end receiving the low frequency control signal regulates and controls a voltage level of the output end P(N+4) thereof.

Abstract: A sensing panel and a manufacturing method of the same, and a method for pressure detection and temperature detection are disclosed in the present invention. The sensing panel comprises a scanning line, a first data line, a second data line, a first detection line, a second detection line, a pressure detecting unit, and a temperature detecting unit. The pressure detecting device is used to detect a pressure applied to the pressure detecting unit; the temperature detecting device is used to detect a temperature an object either near the temperature detecting unit or in contact with the temperature detecting unit. The present invention is able to detect the pressure and the temperature applied to the sensing panel.

Abstract: The present invention proposes an array substrate and a method for fabricating the same. According to the array substrate and the method of fabricating the array substrate in the present invention, the IGZO pattern and the first electrode strip, the first channel, and the second metallic layer in the corresponding section form the first transistor of the CMOS inverter, and the OSC pattern and the second electrode strip, the second channel, and the second metallic layer in the corresponding section form the second transistor of the CMOS inverter. In this way, the CMOS inverter or the CMOS ring oscillator is fabricated based on IGZO and OSC.

Abstract: An organic thin film transistor (OTFT) is disclosed herein. The OTFT has a substrate, a data line, a transfer pad, a source electrode, a drain electrode, an active pattern, a first insulating layer, a gate electrode, a second insulating layer, and a transparent electrode. The data line and the transfer pad are disposed on the substrate. The source electrode and the drain electrode are disposed on the substrate, the data line, and the transfer pad. The active pattern is disposed on the data line, the transfer pad, the substrate, the source electrode, and the drain electrode. With the disposition of the active pattern on the source electrode and the drain electrode, the source electrode and the drain electrode are free from the bombardment of the plasma.

Abstract: A touch-sensitive panel, touch-sensing method, and method for manufacturing the same are provided. The touch-sensitive panel includes a substrate, an induction line array layer, a dielectric layer, and an LED display panel. The induction line and the scanning line of the LED display panel intersect, and the induction line, the dielectric layer, and the scanning line form an inducing capacitor, which is utilized to generate a touch-sensing signal when the touch-sensitive panel is acted upon by an applied force. The present invention enables the display panel with the touch-sensing function to be thinner.

Abstract: A sensing panel and a manufacturing method of the same, and a method for pressure detection and temperature detection are disclosed in the present invention. The sensing panel comprises a scanning line, a first data line, a second data line, a first detection line, a second detection line, a pressure detecting unit, and a temperature detecting unit. The pressure detecting device is used to detect a pressure applied to the pressure detecting unit; the temperature detecting device is used to detect a temperature an object either near the temperature detecting unit or in contact with the temperature detecting unit. The present invention is able to detect the pressure and the temperature applied to the sensing panel.

Abstract: A manufacturing method for an array substrate is disclosed. The method includes: forming a gate electrode on a substrate; depositing a gate insulation layer, a semiconductor layer, a source-drain metal layer and a passivation layer on the gate electrode and the substrate, and through a mask process to perform a patterning process to the semiconductor layer, the source-drain metal layer and the passivation layer in order to form a semiconductor pattern, a source-drain pattern and a contact hole pattern; and forming an ITO pixel electrode on the passivation layer and the contact hole pattern. An array substrate is also disclosed. The present invention adopts one mask process to form the semiconductor pattern, the source-drain pattern and the contact hole pattern such that the process of the array substrate is reduced to three masks in order to reduce the manufacturing cost, reduce the operation time and increase the production efficiency.

Abstract: A thin film transistor array panel and a manufacturing method are disclosed herein. The thin film transistor array panel includes a data line, a first block of a source electrode, a third block of a drain electrode, and an electrode layer which are formed by a first metal layer disposed on a baseplate; a second block of the source electrode, a fourth block of the drain electrode are formed by a second metal layer which is disposed on the first metal layer. The first block and the second block overlap to combine integrally. The third block and the fourth block overlap to combine integrally. The present invention can decrease the electrical resistance of each of the source electrode and the drain electrode.

Abstract: A flexible array substrate structure and manufacturing method thereof are disclosed, in which the patterning process of an organic semi-conductive layer is achieved by using the inside wall of the opening of a color film layer as a bank, so that one mask can be saved. Also, a process for manufacturing a device can be simplified by an improved device structure, so that the flexible array substrate structure of the invention can be obtained by only using four masks.

Abstract: The present disclosure discloses a panel structure of flat displays and the manufacturing method thereof. The panel structure includes a first signal line, a second signal line, a transparent conductive film, and a scanning line. The transparent conductive film includes a first branch, a second branch, and a third branch. A first end of the first branch and a first end of the second branch are connected by a predetermined first angle, and a second end of the second branch and a first end of the third branch are connected by a predetermined second angle. The first branch, the second branch, and the third branch form the arch-shaped frame. The first signal line connects to the second end of the first branch, and the second signal line connects to the second end of the third branch. The scanning line passes through the arch-shaped frame along a first direction.

Abstract: The present invention relates to an apparatus for measuring the balance ability; postural deviation, reflex and fall risk assessment of a human subject. In particular, the present invention comprises of an elastic support mounted platform with dynamic response to external motion stimuli, a IMU and data analysis software processing device. The dynamic response from the platform also simulates realistic experience in moving over rough terrain with different topography.

Abstract: An organic thin film transistor (OTFT) is disclosed herein. The OTFT has a substrate, a data line, a transfer pad, a source electrode, a drain electrode, an active pattern, a first insulating layer, a gate electrode, a second insulating layer, and a transparent electrode. The data line and the transfer pad are disposed on the substrate. The source electrode and the drain electrode are disposed on the substrate, the data line, and the transfer pad. The active pattern is disposed on the data line, the transfer pad, the substrate, the source electrode, and the drain electrode. With the disposition of the active pattern on the source electrode and the drain electrode, the source electrode and the drain electrode are free from the bombardment of the plasma.

Abstract: The present disclosure discloses a panel structure of flat displays and the manufacturing method thereof. The panel structure includes a first signal line, a second signal line, a transparent conductive film, and a scanning line. The transparent conductive film includes a first branch, a second branch, and a third branch. A first end of the first branch and a first end of the second branch are connected by a predetermined first angle, and a second end of the second branch and a first end of the third branch are connected by a predetermined second angle. The first branch, the second branch, and the third branch form the arch-shaped frame. The first signal line connects to the second end of the first branch, and the second signal line connects to the second end of the third branch. The scanning line passes through the arch-shaped frame along a first direction.

Abstract: The present invention proposes an array substrate and a method for fabricating the same. According to the array substrate and the method of fabricating the array substrate in the present invention, the IGZO pattern and the first electrode strip, the first channel, and the second metallic layer in the corresponding section form the first transistor of the CMOS inverter, and the OSC pattern and the second electrode strip, the second channel, and the second metallic layer in the corresponding section form the second transistor of the CMOS inverter. In this way, the CMOS inverter or the CMOS ring oscillator is fabricated based on IGZO and OSC.

Abstract: Disclosed is a voltage conversion circuit, display panel, and method for driving the display panel. The voltage conversion circuit comprises: a voltage-dividing unit which receives a voltage of a data signal of a main pixel region, and divides the voltage of the data signal of the main pixel region so as to output an intermediate voltage, and a reverse unit which, under control of a first clock signal and a second clock signal, inversely converts the intermediate voltage to a voltage of the data signal of a sub pixel region, rendering polarity of a pixel voltage of the sub pixel region and polarity of a pixel voltage of the main pixel region opposite to each other.

Abstract: The present invention provides a manufacture method of a TFT array substrate and a TFT array substrate structure, and the TFT array substrate structure comprises a substrate (1), a first metal electrode (2) on the substrate (1), a gate isolation layer (3) positioned on the substrate (1) and completely covering the first metal electrode (2), an island shaped semiconductor layer (4) on the gate isolation layer (3), a second metal electrode (6) on the gate isolation layer (3) and the island shaped semiconductor layer (4), a protecting layer (8) on the second metal electrode (6), a color resist layer (7) on the protecting layer (8), a protecting layer (12) on the color resist layer (7) and a first pixel electrode layer (9) on the protecting layer (12); a via (81) is formed on the protecting layer (8), the color resist layer (7) and the protecting layer (12), and an organic material layer (10) fills the inside of the via (81).

Abstract: A flexible array substrate structure and manufacturing method thereof are disclosed, in which the patterning process of an organic semi-conductive layer is achieved by using the inside wall of the opening of a color film layer as a bank, so that one mask can be saved. Also, a process for manufacturing a device can be simplified by an improved device structure, so that the flexible array substrate structure of the invention can be obtained by only using four masks.

Abstract: The present invention discloses an organic thin film transistor array substrate and a fabrication method thereof. The fabrication method is that a metal layer is first deposited successively on a substrate and followed by depositing a layer of Indium Tin Oxide (ITO), and then a photoresist layer is covered thereon to form a data line, a source electrode, a drain electrode and a pixel electrode by a first mask process. Subsequently, an organic semiconductor layer, a gate electrode, a scanning line, and a passivation layer are formed successively. Finally, a region where the pixel electrode, i.e. an anode of an OLED device, is situated and covered with the passivation layer is excavated an opening and allowing the underlying pixel electrode to be exposed to the outside. Then, a layer of OLED material is deposited on the exposed ITO pixel electrode to form an OLED device.

Abstract: A liquid crystal display panel is disclosed and has data lines, scanning lines and pixel units. Each pixel units includes a first sub-pixel unit and a second sub-pixel unit. A top electrode of a first storage capacitor of the first sub-pixel unit is connected to a common electrode; a bottom electrode plate of the first storage capacitor is connected to a pixel electrode of the corresponding pixel unit. A top electrode of a second storage capacitor of the second sub-pixel unit is connected to a pixel electrode of the corresponding pixel unit; and a bottom electrode plate of the second storage capacitor is connected to the common electrode.