Patents by Inventor Hoon Ahn

Hoon Ahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190157150
    Abstract: A semiconductor device, comprising: a substrate which includes an active circuit region, and a boundary region surrounding the active circuit region, the boundary region including an edge portion of the substrate; a first lower conductive pattern disposed on the substrate of the boundary region; and a first upper conductive pattern connected to the first lower conductive pattern over the first lower conductive pattern, wherein the first upper conductive pattern includes a first portion having a first thickness, a second portion having a second thickness greater than the first thickness, and a third portion having a third thickness greater than the second thickness, and the third portion of the first upper conductive pattern is connected to the first lower conductive pattern, is provided.
    Type: Application
    Filed: June 12, 2018
    Publication date: May 23, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung Il PARK, Jeong Hoon AHN, Joon-Nyung LEE
  • Publication number: 20190157198
    Abstract: A semiconductor device includes a first electrode which includes a first main portion, and a first extension that extends from the first main portion, and a dielectric layer which surrounds a sidewall and a bottom surface of the first main portion, wherein the first main portion includes a first portion having a first depth, and a second portion having a second depth deeper than the first depth.
    Type: Application
    Filed: June 22, 2018
    Publication date: May 23, 2019
    Inventors: JOON-NYUNG LEE, JEONG-HOON AHN
  • Publication number: 20190148289
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including a lower wiring, a first interlayer insulating film disposed on the substrate and including a first region and a second region over the first region, an etch stop film on the first interlayer insulating film, a second interlayer insulating film on the etch stop film, a first upper wiring in the second interlayer insulating film, the etch stop film, and the second region of the first interlayer insulating film and the first upper wiring is spaced apart from the lower wiring and a via in the first region of the first interlayer insulating film, and the via connects the lower wiring and the first upper wiring, wherein the first upper wiring includes a first portion in the second interlayer insulating film, and a second portion in the etch stop film and the second region of the first interlayer insulating film, and a sidewall of the second portion of the first upper wiring includes a stepwise shape.
    Type: Application
    Filed: May 23, 2018
    Publication date: May 16, 2019
    Inventors: Hoon Seok SEO, Jong Min BAEK, Su Hyun BARK, Sang Hoon AHN, Hyeok Sang OH, Eui Bok LEE
  • Patent number: 10283981
    Abstract: A protection IC includes a bias output terminal connected to a back gate of a MOS transistor, a load side terminal connected to a power supply path between a load and the MOS transistor, a load side switch inserted in an electric current path connecting the bias output terminal and the load side terminal, and a control circuit configured to control the load side switch based on a state of a secondary battery and thereby cause a back gate control signal for controlling a voltage of the back gate to be output from the bias output terminal. The load side switch is formed on an N-type silicon substrate and includes at least two NMOS transistors whose drains are connected to each other, and the control circuit is configured to simultaneously turn on or turn off the two NMOS transistors based on the state of the secondary battery.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: May 7, 2019
    Assignees: MITSUMI ELECTRIC CO., LTD., ITM Semiconductor Co., Ltd.
    Inventors: Shuhei Abe, Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn
  • Patent number: 10276505
    Abstract: An integrated circuit (IC) device includes a lower wiring structure including a lower metal film. The lower wiring structure penetrates at least a portion of a first insulating film disposed over a substrate. The IC device further includes a capping layer covering a top surface of the lower metal film, a second insulating film covering the capping layer, an upper wiring structure penetrating the second insulating film and the capping layer, and electrically connected to the lower metal film, and an air gap disposed between the lower metal film and the second insulating film. The air gap has a width defined by a distance between the capping layer and the upper wiring structure.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: April 30, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Bae Kim, Sang-Hoon Ahn, Eui-Bok Lee, Su-Hyun Bark, Hyeok-Sang Oh, Woo-Jin Lee, Hoon-Seok Seo, Sung-Jin Kang
  • Patent number: 10258370
    Abstract: The present invention relates to a laparoscopic port unit module in which one end thereof and the other end are placed inside and outside the human body, respectively, through the vaginal inlet, and provides a vaginal endoscopic port unit module comprising: an outer unit of which the end is exposed to the outside of the vaginal inlet and which comprises one or more outer ports allowing the entry of a surgical instrument including an endoscope; an inner unit formed at the inner wall of the vaginal canal so as to be placed at an incision region connected to the abdominal cavity and allowing the surgical instrument entering through the outer port to come in and out of the abdominal cavity; and a runner unit for connecting the outer unit and the inner unit.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: April 16, 2019
    Assignee: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventor: Ki Hoon Ahn
  • Patent number: 10263242
    Abstract: Provided is an anode for a lithium secondary battery composed of a multi-layered structure including an electrode current collector, a first anode active material layer including a first anode active material formed on the electrode current collector, and a second anode active material layer including a second anode active material having relatively lower press density and relatively larger average particle diameter than the first anode active material. Since an anode according to an embodiment of the present invention may include a multi-layered active material layer including two kinds of anode active materials having different press densities and average particle diameters on an electrode current collector, porosity of the surface of the electrode may be improved even after a press process to improve ion mobility into the electrode. Thus, charge characteristics and cycle life of a lithium secondary battery may be improved.
    Type: Grant
    Filed: January 11, 2017
    Date of Patent: April 16, 2019
    Assignee: LG Chem, Ltd.
    Inventors: Byoung Hoon Ahn, Joon Sung Bae, Chang Wan Koo
  • Patent number: 10250165
    Abstract: Disclosed is a high speed actuator. The high speed actuator includes an actuation part configured to cause deformation such as bending or twisting and an active stiffness controller on a surface of the actuation part or in the actuation part configured to control in real time a stiffness (e.g., of the actuator) according to an external signal. The active stiffness controller may control a stiffness of the high speed actuator in order for the actuator to be actuated at a high speed. Moreover, since the stiffness of the actuator is controlled in real time, a speed of the actuator may be controlled in real time.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: April 2, 2019
    Assignee: SNU R&DB Foundation
    Inventors: Sung Hoon Ahn, Sung Hyuk Song
  • Publication number: 20190098579
    Abstract: An electronic device is provided. The electronic device includes a first communication circuit, a second communication circuit, a processor configured to be electrically connected with the first communication circuit and the second communication circuit, and a memory configured to be electrically connected with the processor. The memory includes instructions, when executed by the processor, cause the processor to obtain location information of the electronic device, transmit a first message for requesting to change a state of the electronic device to a network, receive a first response message to the transmitted first message from the network, transmit a second message for requesting a parameter for an operation cycle of the second communication circuit to the network, receive a second response message to the second message from the network, and change the operation cycle of the second communication circuit to a value corresponding to a current state of the electronic device.
    Type: Application
    Filed: September 18, 2018
    Publication date: March 28, 2019
    Inventors: Ji Young CHA, Hye Jeong KIM, Jung Hoon AHN
  • Publication number: 20190086421
    Abstract: The present invention relates to a method for producing an animal model of preterm birth and an animal model of preterm birth produced by the method. The animal model of the present invention can be effectively applied to investigate the causes and symptoms of preterm birth induced by cervical injury. The mortality rate of the animal model according to the present invention is low until preterm birth despite its induced preterm birth. In addition, the animal model of the present invention is produced in a higher yield than any other existing model. Furthermore, the preterm birth of the animal model according to the present invention is induced at a desired time point. Due to these advantages, the animal model of the present invention can be effectively applied to investigate the causes and mechanisms of preterm birth. The mortality rate of premature neonates born from the animal model of the present invention is considerably low and the premature neonates are immature.
    Type: Application
    Filed: April 18, 2017
    Publication date: March 21, 2019
    Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventor: Ki Hoon AHN
  • Patent number: 10229876
    Abstract: A wiring structure includes a substrate, a lower insulation layer on the substrate, a lower wiring in the lower insulation layer, a first etch-stop layer covering the lower wiring and including a metallic dielectric material, a second etch-stop layer on the first etch-stop layer and the lower insulation layer, an insulating interlayer on the second etch-stop layer, and a conductive pattern extending through the insulating interlayer, the second etch-stop layer and the first etch-stop layer and electrically connected to the lower wiring.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: March 12, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Jung Kim, Young-Bae Kim, Jong-Sam Kim, Jin-Hyeung Park, Jeong-Hoon Ahn, Hyeok-Sang Oh, Kyoung-Woo Lee, Hyo-Seon Lee, Suk-Hee Jang
  • Publication number: 20190075509
    Abstract: The present disclosure relates to a scheduling method and apparatus of a wireless network and a scheduling method of a wireless network is a scheduling method of a wireless network including a plurality of nodes, the method including: generating a broadcast tree to transmit data from a source node to a sink node, dividing nodes included in the broadcast tree into a primary node which does not allow collision and a secondary node which allows collision at the time of receiving data, in accordance with predetermined criteria; and allocating a time slot in which nodes included in the broadcast tree operate, based on the divided result.
    Type: Application
    Filed: September 4, 2018
    Publication date: March 7, 2019
    Applicant: Research & Business Foundation Sungkyunkwan University
    Inventors: Hyunseung CHOO, Hyo Hoon AHN, Duc-Tai LE
  • Patent number: 10217820
    Abstract: Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation pattern, and may have a sidewall inclined by an angle in a range of about 80 degrees to about 135 degrees to a top surface of the substrate. The barrier layer may cover a top surface and the sidewall of each if the conductive patterns. The insulating interlayer may be formed on the diffusion prevention insulation pattern and the barrier layer, and may have an air gap between neighboring ones of the conductive patterns.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: February 26, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Rak-Hwan Kim, Byung-Hee Kim, Jong-Min Baek, Sang-Hoon Ahn, Nae-In Lee, Jong-Jin Lee, Ho-Yun Jeon, Eun-Ji Jung
  • Publication number: 20190051887
    Abstract: The present disclosure relates to a carbon nanotube dispersion including entangled-type carbon nanotubes, a dispersion medium, and partially hydrogenated nitrile rubber having a residual double bond (RDB) value of 0.5% by weight to 40% by weight calculated according to the following Mathematical Formula 1, wherein dispersed particle diameters of the carbon nanotubes have particle size distribution D50 of 2 ?m to 5 ?m, a method for preparing the same, and methods for preparing electrode slurry and an electrode using the same.
    Type: Application
    Filed: August 26, 2016
    Publication date: February 14, 2019
    Inventors: Houngsik YOO, Jong Won LEE, Dong Hyun KIM, Gyemin KWON, Byoung Hoon AHN, Yelin KIM, Sang Hoon CHOY, Hyeon CHOI, Jungkeun YOO
  • Publication number: 20190043803
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate comprising a lower wire, an etch stop layer on the substrate, an interlayer insulating layer on the etch stop layer, an upper wire disposed in the interlayer insulating layer and separated from the lower wire and a via formed in the interlayer insulating layer and the etch stop layer and connecting the lower wire with the upper wire, wherein the via comprises a first portion in the etch stop layer and a second portion in the interlayer insulating layer, and wherein a sidewall of the first portion of the via increases stepwise.
    Type: Application
    Filed: December 13, 2017
    Publication date: February 7, 2019
    Inventors: Woo Kyung YOU, Eui Bok LEE, Jong Min BAEK, Su Hyun BARK, Jang Ho LEE, Sang Hoon AHN, Hyeok Sang OH
  • Patent number: 10192782
    Abstract: A method of manufacturing the semiconductor device includes providing a first interlayer dielectric layer having a conductive pattern, sequentially forming a first etch stop layer, a second etch stop layer, a second interlayer dielectric layer and a mask pattern on the first interlayer dielectric layer, forming an opening in the second interlayer dielectric layer using the mask pattern as a mask, the opening exposing the second etch stop layer, and performing an etching process including simultaneously removing the mask pattern and the second etch stop layer exposed by the opening to expose the first etch stop layer.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: January 29, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woojin Lee, VietHa Nguyen, Wookyung You, Doo-Sung Yun, Hyunbae Lee, Byunghee Kim, Sang Hoon Ahn, Seungyong Yoo, Naein Lee, Hoyun Jeon
  • Publication number: 20190020016
    Abstract: Disclosed is a method for preparing positive electrode active material slurry, which includes the steps of: (S1) preparing a positive electrode active material, a linear conductive material, a polymer binder and a solvent; (S2) introducing 40-80% of the prepared polymer binder, the positive electrode active material and the linear conductive material to the solvent, followed by mixing, to obtain a first positive electrode active material slurry; and (S3) further introducing the remaining polymer binder to the first positive electrode active material slurry, followed by mixing, to obtain a second positive electrode active material slurry.
    Type: Application
    Filed: November 16, 2017
    Publication date: January 17, 2019
    Applicant: LG CHEM, LTD.
    Inventors: Byoung-Hoon AHN, Sang-Hoon CHOY, Hyun-Sik CHAE
  • Publication number: 20190019759
    Abstract: A semiconductor device includes an element layer, a plurality of first interconnect lines on the element layer, a first insulation layer including carbon having a uniform concentration distribution between the first interconnect lines, a plurality of second interconnect lines spaced from the first interconnect lines, and a second insulation layer between the second interconnect lines. An air spacing is included between the second interconnect lines.
    Type: Application
    Filed: September 19, 2018
    Publication date: January 17, 2019
    Inventors: Sang Hoon AHN, Tae Soo KIM, Jong Min BAEK, Woo Kyung YOU, Thomas OSZINDA, Byung Hee KIM, Nae In LEE
  • Patent number: 10179884
    Abstract: Disclosed are a device and a method for manufacturing a natural gas hydrate. Provided is the device for manufacturing a natural gas hydrate comprising: an ice slurry generation unit for preparing ice slurry having 13-20% of ice at normal pressure; a first pipe, having one end connected to the ice slurry generation unit for withdrawing the ice slurry from the ice slurry generation unit, and in which a high-pressure pump for increasing pressure on the ice slurry is interposed; a hydrate preparation reactor, which is connected to the other end of the first pipe so as to receive the pressurized ice slurry, and to which natural gas is supplied and mixed, for generating natural gas hydrate slurry; a second pipe, having one end connected to the hydrate preparation reactor, for withdrawing the natural gas hydrate slurry; and a dehydrating portion, which is connected to the other end of the second pipe, for dehydrating the natural gas hydrate slurry.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: January 15, 2019
    Assignees: Daewoo Engineering & Construction Co., Ltd., Samsung Heavy Ind. Co., Ltd., Sung-Il Turbine Co., Ltd., Dongguk University Industry-Academic Cooperation Foundation
    Inventors: Myung Ho Song, Yong Seok Yoon, Hye Jung Hong, Jung Huyk Ahn, Mun Keun Ha, Seok Ku Jeon, Hoon Ahn, Ta Kwan Woo
  • Publication number: 20180373218
    Abstract: A device and a method for common type conversion of a PLC control program are disclosed. The device for common type conversion of a PLC control program according to an embodiment of the present invention comprises: a common command library construction unit for constructing a common command library by generating, using a common command generation algorithm, a common command for commands used in text-based PLC control programs having different types; and a common type conversion unit for converting an arbitrary text-based PLC control program into a common type PLC control program by using the common command library, in accordance with the arbitrary text-based PLC control program requested to be converted into a common type being able to be converted into a common type PLC control program.
    Type: Application
    Filed: August 26, 2016
    Publication date: December 27, 2018
    Inventors: Gi Nam WANG, Seung Hoon AHN, Jun Pyo PARK, Seok Myung JIN, Ho Chul PARK