Abstract: A method of manufacturing a semiconductor device includes forming grooves in a first dielectric layer on a substrate, the first dielectric layer including a first part between the grooves, forming a first barrier layer and an interconnect layer in each groove, recessing the interconnect layer and the first barrier layer, forming a capping pattern on the recessed interconnect layer, etching at least a portion of the first part by a first etching process, sequentially etching the capping pattern and the at least a portion of the IMD part by a second etching process to form a trench, conformally forming a second barrier layer in the trench and on the recessed interconnection layer, and forming a second dielectric layer on the second barrier layer not to fill the trench such that an air gap is formed in the trench.

Abstract: Method and system for adaptive image compression using block characteristics are provided. For adaptive image compression, blocks in an image are quantized and compressed using a quantization table that was used in quantization of the blocks. An image compression system checks a block-characteristics quantization table corresponding to a specific block in the image to be compressed in order to quantize the specific block, and performs calculation using a value of a first element of the quantization table corresponding to a specific element of the specific block and a value of a second element of the checked block-characteristics quantization table corresponding to the specific element in order to quantize the specific element.

Abstract: A pedestal of a CVD apparatus includes a raised central portion, a peripheral portion extending around the central portion, and a carrier ring support disposed along the peripheral portion. A carrier ring of the CVD apparatus includes an annular body disposed over the peripheral portion of the pedestal. The carrier ring is mounted to the pedestal by virtue of the carrier ring support, and in such a way that a lower surface of the annular body is spaced vertically from the peripheral portion of the pedestal and the carrier ring is separable from the pedestal in a vertical direction. A drive mechanism cooperates with carrier ring to lift the carrier ring of the pedestal and mount the carrier ring back onto the pedestal.

Abstract: A semiconductor device includes an insulating interlayer on a first region of a substrate. The insulating interlayer has a recess therein and includes a low-k material having porosity. A damage curing layer is formed on an inner surface of the recess. A barrier pattern is formed on the damage curing layer. A copper structure fills the recess and is disposed on the barrier pattern. The copper structure includes a copper pattern and a copper-manganese capping pattern covering a surface of the copper pattern. A diffusion of metal in a wiring structure of the semiconductor device may be prevented, and thus a resistance of the wiring structure may decrease.

Abstract: Provided is a battery protection circuit package capable of effectively preventing overcurrent and overheating and of being implemented at low costs in a compact size, the battery protection circuit package including a first terminal and a second terminal electrically connected to electrode terminals of a battery bare cell, a third terminal and a fourth terminal electrically connected to a charger or an electronic device, a first protection circuit module including one or more first transistors connected between at least one of the first and second terminals and at least one of the third and fourth terminals, and a first protection integrated circuit (IC) for controlling the one or more first transistors, and a second protection circuit module including one or more second transistors connected between at least one of the first and second terminals and at least one of the third and fourth terminals and connected in series to the one or more first transistors, and a second protection IC for controlling the one

Abstract: The present disclosure relates to content streaming. An electronic device includes a processor configured to execute an application that communicates with a server using a pre-defined secure protocol. The electronic device also includes both a communication circuit configured to receive content associated with the application through a first network from a server, and a buffer configured to store the received content. The communication circuit determines a state of the buffer, and terminates a session established between the electronic device and the server based on the state of the buffer and signal state of a second network. The communication circuit also establishes a new session between the electronic device and the server through the second network. The communication circuit also measures a data throughput of the second network for the server during a measuring time, and, if the measured data throughput meets a condition, receives the content through the second network.

Abstract: A method of updating a grammar model used during speech recognition includes obtaining a corpus including at least one word, obtaining the at least one word from the corpus, splitting the at least one obtained word into at least one segment, generating a hint for recombining the at least one segment into the at least one word, and updating the grammar model by using at least one segment comprising the hint.

Abstract: A speech recognition method and an apparatus which recognize speech, based on speaker recognition, and output a result of the speech recognition are provided. The speech recognition method includes activating a session for receiving an input of an audio signal, performing speech recognition on a speech signal detected from the input audio signal while the session is maintained, determining whether a speaker of the speech signal is a registered speaker based on speaker information generated from the speech signal, determining whether to maintain the session based on a result of the determination, and outputting a result of performing the speech recognition.

Abstract: A method of manufacturing a semiconductor device includes forming grooves in a first dielectric layer on a substrate, the first dielectric layer including a first part between the grooves, forming a first barrier layer and an interconnect layer in each groove, recessing the interconnect layer and the first barrier layer, forming a capping pattern on the recessed interconnect layer, etching at least a portion of the first part by a first etching process, sequentially etching the capping pattern and the at least a portion of the IMD part by a second etching process to form a trench, conformally forming a second barrier layer in the trench and on the recessed interconnection layer, and forming a second dielectric layer on the second barrier layer not to fill the trench such that an air gap is formed in the trench.

Abstract: The present disclosure generally discloses single-aperture multi-sensor lensless compressive image acquisition capabilities. The present disclosure generally discloses a single-aperture multi-sensor lensless camera including a programmable aperture and a set of sensors. The programmable aperture is configured to modulate an amount of light permitted to pass through the programmable aperture and has a shape defined based on a set of vertices of the programmable aperture. The sensors are arranged, with respect to each other, based on the vertices of the programmable aperture. The sensors may be arranged such that respective reference lines, between the respective vertices of the programmable aperture and the respective sensors, are parallel or substantially parallel.

Abstract: A secondary battery protection circuit includes a first terminal connected to a power supply path between a secondary battery and a MOS transistor, a second terminal connected to the power supply path between a load and the MOS transistor, a third terminal connected to a gate of the MOS transistor, a fourth terminal connected to a back gate of the MOS transistor, a control circuit that outputs a switch control signal based on a detected abnormal state of the secondary battery, and a switch control circuit including a first switch for connecting the fourth terminal with the first terminal and a second switch for connecting the fourth terminal with the second terminal. At least one of the resistance between the fourth terminal and the first terminal and the resistance between the fourth terminal and the second terminal is greater than the on resistance value of the MOS transistor.

Abstract: A protection IC includes a bias output terminal connected to a back gate of a MOS transistor, a load side terminal connected to a power supply path between a load and the MOS transistor, a load side switch inserted in an electric current path connecting the bias output terminal and the load side terminal, and a control circuit configured to control the load side switch based on a state of a secondary battery and thereby cause a back gate control signal for controlling a voltage of the back gate to be output from the bias output terminal. The load side switch is formed on an N-type silicon substrate and includes at least two NMOS transistors whose drains are connected to each other, and the control circuit is configured to simultaneously turn on or turn off the two NMOS transistors based on the state of the secondary battery.

Abstract: A semiconductor device may include a plurality of wiring structures spaced apart from each other, a protection pattern including a metal nitride on each of the wiring structures, a spacer on a sidewall of the protection pattern, and an insulating interlayer structure containing the wiring structures and having an air gap between the wiring structures.