Abstract: A first memory section is disposed on a substrate. A second memory section is vertically stacked on the first memory section. The first memory section is provided between the substrate and the second memory section. The first memory section includes a flash memory cell structure, and the second memory section includes a variable resistance memory cell structure. The flash memory cell structure includes at least one cell string comprising a plurality of first memory cells connected in series to each other and a bit line on the substrate connected to the at least one cell string. The bit line is interposed vertically between the at least one cell string and the second memory section and connected to the second memory section.

Abstract: A semiconductor device includes a memory cell region including memory cells arranged along channel holes, the channel holes being provided on a substrate to extend in a direction perpendicular to an upper surface of the substrate, and a peripheral circuit region disposed outside of the memory cell region and including low voltage transistors and high voltage transistors. The low voltage transistors include first transistors including a first gate dielectric layer and a first gate electrode layer including a metal, and the high voltage transistors include second transistors including a second gate dielectric layer having a dielectric constant lower than a dielectric constant of the first gate dielectric layer, and a second gate electrode layer including polysilicon.

Abstract: A method of operating a hub used in an internet of things (IoT) network system which includes a first controller and an IoT device is provided. The method includes: performing secure pairing with the first controller using a first communication, receiving first information related to the IoT device from the first controller paired with the hub, authenticating the first controller using the first information, and performing secure pairing with the IoT device using a second communication.

Abstract: In an embodiment of the present invention, a positive active material for a lithium secondary battery is represented by Formula 1, and includes a core including a compound having a core portion and a surface portion, and the compound has a lower L3/L2 intensity ratio of Ni in the surface portion than an L3/L2 intensity ratio of Ni in the core portion. Li[LizA(1-z-a)Da]EbO2-b ??[Formula 1] (In the above formula (1), A is Ni?Co?Mn?, D is at least one element selected from the group consisting of Na, K, Mg, Ca, Sr, Ni, Co, Ti, Al, B, Si, Sn, Mn, Cr, Fe, V, Zr, Nb, and Mo, E is at least one element selected from the group consisting of P, F, and S, ?0.05?z?0.1, 0?a?0.05, 0?b?0.05, 0.3???0.9, 0.05???0.4, and 0.05???0.4.) (The L3/L2 intensity ratio of Ni is the oxidation number of Ni measured by electronic energy loss spectroscopy (EELS).

Abstract: An imaging system includes an indicator installed around an antenna, wherein optical characteristics of the indicator change as a function of an electromagnetic field formed by the antenna, an imaging apparatus for imaging a change in optical characteristics of the indicator, a transmitter for radiating radio waves toward the antenna, and a receiver for receiving a signal from the antenna.

Abstract: The present invention describes a component for a secondary battery and a manufacturing method thereof, and a secondary battery manufactured by using the component. The component for a secondary battery according to the present invention comprises a lead-free soldering bridge having a melting point of 150 to 300° C. and containing tin (Sn) and copper (Cu) as a main ingredient; the first and second metal plates spaced therebetween through a gap and coupling with the lead-free soldering bridge. According to the present invention, when an over-current flows through the component for a secondary battery, the temperature of the lead-free soldering bridge is locally increased rapidly to melt the lead-free soldering bridge, thereby efficiently interrupting the flow of an over-current.

Abstract: An encryption security protocol-based communication method of supporting integrity verification between a client and a server includes receiving, by the server, a first message from the client, the first message including a request for a first integrity verification of the client so as to start a handshake of a transport layer security (TLS) connection, transmitting, by the server, a second message to the client, the second message including a request for first verification information for the first integrity verification, receiving, by the server, the first verification information from the client, and performing the first integrity verification by using the first verification information, and finishing the handshake and performing data communication between the client and the server based on a result of the first integrity verification.

Abstract: A substrate inspection apparatus according to an embodiment of the present invention comprises a projection unit, an illumination unit, an image acquisition unit and a processing unit. The projection unit irradiates an inspection target with light for obtaining three-dimensional shape information of the inspection target. The illumination unit irradiates the inspection target with at least two lights having different colors. The image acquisition unit acquires a first image by receiving light irradiated by the projection unit and reflected from the inspection target, and a second image by receiving the lights irradiated by the illumination unit and reflected from the inspection target. The processing unit acquires brightness information and color information from the first image and the second image, respectively, which are acquired by the image acquisition unit, and acquires at least a portion of a boundary by using the bright information and the color information.

Abstract: The present invention relates to a cage assembly for spinal interbody fusion comprising: a main body which is inserted between a vertebral body of a spine from which a disc is removed, and a neighboring vertebral body; a first screw part which is formed on the upper surface of the main body, and which has a spiral shape formed along a first direction heading outward from the center; a second screw part which is formed on the lower surface of the main body, and which has a spiral shape formed along a second direction heading outward from the center; and a space part which is formed to penetrate the upper surface and the lower surface of the main body, and which enables the bones forming the vertebral body and the neighboring vertebral body to fuse together. The purpose of the present invention is to promote the smooth progress of surgery for the bone fusion of two neighboring vertebral bodies, or more than two vertebral bodies, forming the spine.

Abstract: A method of verifying integrity of an Internet of Things (IoT) system including a hub device and a plurality of end-node devices includes: determining, by the hub device, a root device among the plurality of end-node devices; receiving, by the hub device, from the root device at least one root message authentication code generated based on a result of verifying integrity of a sub-tree of the root device, wherein the sub-tree of the root device comprises a subset of the plurality of end-node devices subordinate to the root device; and verifying, by the hub device, the at least one root message authentication code.

Abstract: The present invention relates to a metal oxide powder, a method of preparing the same, and a lithium secondary battery using the same, which comprises: a metal oxide powder is represented by Formula (1), Lix(M1-m-zAmDz)Ot??Formula (1) in the above Formula (1), 0.85?x?1.2, 0?m?0.01, 0<z?0.04, 1.85?t?2.2, M is selected from the group consisting of Ni, Co, Mn and combinations thereof, A is selected from the group consisting of Mg, Ca, Sr, Ba and combinations thereof, D is selected from the group consisting of Ti, Zr, Ce, Ge, Sn and combinations thereof, and E is an average oxidation number of A and D, and E>3.5.

Abstract: Integrated circuit devices may include a substrate including a flash memory region and a variable resistance memory region, a flash memory cell transistor including a cell gate electrode that overlaps the flash memory region of the substrate, a variable resistance element that overlaps the variable resistance memory region of the substrate, and a select transistor including a select source/drain region that is disposed in the variable resistance memory region of the substrate. The select source/drain region may be electrically connected to the variable resistance element. The substrate may include an upper surface facing the cell gate electrode and the variable resistance element, and the upper surface of the substrate may continuously extend from the flash memory region to the variable resistance memory region.

Abstract: A first memory section is disposed on a substrate. A second memory section is vertically stacked on the first memory section. The first memory section is provided between the substrate and the second memory section. The first memory section includes a flash memory cell structure, and the second memory section includes a variable resistance memory cell structure. The flash memory cell structure includes at least one cell string comprising a plurality of first memory cells connected in series to each other and a bit line on the substrate connected to the at least one cell string. The bit line is interposed vertically between the at least one cell string and the second memory section and connected to the second memory section.

Abstract: A semiconductor device includes a memory cell region including memory cells arranged along channel holes, the channel holes being provided on a substrate to extend in a direction perpendicular to an upper surface of the substrate, and a peripheral circuit region disposed outside of the memory cell region and including low voltage transistors and high voltage transistors, The low voltage transistors include first transistors including a first gate dielectric layer and a first gate electrode layer including a metal, and the high voltage transistors include second transistors including a second gate dielectric layer having a dielectric constant lower than a dielectric constant of the first gate dielectric layer, and a second gate electrode layer including polysilicon.

Abstract: There are provided a cathode active material for a lithium secondary battery, a method of preparing the same, and a lithium secondary battery containing the same. The cathode active material for a lithium secondary battery includes: a core made of a compound reversibly intercalating and deintercalating lithium; and a coating layer positioned on at least a portion of a surface of the compound, wherein the coating layer is a composite coating layer containing Li3PO4 and LiF, and further containing a lithium metal compound, a metal oxide, a metal fluoride compound, and/or a combination thereof, and the core is doped with fluorine.

Abstract: An electronic device includes: a processor configured to obtain a first authentication key based on first data and a first authentication message, verify the first authentication message based on the first authentication key, obtain a second authentication key based on second data and a second authentication message, and verify the second authentication message based on the second authentication key; and a memory configured to store the first data, the first authentication message, the first authentication key, the second data, the second authentication message, and the second authentication key, wherein the second authentication message and the second authentication key are different from the first authentication message and the first authentication key, respectively, and the first authentication key and the second authentication key are associated with a first end device and a second end device, respectively.

Abstract: Provided is a method for increasing a driving current of a junctionless transistor that includes: a substrate; a source region and a drain region which are formed on the substrate and are doped with the same type of dopant; a nanowire channel region which connects the source region and the drain source and is doped with the same type dopant as that of the source region and the drain region; a gate insulation layer which is formed to surround the nanowire channel region; and a gate electrode which is formed on the gate insulation layer and is formed to surround the nanowire channel region. An amount of current flowing through the nanowire channel region is increased by joule heat generated by applying a voltage to the source region and the drain region.

Abstract: In a method of performing secure communication between at least two devices, a first security session is formed between a first device and a second device while the first device operates in a secure mode. The first security session is formed by performing a handshake operation between the first device and the second device. Session information and a master key are stored into a secure element included in the first device. The session information and the master key are generated by forming the first security session. A second security session is formed between the first device and the second device while the first device operates in a normal mode. The second security session is formed without the handshake operation and by loading the session information stored in the secure element. Encoded data is exchanged by the first device and the second device through the second security session based on the master key stored in the secure element.

Abstract: Provided is a method for increasing a driving current of a junctionless transistor that includes: a substrate; a source region and a drain region which are formed on the substrate and are doped with the same type of dopant; a nanowire channel region which connects the source region and the drain source and is doped with the same type dopant as that of the source region and the drain region; a gate insulation layer which is formed to surround the nanowire channel region; and a gate electrode which is formed on the gate insulation layer and is formed to surround the nanowire channel region. An amount of current flowing through the nanowire channel region is increased by joule heat generated by applying a voltage to the source region and the drain region.

Abstract: An imaging system includes an indicator installed around an antenna, wherein optical characteristics of the indicator change as a function of an electromagnetic field formed by the antenna, an imaging apparatus for imaging a change in optical characteristics of the indicator, a transmitter for radiating radio waves toward the antenna, and a receiver for receiving a signal from the antenna.