Patents by Inventor HSIANG-AN WEN

HSIANG-AN WEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240133421
    Abstract: An electronic device includes a monitor stand, a hinge mechanism, and an operation element. The hinge mechanism includes a back plate, a speed reduction assembly, and a friction assembly. The back plate is fixed to the monitor stand. The speed reduction assembly includes an input plate and a speed reduction member. The speed reduction member is arranged on the input plate. The friction assembly is arranged between the back plate and the input plate. The operation element is connected to the speed reduction member. A rotation center of the operation element coincides with an axis of the back plate and the speed reduction member are coaxially arranged.
    Type: Application
    Filed: January 17, 2023
    Publication date: April 25, 2024
    Inventors: Chih-Wei KUO, Yu-Chun HUNG, Che-Yen CHOU, Chen-Wei TSAI, Hsiang-Wen HUANG
  • Publication number: 20240134538
    Abstract: A memory operation method, comprising: when a first super block of a memory device is a open block (or in programming state), obtaining a first read count of one of a plurality of first memory blocks in the first super block, wherein the first read count is a number of times that data of one of the first memory blocks is read out; determining whether the first read count is larger than a first threshold; and when the first read count is larger than the first threshold, moving a part of the data in the first super block to a safe area in the memory device, wherein the part of the data comprises data in the first memory block.
    Type: Application
    Filed: June 5, 2023
    Publication date: April 25, 2024
    Inventors: Po-Sheng CHOU, Hsiang-Yu HUANG, Yan-Wen WANG
  • Patent number: 11968906
    Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a contact hole in the first IMD layer; forming a bottom electrode layer in the contact hole; forming a magnetic tunneling junction (MTJ) stack on the bottom electrode layer; and removing the MTJ stack and the bottom electrode layer to form a MTJ on a bottom electrode. Preferably, the bottom electrode protrudes above a top surface of the first IMD layer.
    Type: Grant
    Filed: May 25, 2020
    Date of Patent: April 23, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jin-Yan Chiou, Wei-Chuan Tsai, Hsin-Fu Huang, Yen-Tsai Yi, Hsiang-Wen Ke
  • Publication number: 20240126123
    Abstract: This disclosure provides an electronic device and a manufacturing method thereof. The electronic device includes a first substrate, a second substrate, a first supporting member and a plurality of second supporting members. The first supporting member and the second supporting members are disposed between the first substrate and the second substrate. The first supporting member includes a first bottom surface and a first top surface. The second supporting member is disposed adjacent to the first supporting member and includes a second bottom surface and a second top surface. The difference between the radius of the first bottom surface and the radius of the first top surface is defined as a first radius bias. The difference between the radius of the second bottom surface and the radius of the second top surface is defined as a second radius bias. The first radius bias is greater than the second radius bias.
    Type: Application
    Filed: September 8, 2023
    Publication date: April 18, 2024
    Applicant: InnoLux Corporation
    Inventors: Chiung-Chieh KUO, Chi-Han HSIEH, Hsiang-Wen HSUEH, Shu-Hung SHEN
  • Publication number: 20240115410
    Abstract: An assistive device structure for positioning and pressure relief is provided, including a first elastic layer and a second elastic layer, which are attached by using a high-frequency encapsulation process, sealing, bagging, thermoforming, or an integrally molding process. Each of the first and second elastic layers has a bottom surface and an arc surface disposed opposite to each other. The arc surface includes two protrusions and a recess formed there in between. The two protrusions have different heights. A hollow area is disposed in the recess of the first and second elastic layers. Based on such structure, the bottom surfaces of the first and second elastic layers are attached to form the proposed assistive device structure for a user to lean against and providing multiple positioning effects and pressure relief. More than four axial directions of supporting forces are generated to effectively enhance muscle relaxation and stress relief.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: SY-WEN HORNG, LONG-YING CHENG, CHI-WEI HUNG, HSIANG-JUNG HUNG, LI-CHE HUNG
  • Patent number: 11942652
    Abstract: The disclosure provides a limit device and a robot using the same. The limit device comprises a first connecting member, a transmission rod and a second connecting member. The first connecting member comprising a first main body portion and two first connecting elements. The two first connecting elements are arranged at intervals. The two first connecting elements are respectively connected to the first main body. The transmission rod comprising a first end and a second end. The first end and the second end are arranged at intervals. The first end penetrates through one of the two first connecting elements. The second end penetrates through the other one of the two first connecting element. The second connecting member provided with two indexing buckles. The two indexing buckles are arranged at intervals, each of the indexing buckles comprises a first limiting groove and a second limiting groove.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: March 26, 2024
    Assignees: Futaijing Precision Electronics (Yantai) Co., Ltd., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Chen-Ting Kao, Chi-Cheng Wen, Yu-Sheng Chang, Chih-Cheng Lee, Chiung-Hsiang Wu, Sheng-Li Yen, Yu-Cheng Zhang, Chang-Ju Hsieh, Chen Chao
  • Publication number: 20240095992
    Abstract: There is provided a graphics primitive assembly circuit comprising an early primitive assembly data generator operable to supply primitive input to a shader and a buffer operable to store early primitive assembly data during operation of the shader and to supply the early primitive assembly data to a late primitive assembly circuit element responsive to completion of operation of the shader. The circuit may also include a compressor that compresses the early primitive assembly data to reduce the amount of storage taken up by the buffer and the bandwidth required to transfer the early primitive assembly data.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 21, 2024
    Applicant: Arm Limited
    Inventors: Naveen Kumar Singh, Hsiang-Wen Chiu
  • Patent number: 11921551
    Abstract: A card riser for an information handling system includes a bottom surface, multiple connector slots in physical communication with the bottom surface, and a locking mechanism in physical communication with the bottom surface. Each connector slot is configured to receive a corresponding connector of a different one of multiple cards. When the locking mechanism is in an unlocked position, a different one of the cards is inserted within a different one of the connector slots. When the locking mechanism is in a locked position, the locking mechanism is placed in physical communication with each of the cards to securely hold the cards within the card riser.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: March 5, 2024
    Assignee: Dell Products L.P.
    Inventors: Hung Wen Wu, Liang-Chun Ma, Hsiang-Yin Hung
  • Publication number: 20230392707
    Abstract: An air valve structure arranged on a base comprises an air plug and a state-switching component. The air plug is arranged in an air chamber in an axial direction. The air plug includes a closing state to close the air hole, and an opening state to open the air hole. The state-switching component comprises a driving member that links the air plug, a shape-memory alloy (SMA) wire connected with the driving member, and at least one conductive member connected with the SMA wire. The driving member exerts an acting force to the air plug based on a condition of electricity provided by the conductive member for the SMA wire. The direction of the acting force is non-parallel with the axial direction and the air plug is moved and changed between the closing state and the opening state by the acting force.
    Type: Application
    Filed: June 1, 2022
    Publication date: December 7, 2023
    Inventors: Tsun-Hsiang WEN, Shih-Chung HSU, Jun XIE, Jian ZENG, Xian-Chang ZOU
  • Publication number: 20230387280
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of forming a buffer layer on a substrate, forming a barrier layer on the buffer layer, forming a p-type semiconductor layer on the barrier layer, forming a titanium nitride (TiN) layer on the p-type semiconductor layer as a nitrogen to titanium (N/Ti) ratio of the TiN layer is greater than 1, forming a passivation layer on the TiN layer and the barrier layer, removing the passivation layer to form an opening, forming a gate electrode in the opening, and then forming a source electrode and a drain electrode adjacent to two sides of the gate electrode on the buffer layer.
    Type: Application
    Filed: June 28, 2022
    Publication date: November 30, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yen-Tsai Yi, Wei-Chuan Tsai, Jin-Yan Chiou, Hsiang-Wen Ke
  • Patent number: 11829698
    Abstract: A method and system for guided power grid augmentation determines a minimum resistance path for cells within an integrated circuit (IC) design. The minimum resistance path traces a conducting wire connecting a pin of a cell to an IC tap within the IC design. A voltage drop value for each of the cells is determined so as to identify target cells having a voltage drop value that satisfies a voltage drop criteria. Polygons have defined size characteristics are defined around the minimum resistance paths of the target cells, and conductors, such as additional conductors, are generated within the defined polygons.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: November 28, 2023
    Assignee: Synopsys, Inc.
    Inventors: Hsiang-Wen Chang, Yang-Ming Chen
  • Patent number: 11781669
    Abstract: An air valve comprises a casing, a valve body driving assembly and a valve body. The casing comprises a chamber, a vent hole, and at least one switching hole communicating with the chamber. The valve body driving assembly is disposed in the chamber, and comprises a pusher, a shape memory metal wire in a linkage relationship with the pusher, and two conductive members disposed in the casing and located at two ends of the shape memory metal wire respectively, the pusher travels a uniaxial displacement stroke due to a temporary change of the shape memory metal wire. The valve body is disposed in the chamber and faces the switching hole, when the pusher travels the uniaxial displacement stroke, the valve body is driven to rotate a central angle relative to the switching hole to change a ventilation state between the switching hole and the chamber.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: October 10, 2023
    Assignee: TANGTRING SEATING TECHNOLOGY INC.
    Inventors: Tsun-Hsiang Wen, Shih-Chung Hsu, Jun Xie, Jian Zeng, Xian-Chang Zou
  • Publication number: 20230125856
    Abstract: A method for fabricating a semiconductor device includes the steps of forming an inter-metal dielectric (IMD) layer on a substrate, forming a trench in the IMD layer, forming a barrier layer in the trench, forming a nucleation layer on the barrier layer, performing an anneal process to form a silicide layer, forming a bulk layer on the silicide layer, and forming a magnetic tunneling junction (MTJ) on the bulk layer.
    Type: Application
    Filed: November 23, 2021
    Publication date: April 27, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hsiang-Wen Ke, Wei-Chuan Tsai, Yen-Tsai Yi, Jin-Yan Chiou
  • Patent number: 11637044
    Abstract: A micro LED display includes a display substrate, a first soldering layer, at least one second soldering layer, first micro LEDs and at least one second micro LED. The display substrate includes a substrate having a plurality of pixel areas, a first circuit layer and a second circuit layer, and the first circuit layer and the second circuit layer are arranged in each pixel area. The first soldering layer is disposed on the first circuit layer, and the second soldering layer is disposed on the second micro LED. An arranging area of the first soldering layer is greater than an arranging area of the second soldering layer. The first micro LEDs is bonding to the first circuit layer in each pixel area through the first soldering layer. The second micro LED is bonding to the second circuit layer of one of the pixel areas through the second soldering layer.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: April 25, 2023
    Assignee: PlayNitride Display Co., Ltd.
    Inventors: Hsiang-Wen Tang, Yu-Hung Lai
  • Publication number: 20230120360
    Abstract: This invention discloses a traditional Chinese medicine, Mu Dan Pi (Moutan radicis cort), that has the potential to be used for the prevention or treatment of cachexia and muscle loss in cancer patients. The composition is a novel therapeutic agent for cachexia.
    Type: Application
    Filed: October 13, 2022
    Publication date: April 20, 2023
    Applicant: CHINA MEDICAL UNIVERSITY
    Inventors: Hsiang-Wen Lin, Chih-Hsueh Lin, Liang-Yo Yang, Chih-Shiang Chang, Ching-Shih Chen
  • Patent number: 11631781
    Abstract: A method of manufacturing display device is disclosed. A substrate includes a basal layer and metal contacts on the top surface. An insulation layer is disposed on the top surface and includes a first mounting surface and a bottom surface. Multiple grooves are formed on the insulation layer and each extends from the first mounting surface to the bottom surface. The grooves respectively correspond to the metal contacts and expose respective metal contacts. An electromagnetic force is provided with a direction from the basal layer toward the insulation layer. A droplet containing multiple micro components is provided on the first mounting surface. A configuration of an electrode of the micro component corresponds to a configuration of one of the grooves. The electrode is attracted to the corresponding groove by the electromagnetic force so as to electrically contact the metal contact.
    Type: Grant
    Filed: February 21, 2021
    Date of Patent: April 18, 2023
    Assignee: PlayNitride Inc.
    Inventors: Tzu-Yu Ting, Yu-Hung Lai, Hsiang-Wen Tang, Yi-Chun Shih
  • Publication number: 20230094638
    Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate structure on a substrate, forming a source/drain region adjacent to two sides of the gate structure, forming an epitaxial layer on the source/drain region, forming an interlayer dielectric (ILD) layer on the gate structure, forming a contact hole in the ILD layer to expose the epitaxial layer, forming a low stress metal layer in the contact hole, forming a barrier layer on the low stress metal layer, and forming an anneal process to form a first silicide layer and a second silicide layer.
    Type: Application
    Filed: October 26, 2021
    Publication date: March 30, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Jin-Yan Chiou, Wei-Chuan Tsai, Yen-Tsai Yi, Hsiang-Wen Ke
  • Publication number: 20230027804
    Abstract: A micro light-emitting display device having multiple display regions is provided. The micro light-emitting display device includes a substrate, multiple micro light-emitting elements, and multiple first light-emitting auxiliary structures. The micro light-emitting elements are disposed on the substrate, and positions of the micro light-emitting elements define ranges of the display regions. The micro light-emitting elements have a same first pitch between each other in any one of the display regions. The micro light-emitting elements have a second pitch between each other at a boundary across any two adjacent display regions. The first pitch is different from the second pitch. The light-emitting auxiliary structures are respectively disposed on the micro light-emitting elements. The light-emitting auxiliary structures have a same third pitch between each other.
    Type: Application
    Filed: January 18, 2022
    Publication date: January 26, 2023
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Bo-Wei Wu, Hsiang-Wen Tang, Yu-Yun Lo, Shiang-Ning Yang, Chang-Feng Tsai
  • Publication number: 20220405458
    Abstract: A method, a system, and non-transitory computer readable medium for power and ground (P/G) routing for an integrated circuit (IC) design are provided. The method includes generating input features for a machine-learning (ML) model based on IR drop and routing congestion analysis for a P/G network for the IC design, and modifying a set of P/G vias or a set of P/G wires in the P/G network according to modifications identified by the ML model. The ML model comprises a feature extractor pre-trained using a plurality of images of P/G vias and P/G wires.
    Type: Application
    Filed: June 15, 2022
    Publication date: December 22, 2022
    Inventors: Ping-Wei HUANG, Hsiang-Wen CHANG, Yao-Wen CHANG
  • Publication number: 20220384710
    Abstract: A method for fabricating a magnetic random access memory (MRAM) device includes the steps of first forming a magnetic tunneling junction (MTJ) stack on a substrate, forming a first top electrode on the MTJ stack, and then forming a second top electrode on the first top electrode. Preferably, the first top electrode includes a gradient concentration while the second top electrode includes a non-gradient concentration.
    Type: Application
    Filed: June 29, 2021
    Publication date: December 1, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yen-Tsai Yi, Wei-Chuan Tsai, Jin-Yan Chiou, Hsiang-Wen Ke