Abstract: A modular multiplication circuit includes a main operation circuit, a look-up table, and an addition unit. The main operation circuit updates a sum value and a carry value according to 2iA corresponding to a first operation value A and m bits of a second operation value B currently under operation, m is a positive integer, i is from 0 to m-1. The look-up table records values related to a modulus, and selects one of the values as a look-up table output value according to the sum value. The addition unit updates the sum value and the carry value according to the look-up table output value and outputs the updated sum value and the updated carry value to the main operation circuit. The modular multiplication circuit updates the sum value and the carry value in a recursive manner by using m different bits of the second operation value B.

Abstract: A data processing system can be operated in one of a preprocessing mode, a short-read mapping mode, a sequence assembly mode or a variant calling mode that are related to a to-be-tested DNA sequence. The data processing system includes a sorting engine that supports high-speed processing of sorting in the preprocessing mode and the sequence assembly mode, and a dynamic processing engine that supports dynamic programming calculations in the short-read mapping mode and the variant calling mode. The data processing system may be implemented on a system-on-chip (SoC) for performing accelerated processing of gene sequencing data with reduced memory requirements.

Abstract: An antenna module includes two antenna units, two isolation members, and a grounding member. Each antenna unit consists of two feeding ends. two first radiators, and two second. radiators. The isolating members are disposed between the first and second portions of each antenna unit. The grounding member is disposed beside the two antenna units and the two isolation members. A first slot is formed among each first radiator, the second radiator, and the grounding member. The two second radiators are connected to the third radiator. A third slot is formed between the second radiator and the second portion. The two antenna units are symmetric to the fourth slot in a mirrored manner, and the two first portions have widths gradually changing along an extending direction of the fourth position.

Abstract: A driving device comprises a first complementary metal-oxygen-semiconductor circuit and a first comparator. The first complementary metal-oxygen-semiconductor circuit is configured for outputting a power signal or a pull-down signal according to the first input signal. The first comparator comprises a first non-inverting input terminal and a first inverting input terminal. The first non-inverting input terminal is coupled to the first complementary metal-oxygen-semiconductor circuit, and is configured to receive the power signal or the pull-down signal. The first inverting input terminal is configured for receiving a first reference signal, and the first comparator is configured to compare one of the power signal and the pull-down signal and the first reference signal to provide a first driving signal.

Abstract: The present disclosure provides a driving circuit, including a transistor and a level shifter. The first terminal of the transistor is electrically connected to a light emitting diode and is configured to receive a supply voltage. The second terminal of the transistor is configured to receive a first reference voltage. The level shifter is configured to receive an input signal from a previous-stage driving circuit and adjust the voltage level of the input signal according to a voltage operating range formed by the supply voltage and the first reference voltage to generate a level-shifted signal corresponding to the voltage operating range and configured to control the transistor. The input signal varies between a second reference voltage and the supply voltage. The second reference voltage and the first reference voltage are different from each other and both lower than the supply voltage.

Abstract: A structure for real-time audio signal processing and converting into a programmable control system comprises a sound processing unit comprising first and second audio transforming modules and receiving an audio energy, the transforming modules capture the audio energy and generate first and second frequency values, the sound processing unit captures the audio energy and obtains an audio energy value; and a data storage unit storing first, second and third storage data and electrically connected to the sound processing unit that compares the first frequency value with the first storage data, compares the second frequency value with the second storage data, and compares the audio energy value with the third storage data to generate first, second and third control signals, further generates a combinational transformed data for comparing with a fourth storage data to generate an advanced control signal that controls an electronic device to generate a corresponding action.

Abstract: A computing system can include an off-chip memory and processing unit integrated circuitry. The processing unit IC can include on-chip compute circuitry, a first on-chip memory and a second on-chip memory. The off-chip memory can be configured to store instructions and data The first on-chip memory can be configured to store reusable portions of the instructions and or data for use by the on-chip compute circuitry. The second on-chip memory configured to cache portions of instruction and data for current use by the on-chip compute circuitry.

Abstract: A target image of a target circuit board and a gold image of a gold circuit board are taken by an image acquisition system. Fiducial points are located on the target image and on the gold image. Perspective transformation is performed on the target image using the fiducial points on the target image for reference and on the gold image using the fiducial points on the gold image for reference. After perspective transformation, an anomalous section of the target image is identified by identifying pixels that have different intensities between the target image and the gold image, the anomalous section being indicative of an unauthorized modification to the target circuit board.

Abstract: A memory device and method of making the same are disclosed. The memory device includes transistor devices located in both a memory region and a logic region of the device. Transistor devices in the memory region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, a second oxide layer over the first nitride layer, and a second nitride layer over the second oxide layer. Transistor devices in the logic region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, and a second nitride layer over the first nitride layer.

Abstract: Tool-less apparatus and methods are provided for sealing flow of cooling air from the outlet of a cooling fan blower to the inlet of a heat exchanger within a chassis enclosure of an information handling system. The disclosed apparatus and methods may be implemented in a tool-less manner by employing tool-less chassis mounting features that mate with tool-less cooling fan mounting features to mechanically align and secure an air outlet of a cooling fan blower in sealing relationship with an air inlet of a heat exchanger within a chassis enclosure of an information handling system by properly aligning the axes of a cooling fan in relation to the inlet of the heat exchanger so that in on embodiment no gap exists between the cooling air outlet of the cooling fan and the cooing air inlet of the heat exchanger.

Abstract: Aspects are provided for multiband multiplexers. One example is a multiband multiplexer with a first filter element configured to have a first passband that spans a first predefined frequency range of a first communication band and a second predefined frequency range of a second communication band, wherein the first predefined frequency range overlaps a portion of the second predefined frequency range, a second filter element configured to have a second passband distinct from the first passband, a third filter element configured to have a third passband distinct from the first and second passbands, and a fourth filter element configured to have a fourth passband distinct from the first, second, and third passbands.

Abstract: A stereoscopic image display device includes a flat panel display unit, a lens array unit, and a light guide structure unit. The light guide structure unit includes a light guide microstructure. The light guide microstructure is disposed on a side of the lens array unit. A bottom angle of the light guide microstructure is defined as B, and a bottom length of the light guide microstructure is defined as P. The bottom angle B and the bottom length P of the light guide microstructure satisfies following conditions: (i) 15.5 degrees?B?83.5 degrees; and (ii) 10 micrometers?P?2,000 micrometers, such that an oblique viewing angle of the stereoscopic image display device falls within a range from 10 degrees to 60 degrees.

Abstract: An electronic device, including a metal back cover, a front cover, a metal wall, and at least one antenna radiator, is provided. The front cover covers the metal back cover and includes a frame area. The metal wall is disposed between the metal back cover and the front cover, and forms a metal cavity corresponding to the frame area together with the metal back cover. Each of the at least one antenna radiator is disposed in the metal cavity, is connected to a first side wall of the metal back cover, and is spaced apart from the metal wall by a distance.

Abstract: A driving circuit for a display panel and including a receiving interface, a timing controller, a pulse width modulation controller and a line latch is disclosed. The receiving interface is configured to receive a first input signal, a second input signal and a link signal to generate a plurality of display data accordingly, wherein the first input signal and the second input signal are a pair of differential signals. The timing controller is configured to interpret the first input signal, the second input signal and the link signal to generate a trigger signal. The pulse width modulation controller is configured to perform pulse width modulation to generate a first output signal and a second output signal. The line latch is configured to hold the first and second output signals, and output the first and second output signals according to the trigger signal to drive the display panel.

Abstract: An organic-inorganic hybrid material is disclosure. The organic-inorganic hybrid material contains 5˜50 wt % of inorganic compounds and has a characteristic peak at 1050±50 cm?1 in FTIR spectrum. Furthermore, the invention also provides a fabricating process of the organic-inorganic hybrid material as well as its starting material “isocyanates”. In particular, the isocyanates are prepared from carbonate containing compounds and amines.

Abstract: A memory cell formed in a pillar structure between a first electrode and a second electrode includes laminated encapsulation structure. In one example, the pillar includes a body of ovonic threshold switch material, carbon-based intermediate layers, metal layers and a body of phase change memory material in electrical series between the first and second electrodes. The laminated encapsulation structure surrounds the pillar. The laminated dielectric encapsulation structure comprises at least three conformal layers, including a first layer of material, a second conformal layer of a second layer material different from the first layer material; and a third conformal layer of a third layer material different from the second layer material.

Abstract: A stereoscopic image display device includes a flat panel display unit, a lens array unit, and a light guide structure unit. The light guide structure unit includes a light guide microstructure. The light guide microstructure is disposed on a side of the lens array unit. A bottom angle of the light guide microstructure is defined as B, and a bottom length of the light guide microstructure is defined as P. The bottom angle B and the bottom length P of the light guide microstructure satisfies following conditions: (i) 15.5 degrees?B?83.5 degrees; and (ii) 10 micrometers?P?2,000 micrometers, such that an oblique viewing angle of the stereoscopic image display device falls within a range from 10 degrees to 60 degrees.

Abstract: An integrated circuit component includes a semiconductor substrate, conductive pads, a passivation layer and conductive vias. The semiconductor substrate has an active surface. The conductive pads are located on the active surface of the semiconductor substrate and electrically connected to the semiconductor substrate, and the conductive pads each have a contact region and a testing region, where in each of the conductive pads, an edge of the contact region is in contact with an edge of the testing region. The passivation layer is located on the semiconductor substrate, where the conductive pads are located between the semiconductor substrate and the passivation layer, and the testing regions and the contact regions of the conductive pads are exposed by the passivation layer. The conductive vias are respectively located on the contact regions of the conductive pads.

Abstract: A stereoscopic image display device capable of reducing grid visual effect includes a flat display unit, a light source unit disposed on a side of the flat display unit, and a lens array unit disposed on another side of the flat display unit. A light source provided by the light source unit satisfies an optical characteristic as follows: an attenuation amplitude of a luminance of the light source before entering the lens array unit being not greater than 65% within a divergence angle of a light field system of the stereoscopic image display device, thereby reducing the grid visual effect of a stereo image generated by the stereoscopic image display device.

Abstract: A stereoscopic image display device capable of reducing grid visual effect includes a flat display unit, a light source unit disposed on a side of the flat display unit, and a lens array unit disposed on another side of the flat display unit. A light source provided by the light source unit satisfies an optical characteristic as follows: an attenuation amplitude of a luminance of the light source before entering the lens array unit being not greater than 65% within a divergence angle of a light field system of the stereoscopic image display device, thereby reducing the grid visual effect of a stereo image generated by the stereoscopic image display device.