Patents by Inventor Hsiang Hsu
Hsiang Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250139428Abstract: In some aspects, the techniques described herein relate to a method including: providing a machine unlearning algorithm, wherein the machine unlearning algorithm is configured to: approximate a final training state of model parameters trained with an unfiltered dataset; approximate a final training state of model parameters trained with a retain dataset; and compute a vector for shifting parameter weights from the final training state of model parameters trained with the unfiltered dataset to the final training state of model parameters trained with the retain dataset; tuning a batch normalization layer of a convolutional neural network included in a machine learning model with the machine unlearning algorithm, wherein parameters of a convolution layer of the convolutional neural network remain fixed; and tuning prompt parameters of a transformer model included in the machine learning model with the machine unlearning algorithm, wherein other parameters of the transformer model remain fixed.Type: ApplicationFiled: October 25, 2023Publication date: May 1, 2025Inventors: Guihong LI, Hsiang HSU, Richard CHEN
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Publication number: 20250123458Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.Type: ApplicationFiled: December 18, 2024Publication date: April 17, 2025Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
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Patent number: 12277318Abstract: A system and method are provided to detect an event corresponding to the system powering up or a storage device being inserted into the backplane. In response to detecting the event, the system obtains configuration information associated with a physical topology of the backplane, the configuration information associated with: a first bus between a storage controller and a redriver; a second bus between the redriver and the storage device; the backplane; and the storage device. The system searches, in a data structure based on the configuration information, for an optimized redriver setting. The system activates, based on the optimized setting, the redriver by enhancing signals sent via the second bus to the storage device and by enhancing signals sent via the first bus to the storage controller, thereby facilitating enhancement of signal integrity between the storage components in the backplane.Type: GrantFiled: May 23, 2023Date of Patent: April 15, 2025Assignee: Hewlett Packard Enterprise Development LPInventors: Chih-Sheng Liao, Tse-Jen Sung, Chung-Hsiang Hsu
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Patent number: 12276836Abstract: A semiconductor structure according to the present disclosure includes a buried oxide layer, a first dielectric layer disposed over the buried oxide layer, a first waveguide feature disposed in the first dielectric layer, a second dielectric layer disposed over the first dielectric layer and the first waveguide feature, a third dielectric layer disposed over the second dielectric layer, and a second waveguide feature disposed in the second dielectric layer and the third dielectric layer. The second waveguide feature is disposed over the first waveguide feature and a portion of the second waveguide feature vertically overlaps a portion of the first waveguide feature.Type: GrantFiled: December 9, 2022Date of Patent: April 15, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chan-Hong Chern, Chih-Chang Lin, Min-Hsiang Hsu, Weiwei Song, Chewn-Pu Jou, Feng-Wei Kuo, Huan-Neng Chen, Lan-Chou Cho
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Publication number: 20250110291Abstract: Provided are a package structure and a method of forming the same. The package structure includes a bottom package having a first sidewall and a second sidewall opposite to each other; a hybrid path layer disposed on the bottom package, wherein the hybrid path layer comprises an optical path layer and an electrical path layer, and at least one optical path of the optical path layer extends from the first sidewall of the bottom package beyond a center of the bottom package; and a plurality of dies bonded onto the hybrid path layer.Type: ApplicationFiled: October 2, 2023Publication date: April 3, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Ming Weng, Yu-Hao Chen, Hao-Yi Tsai, An-Jhih Su, Tzuan-Horng Liu, Po-Yuan Teng, Tsung-Yuan Yu, Che-Hsiang Hsu
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Publication number: 20250103914Abstract: In some aspects, the techniques described herein relate to a method including: determining a first cross-entropy loss, wherein the first cross-entropy loss is determined based on a set of predictions, and wherein the set of predictions are based on a classifier head of a machine learning model generating the set of predictions based on a set of feature vectors; updating the classifier head and a prompt of the machine learning model with the first cross-entropy loss; generating outlier samples based on the set of feature vectors; providing, as input to the classifier head, the set of feature vectors and the outlier samples, wherein a second cross-entropy loss and an outlier regularization loss are computed by the classifier head based on the set of feature vectors and the outlier samples; and updating the classifier head with the second cross-entropy loss and the outlier regularization loss.Type: ApplicationFiled: September 27, 2023Publication date: March 27, 2025Inventors: Wei-Cheng HUANG, Richard CHEN, Hsiang HSU
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Publication number: 20250103878Abstract: In some aspects, the techniques described herein relate to a method including: providing a first datum to a target model, wherein the first datum is retrieved from a forget dataset; providing a sample drawn from Gaussian noise to an original model; computing a first loss, wherein the first loss is based on target model output from processing the first datum and original model output from processing the sample drawn from Gaussian noise; providing a second datum to the target model, wherein the second datum is retrieved from a retain dataset; providing the second datum to the original model as input to the original model; computing a second loss, wherein the second loss is based on target model output from processing the second datum and original model output from processing the second datum; and combining the first loss and the second loss with an alpha weighting to generate a weighted combination.Type: ApplicationFiled: September 26, 2023Publication date: March 27, 2025Inventors: Guihong LI, Hsiang HSU, Richard CHEN
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Publication number: 20250094803Abstract: Systems and methods for efficient test-time prediction of model arbitrariness are disclosed. According to an embodiment, a method for efficient test-time estimation of predictive multiplicity may include: (1) receiving, by arbitrariness prediction computer program, a trained machine learning model, wherein the trained machine learning model comprises a plurality of nodes, and each node has a weight; (2) determining, by the arbitrariness prediction computer program, a number of dropout models for the trained machine learning model to generate; (3) creating, by the arbitrariness prediction computer program, the number of dropout models; (4) providing, by the arbitrariness prediction computer program, sample data to each of the dropout models; (5) receiving, by the arbitrariness prediction computer program, an output from each of the dropout models; and (6) determining, by the arbitrariness prediction computer program, an arbitrariness for the trained machine learning model based on the outputs.Type: ApplicationFiled: September 19, 2023Publication date: March 20, 2025Inventors: Hsiang HSU, Richard CHEN, Guihong LI
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Patent number: 12250487Abstract: An image readout device includes comparator circuits. Each comparator circuit includes an amplifier, an input capacitor, an auto-zero switch, and a control capacitor. The amplifier compares a pixel signal to a reference signal to generate a comparison signal. The input capacitor receives the pixel signal or the reference signal. The auto-zero switch couples or decouples the input node and the output node of the amplifier. The control capacitor receives a respective control signal. Alternatively, the control capacitor can be replaced with a control switch. The control switch is coupled to the auto-zero switch in parallel. The control switch and the control capacitor can be omitted. Instead, the voltage level of the reference signal is adjusted to change the transition time points of the comparison signal.Type: GrantFiled: May 11, 2023Date of Patent: March 11, 2025Assignee: Novatek Microelectronics Corp.Inventors: Pai-Hsiang Hsu, Chao-Yu Meng, Yueh-Ru Lee
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Patent number: 12235573Abstract: A photomask and a method of manufacturing a photomask are provided. According to an embodiment, a method includes: providing a substrate; depositing a reflective layer including molybdenum layers and silicon layers over the substrate; depositing a capping layer over the reflective layer; depositing an absorption layer over the capping layer; and performing a treatment to form a border region including molybdenum silicide in the reflective layer.Type: GrantFiled: July 30, 2023Date of Patent: February 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Feng Yuan Hsu, Tran-Hui Shen, Ching-Hsiang Hsu
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Patent number: 12235614Abstract: The present disclosure provides a molding system for fabricating a FRP composite article. The molding system includes a detector, a resin dispenser, a processing module, and a molding machine. The detector is configured to capture a graph of a woven fiber from a top view. The resin dispenser is configured to provide a resin to the woven fiber to form a FRP. The processing module is configured to receive the graph and a plurality of parameters of the FRP. The processing module includes a CNN model, and is configured to use the CNN model to obtain a plurality of predicted mechanical properties of the FRP according to the graph and the plurality of parameters of the FRP. The molding machine is configured to mold the FRP to fabricate the FRP composite article according to the plurality of predicted mechanical properties.Type: GrantFiled: March 10, 2022Date of Patent: February 25, 2025Assignee: CORETECH SYSTEM CO., LTD.Inventors: Chi-Hua Yu, Mao-Ken Hsu, Yi-Wen Chen, Li-Hsuan Shen, Chih-Chung Hsu, Chia-Hsiang Hsu, Rong-Yeu Chang
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Publication number: 20250060645Abstract: Apparatus, circuits and methods for reducing mismatch in an electro-optic modulator are described herein. In some embodiments, a described optical includes: a splitter configured for splitting an input optical signal into a first optical signal and a second optical signal; a phase shifter coupled to the splitter; and a combiner coupled to the phase shifter. The phase shifter includes: a first waveguide arm configured for controlling a first phase of the first optical signal to generate a first phase-controlled optical signal, and a second waveguide arm configured for controlling a second phase of the second optical signal to generate a second phase-controlled optical signal. Each of the first and second waveguide arms includes: a plurality of straight segments and a plurality of curved segments. The combiner is configured for combining the first and second phase-controlled optical signals to generate an output optical signal.Type: ApplicationFiled: November 4, 2024Publication date: February 20, 2025Inventors: Lan-Chou CHO, Chewn-Pu JOU, Min-Hsiang HSU
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Publication number: 20250060542Abstract: A package includes an electronic die, a photonic die underlying and electronically communicating with the electronic die, a lens disposed on the electronic die, and a prism structure disposed on the lens and optically coupled to the photonic die. The prism structure includes first and second polymer layers, the first polymer layer includes a first curved surface concaving toward the photonic die, the second polymer layer embedded in the first polymer layer includes a second curved surface substantially conforming to the first curved surface, and an outer sidewall of the second polymer layer substantially aligned with an outer sidewall of the first polymer layer.Type: ApplicationFiled: November 3, 2024Publication date: February 20, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Che-Hsiang Hsu, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Chung-Ming Weng
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Publication number: 20250061335Abstract: In some aspects, the techniques described herein relate to a method including: executing a machine learning model; providing a data transformation module of the machine learning model that outputs a transformed dataset; providing a sensitive attribute suppression module of the machine learning model that outputs a sensitive attribute suppression loss; providing an annotated useful attribute preservation module of the machine learning model that outputs an annotated useful attribute preservation loss; providing an unannotated useful attribute preservation module of the machine learning model that outputs an unannotated useful attribute preservation loss; combining the sensitive attribute suppression loss, the annotated useful attribute preservation loss, and the unannotated useful attribute preservation loss into a total loss; and training a neural network of the data transformation module and a neural network of the unannotated useful attribute preservation module using the total loss.Type: ApplicationFiled: August 14, 2023Publication date: February 20, 2025Inventors: Yizhuo CHEN, Richard CHEN, Hsiang HSU, Shaohan HU, Marco PISTOIA
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Patent number: 12228768Abstract: Methods of fabricating optical devices with high refractive index materials are disclosed. The method includes forming a first oxide layer on a substrate and forming a patterned template layer with first and second trenches on the first oxide layer. A material of the patterned template layer has a first refractive index. The method further includes forming a first portion of a waveguide and a first portion of an optical coupler within the first and second trenches, respectively, forming a second portion of the waveguide and a second portion of the optical coupler on a top surface of the patterned template layer, and depositing a cladding layer on the second portions of the waveguide and optical coupler. The waveguide and the optical coupler include materials with a second refractive index that is greater than the first refractive index.Type: GrantFiled: December 8, 2022Date of Patent: February 18, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Weiwei Song, Chan-Hong Chern, Chih-Chang Lin, Stefan Rusu, Min-Hsiang Hsu
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Publication number: 20250056915Abstract: The present disclosure provides a photo sensing device and a method for forming a photo sensing device. The photo sensing device includes a substrate, a photosensitive member, a superlattice layer and a diffusion barrier structure. The substrate includes a silicon layer at a front surface. The photosensitive member extends into and at least partially surrounded by the silicon layer, wherein an upper portion of the photosensitive member protruding from the silicon layer has a top surface and a facet tapering toward the top surface. The superlattice layer is disposed between the photosensitive member and the silicon layer. The diffusion barrier structure is disposed at a first side of the photosensitive member and a bottom of the diffusion barrier structure is at a level below a top surface of the silicon layer, wherein at least a portion of the diffusion barrier structure is laterally surrounded by the silicon layer.Type: ApplicationFiled: October 28, 2024Publication date: February 13, 2025Inventors: CHAN-HONG CHERN, WEIWEI SONG, CHIH-CHANG LIN, LAN-CHOU CHO, MIN-HSIANG HSU
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Patent number: 12210200Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.Type: GrantFiled: February 26, 2024Date of Patent: January 28, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
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Patent number: 12210188Abstract: A semiconductor package includes a first die stack structure and a second die stack structure, an insulating encapsulation, a redistribution structure, at least one prism structure and at least one reflector. The first die stack structure and the second die stack structure are laterally spaced apart from each other along a first direction, and each of the first die stack structure and the second die stack structure comprises an electronic die; and a photonic die electronically communicating with the electronic die. The insulating encapsulation laterally encapsulates the first die stack structure and the second die stack structure. The redistribution structure is disposed on the first die stack structure, the second die stack structure and the insulating encapsulation, and electrically connected to the first die stack structure and the second die stack structure. The at least one prism structure is disposed within the redistribution structure and optically coupled to the photonic die.Type: GrantFiled: August 29, 2022Date of Patent: January 28, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Yi Kuo, Chen-Hua Yu, Cheng-Chieh Hsieh, Che-Hsiang Hsu, Chung-Ming Weng, Tsung-Yuan Yu
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Publication number: 20250020712Abstract: Wafer testing of a power transistor for a current property of the power transistor. Wafer testing of a power transistor is performed by using a sense transistor constructed using the same epitaxial stack as was used to construct the power transistor. The current property of the sense transistor is then measured, and the current property of the power transistor can be determined from that measurement. Furthermore, the sense transistor is pre-conditioned prior to the measurement by alternately turning on and off the sense transistor multiple cycles while allowing a source terminal of the power transistor to float. This simulates operating conditions of the power transistor, thereby allowing for measurement of the current property of the power transistor as it would likely be in operation.Type: ApplicationFiled: July 10, 2023Publication date: January 16, 2025Inventors: Iman ABDALI MASHHADI, Thomas William MACELWEE, Mohammad BOZORGI, Ting-Hsiang HSU, Meng-ta YOU, Regina Inyangat AKUDO, Yueh Lin CHIANG
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Patent number: D1066142Type: GrantFiled: June 9, 2023Date of Patent: March 11, 2025Assignee: IMEIER GREEN TECHNOLOGY CO., LTD.Inventors: Wei-Kai Hsiang, Ching-Lung Lee, Jack Lin, Yi-Hsiang Hsu