Patents by Inventor Hsiang Hsu

Hsiang Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11991572
    Abstract: Methods and apparatus are provided for UE-triggered handover and early preparation with coexistence of the network-triggered handover. In one novel aspect, the UE is configured early measurement report configuration, receives an early handover command from the serving base station with a handover candidate cell list, monitors handover triggering conditions for each candidate cell on the handover candidate cell list based on a UE-triggered handover configuration and performs the UE-triggered handover to a candidate cell when the corresponding triggering condition is met for the candidate cell. In one embodiment, the UE receives a network-triggered handover command to a target cell, suspends the UE-triggered handover configuration and performs the network-triggered handover to the target cell. The UE discards the UE-triggered handover configuration upon success of the network-triggered handover and resumes the UE-triggered handover configuration upon failure of the network-triggered handover.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: May 21, 2024
    Assignee: MEDIATEK INC.
    Inventors: Li-Chuan Tseng, Yuanyuan Zhang, Yung-Hsiang Liu, Chun-Fan Tsai, Chia-Chun Hsu
  • Patent number: 11990507
    Abstract: A high voltage transistor structure including a substrate, a first isolation structure, a second isolation structure, a gate structure, a first source and drain region, and a second source and drain region is provided. The first isolation structure and the second isolation structure are disposed in the substrate. The gate structure is disposed on the substrate, at least a portion of the first isolation structure, and at least a portion of the second isolation structure. The first source and drain region and the second source and drain region are located in the substrate on two sides of the first isolation structure and the second isolation structure. The depth of the first isolation structure is greater than the depth of the second isolation structure.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: May 21, 2024
    Assignee: United Microelectronics Corp.
    Inventors: Chin-Hung Chen, Ssu-I Fu, Chih-Kai Hsu, Chun-Ya Chiu, Chia-Jung Hsu, Yu-Hsiang Lin
  • Patent number: 11989533
    Abstract: A random bit generator includes a voltage source, a bit data cell, and a sensing control circuit. The voltage source provides a scan voltage during enroll operations. The data cell includes a first transistor and a second transistor. The first transistor has a first terminal coupled to a first bit line, a second terminal coupled to the voltage source, and a control terminal. The second transistor has a first terminal coupled to a second bit line, a second terminal coupled to the voltage source, and a control terminal. The sensing control circuit is coupled to the first bit line and the second bit line, and outputs a random bit data according to currents generated through the first transistor and the second transistor during an enroll operation of the bit data cell.
    Type: Grant
    Filed: June 5, 2023
    Date of Patent: May 21, 2024
    Assignee: eMemory Technology Inc.
    Inventor: Ching-Hsiang Hsu
  • Patent number: 11990906
    Abstract: Disclosed is an electronic device including a tunable element, a first power supply circuit, and a second power supply circuit. The first power supply circuit and the second power supply circuit are electrically connected to the tunable element. The first power supply circuit drives the tunable element during a first time period. The second power supply circuit drives the tunable element during a second time period.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: May 21, 2024
    Assignee: Innolux Corporation
    Inventors: Yi-Hung Lin, Chung-Le Chen, Shuo-Ting Hong, Yu-Ti Huang, Yu-Hsiang Chiu, Nai-Fang Hsu
  • Publication number: 20240157190
    Abstract: An exercise device is providing, including: a frame, including a weighting seat, two first movable pulley assemblies and two second movable pulley assemblies; a first operation assembly, disposed on the frame, including two first connecting members connected to opposing ends of the first cable and a first cable curving back around the two first movable pulley assemblies and the weighting seat; a second operation assembly, including two second connecting members and two second cables each being connected to the frame and curving back around one first movable pulley assembly and one second movable pulley assembly, each second connecting members being connected to one second cable; a third operation assembly, including two third connecting members and two third cables each being connected to the frame and curving back around one second movable pulley assembly, each third connecting members being connected to one third cable.
    Type: Application
    Filed: November 10, 2022
    Publication date: May 16, 2024
    Inventor: YOU-HSIANG HSU
  • Patent number: 11982369
    Abstract: An air valve structure arranged on a base comprises an air plug and a state-switching component. The air plug is arranged in an air chamber in an axial direction. The air plug includes a closing state to close the air hole, and an opening state to open the air hole. The state-switching component comprises a driving member that links the air plug, a shape-memory alloy (SMA) wire connected with the driving member, and at least one conductive member connected with the SMA wire. The driving member exerts an acting force to the air plug based on a condition of electricity provided by the conductive member for the SMA wire. The direction of the acting force is non-parallel with the axial direction and the air plug is moved and changed between the closing state and the opening state by the acting force.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: May 14, 2024
    Assignee: TANGTRING SEATING TECHNOLOGY INC
    Inventors: Tsun-Hsiang Wen, Shih-Chung Hsu, Jun Xie, Jian Zeng, Xian-Chang Zou
  • Patent number: 11982866
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: May 14, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
  • Patent number: 11977251
    Abstract: A backlight module including a light guide plate, a light source, an upper prism sheet, and a lower prism sheet is provided. The light guide plate has a light incident surface and a light emitting surface. The upper prism sheet is disposed at a side of the light emitting surface of the light guide plate. The upper prism sheet includes an upper substrate and first prism microstructures. Cross-sections of the first prism microstructures are isosceles triangles, and apex angles thereof fall within a range of 80 to 90 degrees. The lower prism sheet is disposed between the light guide plate and the upper prism sheet. The lower prism sheet includes a lower substrate and second prism microstructures. Cross-sections of the second prism microstructures are isosceles triangles, and apex angles thereof fall within a range of 100 to 130 degrees.
    Type: Grant
    Filed: February 6, 2023
    Date of Patent: May 7, 2024
    Assignee: Coretronic Corporation
    Inventors: Chun-Hsiang Hsu, Yen-Hao Lin, Wei-Hsuan Cheng
  • Publication number: 20240145379
    Abstract: Methods and semiconductor devices are provided. A method includes determining a location of a polyimide opening (PIO) corresponding to an under-bump metallization (UBM) feature in a die. The die includes a substrate and an interconnect structure over the substrate. The method also includes determining a location of a stacked via structure in the interconnect structure based on the location of the PIO. The method further includes forming, in the interconnect structure, the stacked via structure comprising at most three stacked contact vias at the location of the PIO.
    Type: Application
    Filed: February 23, 2023
    Publication date: May 2, 2024
    Inventors: Yen-Kun Lai, Wei-Hsiang Tu, Ching-Ho Cheng, Cheng-Nan Lin, Chiang-Jui Chu, Chien Hao Hsu, Kuo-Chin Chang, Mirng-Ji Lii
  • Publication number: 20240146085
    Abstract: The present disclosure provides a battery charging system and method. The battery charging method includes: determining a degree of healthy of a battery module according to an evaluation mechanism; setting a charging standard according to the degree of healthy; by handshaking with a charger, setting a charging voltage for the charger according to the charging standard to charge the battery module; and by the charger, perform a charging operation on the battery module until a fully charged condition is satisfied.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 2, 2024
    Inventors: Tsung-Nan WU, Chih-Hsiang HSU, Wei-Cheng CHEN
  • Patent number: 11966121
    Abstract: An electronic window is provided for adjusting light and includes a first panel, a second panel, and an intermediate layer. The first panel includes a first alignment layer. The second panel includes a second alignment layer. The intermediate layer is disposed between the first panel and the second panel. The angle of orientation of the first alignment layer is between 25 degrees and 65 degrees, and the angle of orientation of the second alignment layer is between 115 degrees and 155 degrees.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: April 23, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: En-Hsiang Chen, Chih-Chin Kuo, Mao-Shiang Lin, Hsu-Kuan Hsu
  • Publication number: 20240128127
    Abstract: A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, an isolation structure on the SDB structure, a first spacer adjacent to the isolation structure, a metal gate adjacent to the isolation structure, a shallow trench isolation (STI around the fin-shaped structure, and a second isolation structure on the STI. Preferably, a top surface of the first spacer is lower than a top surface of the isolation structure and a bottom surface of the first spacer is lower than a bottom surface of the metal gate.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Kai Hsu, Ssu-l Fu, Chun-ya Chiu, Chi-Ting Wu, Chin-HUNG Chen, Yu-Hsiang Lin
  • Patent number: 11963385
    Abstract: The disclosure provides a local stretch packaging structure, including a substrate, a flexible electronic element, a plurality of light-emitting display elements, and a packaging layer. The flexible electronic element is disposed on the substrate. These light-emitting display elements are disposed on the flexible electronic element. The packaging layer includes a packaging area and a non-packaging area. The packaging area covers the upper surface and sidewalls of these light-emitting display elements. The non-packaging area is directly covered the flexible electronic element that is not disposed with these light-emitting display elements.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: April 16, 2024
    Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (ShenZhen) Co., Ltd., General Interface Solution Limited
    Inventors: Wen-You Lai, Ping-Hsiang Kao, Po-Lun Chen, Chun-Ta Chen, Po-Ching Lin, Ya-Chu Hsu
  • Patent number: 11959512
    Abstract: A frame pool is disclosed including a frame assembly and a pool liner, the frame assembly including horizontal frame members and a vertical frame member coupled together via a T-shaped joint. The T-shaped joint may be constructed of plastic to facilitate attachment and detachment to the adjacent frame members and to resist galling and corrosion. The T-shaped joint may also be relatively small to improve the appearance and water containment of the frame pool.
    Type: Grant
    Filed: May 16, 2023
    Date of Patent: April 16, 2024
    Assignee: Intex Marketing Ltd.
    Inventors: Hua Hsiang Lin, Yaw Yuan Hsu
  • Publication number: 20240121373
    Abstract: Disclosed are an image display method and a 3d display system. The method is adapted to the 3d display system including a 3d display device and includes the following steps. A first image and a second image are obtained by splitting an input image according to a 3d image format. Whether the input image is a 3D format image complying with the 3D image format is determined through a stereo matching processing performed on the first image and the second image. An image interweaving process is enabled to be performed on the input image to generate an interweaving image in response to determining that the input image is the 3D format image complying with the 3D image format, and the interweaving image is displayed via the 3D display device.
    Type: Application
    Filed: May 10, 2023
    Publication date: April 11, 2024
    Applicant: Acer Incorporated
    Inventors: Kai-Hsiang Lin, Hung-Chun Chou, Wen-Cheng Hsu, Shih-Hao Lin, Chih-Haw Tan
  • Patent number: 11953740
    Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Patent number: 11948975
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a spacer around the gate structure; and forming a buffer layer adjacent to the gate structure. Preferably, the buffer layer includes a crescent moon shape and the buffer layer includes an inner curve, an outer curve, and a planar surface connecting the inner curve and an outer curve along a top surface of the substrate, in which the planar surface directly contacts the outer curve on an outer sidewall of the spacer.
    Type: Grant
    Filed: October 24, 2021
    Date of Patent: April 2, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Kai Hsu, Ssu-I Fu, Yu-Hsiang Hung, Wei-Chi Cheng, Jyh-Shyang Jenq
  • Patent number: 11947173
    Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Patent number: 11948991
    Abstract: The present disclosure provides semiconductor structure having an electrical contact. The semiconductor structure includes a semiconductor substrate and a doped polysilicon contact. The doped polysilicon contact is disposed over the semiconductor substrate. The doped polysilicon contact includes a dopant material having a dopant concentration equaling or exceeding about 1015 atom/cm3.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: April 2, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chen-Hao Lien, Cheng-Yan Ji, Chu-Hsiang Hsu
  • Patent number: 11946593
    Abstract: Provided is a grease injection system including a plurality of grease injection devices and a host. The grease injection devices uses control information to output lubricating grease, and output a plurality of pieces of status information. The host receives the pieces of status information from the grease injection devices, and generates the control information based on the pieces of status information.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: April 2, 2024
    Assignee: DORCAS SHIN CO., LTD
    Inventors: Ming-Tan Hsu, Xin-Xin Lin, Li-Hsiang Sun, Wen-Chi Hsieh