Abstract: An electronic device is provided. The electronic device includes a first substrate, a polarizer, and a conductive adhesive. The polarizer is disposed on the first substrate and has a conductive layer. The conductive adhesive is disposed on the first substrate and electrically connected to the conductive layer. From a top view, the conductive adhesive is adjacent to an edge of the polarizer and has an extending direction. An angle between the extending direction and an absorption-axis direction of the polarizer is between 80° and 100°.

Abstract: Integrated optical devices and methods of forming the same are disclosed. A method of forming an integrated optical device includes the following steps. A substrate is provided. The substrate includes, from bottom to top, a first semiconductor layer, an insulating layer and a second semiconductor layer. The second semiconductor layer is patterned to form a waveguide pattern. A surface smoothing treatment is performed to the waveguide pattern until a surface roughness Rz of the waveguide pattern is equal to or less than a desired value. A cladding layer is formed over the waveguide pattern.

Abstract: Disclosed are semiconductor packages and manufacturing method of the semiconductor packages. In one embodiment, a semiconductor package includes a substrate, a first waveguide, a semiconductor die, and an adhesive layer. The first waveguide is disposed on the substrate. The semiconductor die is disposed on the substrate and includes a second waveguide aligned with the first waveguide. The adhesive layer is disposed between the first waveguide and the second waveguide.

Abstract: The present disclosure provides a photo sensing device and a method for forming a photo sensing device. The photo sensing device includes a substrate, a photosensitive member, a superlattice layer and a diffusion barrier structure. The substrate includes a silicon layer at a front surface. The photosensitive member extends into and at least partially surrounded by the silicon layer, wherein an upper portion of the photosensitive member protruding from the silicon layer has a top surface and a facet tapering toward the top surface. The superlattice layer is disposed between the photosensitive member and the silicon layer. The diffusion barrier structure is disposed at a first side of the photosensitive member and a bottom of the diffusion barrier structure is at a level below a top surface of the silicon layer, wherein at least a portion of the diffusion barrier structure is laterally surrounded by the silicon layer.

Abstract: Provided are a polysaccharide composition and method capable of reducing, whether during pre-wear immersion or during post-wear cleaning, the amount of protein adsorbed on hard contact lenses and orthokeratology lenses. The polysaccharide composition and method reduce the amount of protein adsorbed on hard contact lenses and thereby prevent corneal abrasions and inflammations of the conjunctiva and cornea.

Abstract: Disclosed are apparatus and methods for optical coupling in optical communications. In one embodiment, an apparatus for optical coupling is disclosed. The apparatus includes: a planar layer; an array of scattering elements arranged in the planar layer at a plurality of intersections of a first set of concentric elliptical curves crossing with a second set of concentric elliptical curves rotated proximately 90 degrees to form a two-dimensional (2D) grating; a first taper structure formed in the planar layer connecting a first convex side of the 2D grating to a first waveguide; and a second taper structure formed in the planar layer connecting a second convex side of the 2D grating to a second waveguide. Each scattering element is a pillar into the planar layer. The pillar has a top surface whose shape is a concave polygon having at least 6 corners.

Abstract: A server system comprises a deck, a front panel arranged on the deck and defining a collecting space; two doors arranged on opposite sides of the deck, and being perpendicular to the front panel; two receiving frame structures arranged between the doors in a back to back arrangement, and configured to receive multiple rows and columns of a plurality of storage drives horizontally, wherein two periphery corridors are each defined between one of the doors and one of the receiving frame structure facing the one door; two circuit boards arranged between the two receiving frame structures, wherein the two circuit boards comprise a plurality of slits, wherein a central corridor is defined between the two circuit boards; a storage cover disposed above the deck over the two periphery corridors, the central corridor, the two receiving frame structures, and the two circuit boards.

Abstract: A photonic integrated circuit includes a substrate, an interconnection layer, and a plurality of silicon waveguides. The interconnection layer is over the substrate. The interconnection layer includes a seal ring structure and an interconnection structure surrounded by the seal ring structure. The seal ring structure has at least one recess from a top view. The recess concaves towards the interconnection structure. The silicon waveguides are embedded in the substrate.

Abstract: An enclosure for receiving a plurality of storage components is provided. The enclosure includes a deck, a top cover, a front panel, a stress distributing member, and a pair of component housings. The front panel is disposed between the deck and the top cover disposed over the deck. The stress distributing member traverses an entire width of the deck and is fastened to the deck and the top cover. A front section is defined between the front panel and the stress distributing member. The component housings are arranged in the front section. Each of the component housings has a front end facing outward the enclosure and a back end facing inward the enclosure. Each of the component housings is configured to receive at least a set of one or more of the storage components, and ends of the stress distributing member extend beyond the front ends of the component housings.

Abstract: Disclosed are edge couplers having a high coupling efficiency and low polarization dependent loss, and methods of making the edge couplers. In one embodiment, a semiconductor device for optical coupling is disclosed. The semiconductor device includes: a substrate; an optical waveguide over the substrate; and a plurality of layers over the optical waveguide. The plurality of layers includes a plurality of coupling pillars disposed at an edge of the semiconductor device. The plurality of coupling pillars form an edge coupler configured for optically coupling the optical waveguide to an optical fiber placed at the edge of the semiconductor device.

Abstract: An optical modulator includes a dielectric layer and a waveguide. The waveguide is disposed on the dielectric layer. The waveguide includes an electrical coupling portion, a slab portion, and an optical coupling portion. The slab portion is directly in contact with both of the electrical coupling portion and the optical coupling portion. The slab portion has a first sub-portion and a second sub-portion connected to the first sub-portion. A top surface of the electrical coupling portion, a top surface of the first sub-portion, and a top surface of the second sub-portion are located at different level heights.

Abstract: A photomask and a method of manufacturing a photomask are provided. According to an embodiment, a method includes: providing a substrate; depositing a reflective layer over the substrate; depositing a capping layer over the reflective layer; depositing an absorption layer over the capping layer; and treating the reflective layer by a laser beam to form a border region. The borderer region has a reflectivity less than about 0.1%.

Abstract: An optical device for coupling light propagating between a waveguide and an optical transmission component is provided. The optical device includes a taper portion and a grating portion. The taper portion is disposed between the grating portion and the waveguide. The grating portion includes rows of grating patterns. A first size of a first grating pattern in a first row of grating patterns is larger than a second size of a second grating pattern in a second row of grating patterns. A first distance between the first row of grating patterns and the waveguide is less than a second distance between the second row of grating patterns and the waveguide.

Abstract: A random bit generator includes a voltage source, a bit data cell, and a sensing control circuit. The voltage source provides a scan voltage during enroll operations. The data cell includes a first transistor and a second transistor. The first transistor has a first terminal coupled to a first bit line, a second terminal coupled to the voltage source, and a control terminal. The second transistor has a first terminal coupled to a second bit line, a second terminal coupled to the voltage source, and a control terminal. The sensing control circuit is coupled to the first bit line and the second bit line, and outputs a random bit data according to currents generated through the first transistor and the second transistor during an enroll operation of the bit data cell.

Abstract: An image sensor integrated with a convolutional neural network computation circuit is provided. The image sensor includes: a pixel array including pixels divided into pixel groups, wherein each pixel converts a light signal into a PWM signal; a convolution computation circuit controlling a turn-on time of a corresponding weighted current according to the first PWM signal of each pixel, and accumulating the weighted currents into an integrated current; a comparison circuit converting the integrated current into a second PWM signal and comparing it with that of an adjacent pixel group to output a larger one; and a classification circuit quantizing the second PWM signal to a quantization value according to a weight of a node in a fully-connected layer corresponding to each pixel group, accumulating the quantization values of all pixel groups into a feature value, and comparing the feature value with a feature threshold to obtain a classification result.

Abstract: The present disclosure provides a photo sensing device, the photo sensing device includes a substrate, including a silicon layer at a front surface, a photosensitive member extending into and at least partially surrounded by the silicon layer, a first doped region having a first conductivity type at a first side of the photosensitive member, wherein the first doped region is in the silicon layer, and a second doped region having a second conductivity type different from the first conductivity type at a second side of the photosensitive member opposite to the first side, wherein the second doped region is in the silicon layer, and the first doped region is apart from the second doped region, and a superlattice layer disposed between the photosensitive member and the silicon layer, wherein the superlattice layer includes a first material and a second material different from the first material.

Abstract: Integrated optical devices and methods of forming the same are disclosed. A method of forming an integrated optical device includes the following steps. A substrate is provided. The substrate includes, from bottom to top, a first semiconductor layer, an insulating layer and a second semiconductor layer. The second semiconductor layer is patterned to form a waveguide pattern. A surface smoothing treatment is performed to the waveguide pattern until a surface roughness Rz of the waveguide pattern is equal to or less than a desired value. A cladding layer is formed over the waveguide pattern.

Abstract: A semiconductor device structure includes a silicon-on-insulator (SOI) region. The SOI region includes a semiconductor substrate, a buried oxide layer disposed over the semiconductor substrate, and a silicon layer disposed over the buried oxide layer. The semiconductor device structure also includes a first shallow trench isolation (STI) structure penetrating through the silicon layer and the buried oxide layer and extending into the semiconductor substrate. The first STI structure includes a first liner contacting the semiconductor substrate and the silicon layer, a second liner covering the first liner and contacting the buried oxide layer, and a third liner covering the second liner. The first liner, the second liner and the third liner are made of different materials. The first STI structure also includes a first trench filling layer disposed over the third liner and separated from the second liner by the third liner.

Abstract: A barbell support assembly is provided, including: a base; a support arm, including a connection section and a hook section connected with a first end of the connection section, the connection section being rotatably connected to the base and swingable between a first position and a second position, the hook section defining a hooking space; and a restoration unit, connected with a second end of the connection section, biasing the support arm toward the first position; when a rod of a barbell is received within the hooking space, the barbell drives the support arm to move from the first position to the second position, and when the rod of the barbell is removed from the support arm, the restoration unit forces the support arm to return to the first position.