Patents by Inventor Hsiang Liu

Hsiang Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11265774
    Abstract: Apparatus and methods are provided for handover robustness. In novel aspect, the UE receives a conditional handover (CHO) command from a source gNB containing a set of candidate cells with corresponding triggering conditions; detects a handover conditions for a target gNB belonging to the set of candidate cells; and performs HO procedure towards the target gNB. In one embodiment, the conditional HO command further configures a validity timer that controls a validity of handover conditions for the set of candidate cells. The validity timer is started upon receiving the conditional HO command, the validity timer is stopped upon detecting at least one events comprising a handover condition is met and a normal handover command is received, and the conditional HO command is set to be invalid upon the expiration of the validity timer.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: March 1, 2022
    Assignee: MEDIATEK SINGAPORE PTE. LTD.
    Inventors: Yuanyuan Zhang, Li-Chuan Tseng, Yung-Hsiang Liu
  • Publication number: 20220059014
    Abstract: A light-emitting diode display device and a light-emission control method thereof are provided. The light-emitting diode display device includes a timing controller, multiple display pixels, and a scanning circuit. The display pixels form multiple display rows. The scanning circuit generates multiple scan signals and multiple light-emission signals that respectively drive the display rows. During a first data-writing time period of a first frame period, the timing controller provides multiple writing data to be respectively written into the display rows. During a light-emitting time period, the scanning circuit drives each of the light-emission signals to generate multiple pulses periodically according to a set period to drive the corresponding display rows. The light-emitting time period is after the first data-writing time period and before a second data-writing time period of a second frame period ends.
    Type: Application
    Filed: March 3, 2021
    Publication date: February 24, 2022
    Applicant: Au Optronics Corporation
    Inventors: Yu-Chieh Kuo, Yu-Hsun Chiu, Kai-Hsiang Liu, Che-Chia Chang, Shang-Jie Wu, Mei-Yi Li, Peng-Bo Xi, Chin I Chiang, Yan-Ru Chen, Ting-Wei Guo, Chia-Ting Hsieh
  • Publication number: 20220051619
    Abstract: A pixel circuit of low power consumption is provided, which includes a first transistor for providing a driving current, a light emitting element, a light emitting control circuit, a reset circuit, a writing circuit, and a storage capacitor. The light emitting control circuit is coupled between the first transistor and the light emitting element, and is for selectively conducting the driving current to the light emitting element. The reset circuit is for providing a first reference voltage to the light emitting element by a first frequency. The storage capacitor is coupled between the writing circuit and the first transistor. The writing circuit is for providing, by a second frequency different from the first frequency, a data voltage and a second reference voltage to the storage capacitor and the first transistor, respectively. The storage capacitor is for storing a first voltage for compensating a threshold voltage of the first transistor.
    Type: Application
    Filed: February 9, 2021
    Publication date: February 17, 2022
    Inventors: Kai-Wei SHIAU, Chia-Yuan YEH, Kuang-Hsiang LIU
  • Patent number: 11248903
    Abstract: A three-dimension measurement device includes a moving device, a projecting device, a surface-type image-capturing device and a processing device. The moving device carries an object, and moves the object to a plurality of positions. The projecting device generates a first light to the object. The surface-type image-capturing device senses a second light generated by the object in response to the first light to generate a phase image on each of the positions. The processing device is coupled to the surface-type image-capturing device and receives the phase images. The processing device performs a region-of-interest (ROI) operation for the phase images to generate a plurality of ROI images. The processing device performs a multi-step phase-shifting operation for the ROI images to calculate the surface height distribution of the object.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: February 15, 2022
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chia-Hung Cho, Po-Yi Chang, Yi-Sha Ku, Kai-Ping Chuang, Chih-Hsiang Liu, Fu-Cheng Yang
  • Patent number: 11245295
    Abstract: A rotor is provided. The rotor includes a main body, a plurality of magnets and a plurality of magnet-receiving slots. The plurality of magnet-receiving slots are disposed on the main body and disposed around a central axis. Each two adjacent magnet-receiving slots are symmetrical to each other. Each magnet-receiving slot includes a slot body and a first flux barrier connected with each other. Each magnet is contained in the corresponding slot body. Each first flux barriers includes a respective arc-cutting start point. A minimum arc-cutting distance is formed between the two respective arc-cutting start points. Each of the two respective arc-cutting start points is extended toward the central axis along an arc with a first arc length radius to define a first arc-cutting end point. The first arc length radius is greater than or equal to 0.2 times of the minimum arc-cutting distance.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: February 8, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yu-Hsiang Liu, Ta-Chien Yeh, Hsiang-Yun Hsiao, Chia-Hsiang Yang
  • Publication number: 20220005389
    Abstract: A micro LED display panel capable of simpler but more precise manufacture by pre-loading micro LEDs onto wafers which are then transferred to a substrate includes the substrate and light-emitting units. Each light-emitting unit includes a wafer unit and at least two micro LEDs on the wafer unit. The display panel includes pixel regions, each pixel region including at least three adjacent sub-pixel regions. Each sub-pixel region has one micro LED therein. Each micro LED of the light-emitting units is located in one sub-pixel region and the micro LEDs in each pixel regions emit light of different colors.
    Type: Application
    Filed: September 20, 2021
    Publication date: January 6, 2022
    Inventor: FENG-HSIANG LIU
  • Publication number: 20210385094
    Abstract: A Physical Unclonable Function (PUF) based true random number generator (TRNG), a method for generating true random numbers, and an associated electronic device are provided. The PUF based TRNG may include a first obfuscation circuit, a cryptography circuit coupled to the first obfuscation circuit, and a second obfuscation circuit coupled to the cryptography circuit. The first obfuscation circuit obtains a first PUF value from a PUF pool of the electronic device, and performs a first obfuscation function on a preliminary seed based on the first PUF value to generate a final seed. The cryptography circuit utilizes the final seed as a key of a cryptography function to generate preliminary random numbers. The second obfuscation circuit obtains a second PUF value from the PUF pool, and performs a second obfuscation function on the preliminary random numbers based on the second PUF value to generate final random numbers.
    Type: Application
    Filed: March 24, 2021
    Publication date: December 9, 2021
    Inventors: Chun-Yuan Yu, Yung-Hsiang Liu, Kai-Hsin Chuang
  • Publication number: 20210352528
    Abstract: Methods and apparatus are provided for the RRC message segmentation. In one novel aspect, the UE obtains the size Z of the RRC message and the size limit L of the underlying transmission at layer S of the UE protocol stack, wherein the layer S either the RRC layer, the PDCP layer, or a sublayer between an RRC layer and a PDCP layer. The UE triggers RRC message segmentation upon detecting Z is greater than L. In another embodiment, the layer R of the protocol stack of the UE receives, in order, a sequence of chunks of an RRC message, reassembles of the RRC message, wherein the layer R is selected from a same layer as the layer S and a layer higher than the layer S. In one novel aspect, the size limitation L is either predefined or obtained through network notification or UE inquiry.
    Type: Application
    Filed: July 23, 2021
    Publication date: November 11, 2021
    Inventors: Yung-Hsiang Liu, Chia-Chun Hsu, Nathan Edward Tenny
  • Publication number: 20210345294
    Abstract: A User Equipment (UE) de-multiplexes a paging indication, which precedes a Synchronization Signal Block (SSB) in time and is generated using the same sequence generation formula as that for generating a Secondary Synchronization Signal (SSS) in the SSB. From the de-multiplexed paging indication, the UE detects that it is paged for message reception and wakes up to receive the message in a next data reception period of the UE's DRX cycle.
    Type: Application
    Filed: July 16, 2021
    Publication date: November 4, 2021
    Inventors: Chi-Hsuan Hsieh, Wei-De Wu, Yung-Hsiang Liu
  • Patent number: 11164486
    Abstract: A micro LED display panel capable of simpler but more precise manufacture by pre-loading micro LEDs onto wafers which are then transferred to a substrate includes the substrate and light-emitting units. Each light-emitting unit includes a wafer unit and at least two micro LEDs on the wafer unit. The display panel includes pixel regions, each pixel region including at least three adjacent sub-pixel regions. Each sub-pixel region has one micro LED therein. Each micro LED of the light-emitting units is located in one sub-pixel region and the micro LEDs in each pixel regions emit light of different colors.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: November 2, 2021
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Feng-Hsiang Liu
  • Publication number: 20210328477
    Abstract: A motor, a cooling device, and a cooling method are disclosed. The cooling device is mounted on a stator of the motor. The cooling device includes a sleeve and a spiral duct. A wall of the sleeve has a spiral groove extending along the sleeve. The sleeve is sleeved onto the stator. The spiral duct is mounted in the spiral groove. The spiral duct has a first spiral form corresponding to the spiral groove, so that the spiral duct is correspondingly installed in the spiral groove. The spiral duct has a second spiral form extending along the spiral duct. A twisted spiral cooling channel is formed along the spiral pathway. A cooling fluid flowing through the twisted spiral cooling channel is subjected to the continuously changing cross-section of the twisted spiral cooling channel to enhance the swirl intensity, thereby improving the convection heat transfer effectiveness.
    Type: Application
    Filed: November 30, 2020
    Publication date: October 21, 2021
    Inventors: MI-CHING TSAI, SHYY-WOEI CHANG, MIN-FU HSIEH, KAI-JUNG SHIH, WEI-LING CAI, JEN-HSIANG LIU
  • Patent number: 11152270
    Abstract: A monitoring structure for a critical dimension of a lithography process including a dummy pattern layer and a patterned photoresist layer is provided. The dummy pattern layer includes a dummy pattern. The patterned photoresist layer includes at least one monitoring mark located above the dummy pattern. The monitoring mark includes a first portion and a second portion that intersect each other. The first portion extends in a first direction, the second portion extends in a second direction, and the first direction intersects the second direction.
    Type: Grant
    Filed: December 1, 2019
    Date of Patent: October 19, 2021
    Assignee: Winbond Electronics Corp.
    Inventors: Li-Chien Wang, Cheng-Hsiang Liu, Meng-Hsien Tsai
  • Patent number: 11152306
    Abstract: A method for semiconductor manufacturing is disclosed. The method includes receiving a device having a first surface through which a first metal or an oxide of the first metal is exposed. The method further includes depositing a dielectric film having Si, N, C, and O over the first surface such that the dielectric film has a higher concentration of N and C in a first portion of the dielectric film near the first surface than in a second portion of the dielectric film further away from the first surface than the first portion. The method further includes forming a conductive feature over the dielectric film. The dielectric film electrically insulates the conductive feature from the first metal or the oxide of the first metal.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: October 19, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Yi Wu, Li-Hsuan Chu, Ching-Wen Wen, Chia-Chun Hung, Chen Liang Chang, Chin-Szu Lee, Hsiang Liu
  • Publication number: 20210296949
    Abstract: A rotor is provided. The rotor includes a main body, a plurality of magnets and a plurality of magnet-receiving slots. The plurality of magnet-receiving slots are disposed on the main body and disposed around a central axis. Each two adjacent magnet-receiving slots are symmetrical to each other. Each magnet-receiving slot includes a slot body and a first flux barrier connected with each other. Each magnet is contained in the corresponding slot body. Each first flux barriers includes a respective arc-cutting start point. A minimum arc-cutting distance is formed between the two respective arc-cutting start points. Each of the two respective arc-cutting start points is extended toward the central axis along an arc with a first arc length radius to define a first arc-cutting end point. The first arc length radius is greater than or equal to 0.2 times of the minimum arc-cutting distance.
    Type: Application
    Filed: August 3, 2020
    Publication date: September 23, 2021
    Inventors: Yu-Hsiang Liu, Ta-Chien Yeh, Hsiang-Yun Hsiao, Chia-Hsiang Yang
  • Patent number: 11128149
    Abstract: A charging apparatus is provided. A detection circuit includes a voltage dividing path between an output terminal of a charging circuit and an output terminal of a reference voltage generating circuit. The detection circuit provides a detection signal according to a divided voltage on the voltage dividing path. A control circuit determines whether a load is connected to the charging apparatus according to the detection signal.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: September 21, 2021
    Assignee: Merry Electronics(Shenzhen) Co., Ltd.
    Inventors: Po-Chia Chien, Chi-Yin Lo, Yung-Hsiang Liu
  • Patent number: 11102678
    Abstract: Methods and apparatus are provided for the RRC message segmentation. In one novel aspect, the UE obtains the size Z of the RRC message and the size limit L of the underlying transmission at layer S of the UE protocol stack, wherein the layer S either the RRC layer, the PDCP layer, or a sublayer between an RRC layer and a PDCP layer. The UE triggers RRC message segmentation upon detecting Z is greater than L. In another embodiment, the layer R of the protocol stack of the UE receives, in order, a sequence of chunks of an RRC message, reassembles of the RRC message, wherein the layer R is selected from a same layer as the layer S and a layer higher than the layer S. In one novel aspect, the size limitation L is either predefined or obtained through network notification or UE inquiry.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: August 24, 2021
    Assignee: MediaTek INC.
    Inventors: Yung-Hsiang Liu, Chia-Chun Hsu, Nathan Edward Tenny
  • Patent number: 11102756
    Abstract: In one aspect, a User Equipment (UE) performs Radio Resource Management (RRM) measurements on downlink signals with a first cycle period equal to the UE's Discontinuous Reception (DRX) cycle period. The RRM measurements cycle period is lengthened when UE detects that a signal quality measurement of the primary cell is greater than the sum of a positive offset and a signal quality measurement of a neighboring cell having the best signal quality among all of UE's neighboring cells. In another aspect, a UE de-multiplexes a paging indication which precedes a Synchronization Signal Block (SSB) in time and is generated using the same sequence generation formula as that for generating a Secondary Synchronization Signal (SSS) in the SSB. From the de-multiplexed paging indication, the UE detects that it is paged for message reception and wakes up to receive the message in a next data reception period of the UE's DRX cycle.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: August 24, 2021
    Assignee: MediaTek Inc.
    Inventors: Chi-Hsuan Hsieh, Wei-De Wu, Yung-Hsiang Liu
  • Patent number: 11101684
    Abstract: A power supply method and a power supply apparatus including a power conversion circuit, a first and a second switching circuit, and a control circuit are provided. The power conversion circuit is coupled between a DC power source and a power supply terminal and performs a boosting operation according to a DC voltage of the DC power source to generate a boost voltage. The first switching circuit is coupled between an AC power source and the power supply terminal. The second switching circuit is coupled between the power conversion circuit and the power supply terminal. The control circuit enters a first mode after turning on the first and the second switching circuit, so the first switching circuit transmits a main AC voltage of the AC power source to the power supply terminal in the first mode. The boost voltage is greater than a peak value of the main AC voltage.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: August 24, 2021
    Assignee: Merry Electronics(Shenzhen) Co., Ltd.
    Inventors: Yung-Hsiang Liu, Wei-Kang Liang, Yu-Kai Wang
  • Publication number: 20210231570
    Abstract: An inspection apparatus for inspecting a light-emitting diode wafer is provided. The inspection apparatus includes a Z-axis translation stage, a sensing probe, a height measurement module, a carrier, an illumination light source, and a processing device. The sensing probe is integrated with the Z-axis translation stage. The Z-axis translation stage is adapted to drive the sensing probe to move in a Z axis. The sensing probe includes a photoelectric sensor, a beam splitter, and a photoelectric sensing structure. One of the photoelectric sensor of the sensing probe and the height measurement module is adapted to receive a light beam penetrating the beam splitter, and the other one of the photoelectric sensor of the sensing probe and the height measurement module is adapted to receive a light beam reflected by the beam splitter. The carrier is configured to carry the light-emitting diode wafer. The illumination light source is configured to emit an illumination beam to irradiate the light-emitting diode wafer.
    Type: Application
    Filed: December 28, 2020
    Publication date: July 29, 2021
    Applicant: Industrial Technology Research Institute
    Inventors: Yan-Rung Lin, Chih-Hsiang Liu, Chung-Lun Kuo, Hsiang-Chun Wei, Yeou-Sung Lin, Chieh-Yi Lo
  • Publication number: 20210210350
    Abstract: A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.
    Type: Application
    Filed: March 18, 2021
    Publication date: July 8, 2021
    Inventors: Wen-Chin Chen, Cheng-Yi Wu, Yu-Hung Cheng, Ren-Hua Guo, Hsiang Liu, Chin-Szu Lee