Abstract: A resonant flyback power converter includes: a first and a second transistors which form a half-bridge circuit for switching a transformer and a resonant capacitor to generate an output voltage; a current-sense device for sensing a switching current of the half-bridge circuit to generate a current-sense signal; and a switching control circuit generating a first and a second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal controls the half-bridge circuit to generate a positive current to magnetize the transformer and charge the resonant capacitor. The turn-on of the second driving signal controls the half-bridge circuit to generate a negative current to discharge the resonant capacitor. The switching control circuit turns off the first transistor when the positive current exceeds a positive-over-current threshold, and/or, turns off the second transistor when the negative current exceeds a negative-over-current threshold.

Abstract: A case is provided, including a shell, a fan frame, and a fan module. The shell is internally provided with a backplane and a motherboard, where the motherboard is connected to the backplane along a first axis, the backplane is connected with a plug connector, the plug connector includes a plug connector body and a plurality of connection terminals, and the connection terminals are located in the plug connector body. The fan frame bears the fan module, and the fan module includes a fan assembly and a matching connector. The matching connector is connected to the fan assembly, and the matching connector is connected to the plug connector along a second axis. The matching connector includes a matching connector body and a plurality of matching terminals, and the matching terminals are located in the matching connector body. The fan frame is fixed in the shell.

Abstract: A foldable electronic device having multiple screens is provided. The foldable electronic device includes a first screen, a worm rod, a moving member, at least one second screen, and at least one linking rod. The worm rod is rotatably disposed on the first screen. The moving member is coupled to the worm rod to move along the worm rod when the worm rod rotates. The second screen is movably disposed on the first screen. The linking rod is pivotally connected between the moving member and the second screen. When the moving part moves along the worm rod, the second screen is driven to move away from or closed to the worm rod by the linking rod, so that the second screen moves out of the first screen or is accommodated behind the first screen.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first conductive structure disposed within a first layer of the semiconductor structure. The semiconductor structure includes a dielectric structure disposed within a second layer of the semiconductor structure, with the second layer being disposed on the first layer. The semiconductor structure includes a second conductive structure disposed within a recessed portion of the dielectric structure that extends to the first conductive structure, with the second conductive structure having a concave recessed portion on a top surface of the second conductive structure. The semiconductor structure includes multiple layers of conductive material disposed within the concave recessed portion of the second conductive structure.

Abstract: A method and a system for mental index prediction are provided. The method includes the following steps. A plurality of images of a subject person are obtained. A plurality of emotion tags of the subject person in the images are analyzed. A plurality of integrated emotion tags in a plurality of predetermined time periods are calculated according to the emotion tags respectively corresponding to the images. A plurality of preferred features are determined according to the integrated emotion tags. A mental index prediction model is established according to the preferred features to predict a mental index according to the emotional index prediction model.

Abstract: The invention uses the control circuit formed on the silicon wafer to detect the leakage current of transistor formed on the depletion mode GaN wafer and then adjust the gate voltage of the depletion mode GaN transistor according to the detected leakage current. Essentially, the gate voltage is reduced or viewed as made more negative when the detected leakage current is larger a specific value. Thus, the gate voltage can be gradually adjusted to approach a specific threshold voltage that right block the leakage current. In other words, by making the gate voltage more negative when non-zero leakage current is detected and even by making the gate voltage more positive when zero leakage current is detected, the depletion mode GaN transistor can be adjusted to have an acceptable or even zero leakage current, a high reaction rate and an optimized efficiency.

Abstract: The present disclosure provides an image sensing module including a main board and an image sensor. The main board has a first surface and a second surface opposite to each other. The image sensor is disposed on the first surface of the main board and includes a plurality of isolation structures and a photoelectric conversion element between the plurality of isolation structures. A first angle is provided between a light incident surface of the photoelectric conversion element and the first surface of the main board, and a second angle is provided between a light beam incident to the light incident surface of the photoelectric conversion element and a normal vector of the light incident surface. The second angle is about equal to the Brewster angle at the interface of the light beam incident to the light incident surface.

Abstract: There is provided a smart detection system including multiple sensors and a central server. The central server confirms a model of every sensor and a position thereof in an operation area. The central server confirms an event position and predicts a user action according to event signals sent by the multiple sensors.

Abstract: A fabrication method is disclosed that includes: forming a first metal layer over first and second semiconductor structures; forming a first patterned photolithographic layer with an opening that exposes a portion of the first metal layer over the first semiconductor structure but not to a boundary between semiconductor structures; removing the exposed portion of the first metal layer; forming a second metal layer over the first and second semiconductor structures; forming a second patterned photolithographic layer with an opening that exposes a portion of the second metal layer over the second semiconductor structure but not to the boundary; removing the exposed portion of the first and second metal layers; wherein a barrier structure is generated between the first and second semiconductor structures that includes remaining portions of the first metal layer and a portion of the second metal layer overlying the remaining portions of the first metal layer.

Abstract: A cabling structure of a foldable electronic device includes a first body, a second body, a hinge module connecting the first body and the second body, a sliding member movably disposed in the second body, a flexible electrical connecting member connected to the first body, the second body, and the sliding member and being driven when the first body and the second body are rotated relatively, and a restoring module disposed in the second body and providing a force to the sliding member. The first body and the second body are rotated relatively to each other through the hinge module. When being rotated relatively to each other, the first body and the second body drive the flexible electrical connecting member and the sliding member. The restoring module restores the sliding member and the flexible electrical connecting member via the force.

Abstract: A foldable electronic device is provided, including a first body, a second body, a supporting member, a first hinge connecting the first body and the supporting member, a second hinge connecting the supporting member and the second body, and a gravity-type latch movably disposed in the supporting member. The first body and the supporting member are rotated relatively to be folded or unfolded via the first hinge, and the second body and the supporting member are rotated relatively to be folded or unfolded via the second hinge. In a transforming process of the first body folding to the supporting member and together unfolding relative to the second body, the gravity-type latch is latched onto the first body once the unfolding angle is less than a predetermined value, and the gravity-type latch is de-latched from the first body once the unfolding angle is equal to or greater than the predetermined value.

Abstract: An integrated circuit package including integrated circuit dies with slanted sidewalls and a method of forming are provided. The integrated circuit package may include a first integrated circuit die, a first gap-fill dielectric layer around the first integrated circuit die, a second integrated circuit die underneath the first integrated circuit die, and a second gap-fill dielectric layer around the second integrated circuit die. The first integrated circuit die may include a first substrate, wherein a first angle is between a first sidewall of the first substrate and a bottom surface of the first substrate, and a first interconnect structure on the bottom surface of the first substrate, wherein a second angle is between a first sidewall of the first interconnect structure and the bottom surface of the first substrate. The first angle may be larger than the second angle.

Abstract: A semiconductor device includes a fin extending from a substrate. The fin has a source/drain region and a channel region. The channel region includes a first semiconductor layer and a second semiconductor layer disposed over the first semiconductor layer and vertically separated from the first semiconductor layer by a spacing area. A high-k dielectric layer at least partially wraps around the first semiconductor layer and the second semiconductor layer. A metal layer is formed along opposing sidewalls of the high-k dielectric layer. The metal layer includes a first material. The spacing area is free of the first material.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor structure including a first well region disposed within a substrate and comprising a first doping type. A conductive structure overlies the first well region. A pair of first doped regions is disposed within the first well region on opposing sides of the conductive structure. The pair of first doped regions comprise a second doping type opposite the first doping type. A pair of second doped regions is disposed within the first well region on the opposing sides of the conductive structure. The pair of second doped regions comprise the second doping type and are laterally offset from the pair of first doped regions by a non-zero distance.

Abstract: A method for performing audio enhancement with aid of timing control includes: utilizing a UE to determine a first predetermined synchronization delay and notify a first earphone of the first predetermined synchronization delay, wherein a first DSP circuit in the first earphone is arranged to determine a synchronization point according to a first time point of a first event and the first predetermined synchronization delay for the first earphone; utilizing the UE to determine a second predetermined synchronization delay and notify a second earphone of the second predetermined synchronization delay, wherein a second DSP circuit in the second earphone is arranged to determine the synchronization point according to a second time point of a second event and the second predetermined synchronization delay for the second earphone; and utilizing the UE to receive first uplink audio data from the first earphone and receive second uplink audio data from the second earphone.

Abstract: A proportional valve includes a casing and a valve trim. The casing has at least one fluid inlet, a fluid outlet, at least one first connection passageway, at least one second connection passageway and an accommodating space. The first connection passageway is connected with the fluid inlet. The second connection passageway is connected with the fluid outlet. The valve trim is located in the accommodating space, including a flow splitter an adjusting rotor. The flow splitter has at least one third connection passageway and at least one fourth connection passageway. The third connection passageway is connected with the first connection passageway. The fourth connection passageway is connected with the second connection passageway. The adjusting rotor has a channel and at least one blocking portion. The adjusting rotor is rotatably disposed on the flow splitter so that the blocking portion blocks a part of the third connection passageway.

Abstract: Provided are sustained-release pharmaceutical compositions including a ketamine pamoate salt and a pharmaceutically acceptable carrier thereof. The compositions include aqueous suspension, solution and matrix delivery system, which can provide sustained release for anesthesia, analgesia or treatment of central nervous system and anti-inflammatory diseases.

Abstract: A method includes fabricating a semiconductor device, wherein the method includes depositing a coating layer on a first region and a second region under a loading condition such that a height of the coating layer in the first region is greater than a height of the coating layer in the second region. The method also includes applying processing gas to the coating layer to remove an upper portion of the coating layer such that a height of the coating layer in the first region is a same as a height of the coating layer in the second region.

Abstract: A manufacturing method of a chip package includes patterning a wafer to form a scribe trench, in which a light-transmissive function layer below the wafer is in the scribe trench, the light-transmissive function layer is between the wafer and a carrier, and a first included angle is formed between an outer wall surface and a surface of the wafer facing the light-transmissive function layer; cutting the light-transmissive function layer and the carrier along the scribe trench to form a chip package that includes a chip, the light-transmissive function layer, and the carrier; and patterning the chip to form an opening, in which the light-transmissive function layer is in the opening, a second included angle is formed between an inner wall surface of the chip and a surface of the chip facing the light-transmissive function layer, and is different from the first included angle.

Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.