Patents by Inventor Hsien A. Chen

Hsien A. Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240107755
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor structure including a first well region disposed within a substrate and comprising a first doping type. A conductive structure overlies the first well region. A pair of first doped regions is disposed within the first well region on opposing sides of the conductive structure. The pair of first doped regions comprise a second doping type opposite the first doping type. A pair of second doped regions is disposed within the first well region on the opposing sides of the conductive structure. The pair of second doped regions comprise the second doping type and are laterally offset from the pair of first doped regions by a non-zero distance.
    Type: Application
    Filed: December 11, 2023
    Publication date: March 28, 2024
    Inventors: Shih-Hsien Chen, Chun-Yao Ko, Felix Ying-Kit Tsui
  • Publication number: 20240105778
    Abstract: A semiconductor device includes a fin extending from a substrate. The fin has a source/drain region and a channel region. The channel region includes a first semiconductor layer and a second semiconductor layer disposed over the first semiconductor layer and vertically separated from the first semiconductor layer by a spacing area. A high-k dielectric layer at least partially wraps around the first semiconductor layer and the second semiconductor layer. A metal layer is formed along opposing sidewalls of the high-k dielectric layer. The metal layer includes a first material. The spacing area is free of the first material.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Inventors: I-Sheng CHEN, Yee-Chia YEO, Chih Chieh YEH, Cheng-Hsien WU
  • Publication number: 20240107250
    Abstract: A method for performing audio enhancement with aid of timing control includes: utilizing a UE to determine a first predetermined synchronization delay and notify a first earphone of the first predetermined synchronization delay, wherein a first DSP circuit in the first earphone is arranged to determine a synchronization point according to a first time point of a first event and the first predetermined synchronization delay for the first earphone; utilizing the UE to determine a second predetermined synchronization delay and notify a second earphone of the second predetermined synchronization delay, wherein a second DSP circuit in the second earphone is arranged to determine the synchronization point according to a second time point of a second event and the second predetermined synchronization delay for the second earphone; and utilizing the UE to receive first uplink audio data from the first earphone and receive second uplink audio data from the second earphone.
    Type: Application
    Filed: December 6, 2022
    Publication date: March 28, 2024
    Applicant: MEDIATEK INC.
    Inventors: Hsi-Hsien Chen, Yili Wang, Chia-Wei Tao, Sheng-Ming Wang
  • Publication number: 20240099994
    Abstract: Provided are sustained-release pharmaceutical compositions including a ketamine pamoate salt and a pharmaceutically acceptable carrier thereof. The compositions include aqueous suspension, solution and matrix delivery system, which can provide sustained release for anesthesia, analgesia or treatment of central nervous system and anti-inflammatory diseases.
    Type: Application
    Filed: December 18, 2020
    Publication date: March 28, 2024
    Applicant: ALAR PHARMACEUTICALS INC.
    Inventors: Tong-Ho Lin, Yung-Shun Wen, Chai-Hsien Chen, Ying-Ting Liu, Rui-Zhi Hou, Zhi-Rong Wu
  • Publication number: 20240102561
    Abstract: A proportional valve includes a casing and a valve trim. The casing has at least one fluid inlet, a fluid outlet, at least one first connection passageway, at least one second connection passageway and an accommodating space. The first connection passageway is connected with the fluid inlet. The second connection passageway is connected with the fluid outlet. The valve trim is located in the accommodating space, including a flow splitter an adjusting rotor. The flow splitter has at least one third connection passageway and at least one fourth connection passageway. The third connection passageway is connected with the first connection passageway. The fourth connection passageway is connected with the second connection passageway. The adjusting rotor has a channel and at least one blocking portion. The adjusting rotor is rotatably disposed on the flow splitter so that the blocking portion blocks a part of the third connection passageway.
    Type: Application
    Filed: November 3, 2022
    Publication date: March 28, 2024
    Applicant: COOLER MASTER CO., LTD.
    Inventors: Chiu Yu YEH, Wen-Hsien LIN, Wen-Hung CHEN
  • Patent number: 11942532
    Abstract: A method includes fabricating a semiconductor device, wherein the method includes depositing a coating layer on a first region and a second region under a loading condition such that a height of the coating layer in the first region is greater than a height of the coating layer in the second region. The method also includes applying processing gas to the coating layer to remove an upper portion of the coating layer such that a height of the coating layer in the first region is a same as a height of the coating layer in the second region.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chao-Hsuan Chen, Ming-Chia Tai, Yu-Hsien Lin, Shun-Hui Yang, Ryan Chia-Jen Chen
  • Patent number: 11943935
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Patent number: 11942563
    Abstract: A manufacturing method of a chip package includes patterning a wafer to form a scribe trench, in which a light-transmissive function layer below the wafer is in the scribe trench, the light-transmissive function layer is between the wafer and a carrier, and a first included angle is formed between an outer wall surface and a surface of the wafer facing the light-transmissive function layer; cutting the light-transmissive function layer and the carrier along the scribe trench to form a chip package that includes a chip, the light-transmissive function layer, and the carrier; and patterning the chip to form an opening, in which the light-transmissive function layer is in the opening, a second included angle is formed between an inner wall surface of the chip and a surface of the chip facing the light-transmissive function layer, and is different from the first included angle.
    Type: Grant
    Filed: June 1, 2023
    Date of Patent: March 26, 2024
    Assignee: XINTEC INC.
    Inventors: Chia-Sheng Lin, Hui-Hsien Wu, Jian-Hong Chen, Tsang-Yu Liu, Kuei-Wei Chen
  • Publication number: 20240092662
    Abstract: A method for removing a heavy metal from water includes subjecting a microbial solution containing a liquid culture of a urease-producing bacterial strain and a reaction solution containing a manganese compound and urea to a microbial-induced precipitation reaction, so as to obtain biomineralized manganese carbonate (MnCO3) particles, admixing the biomineralized MnCO3 particles with water containing a heavy metal, so that the biomineralized MnCO3 particles adsorb the heavy metal in the water to form a precipitate, and removing the precipitate from the water.
    Type: Application
    Filed: February 9, 2023
    Publication date: March 21, 2024
    Inventors: Chien-Yen CHEN, Yi-Hsun HUANG, Pin-Yun LIN, Anggraeni Kumala DEWI, Koyeli DAS, Uttara SUKUL, Tsung-Hsien CHEN, Raju Kumar SHARMA, Cheng-Kang LU, Chung-Ming LU
  • Publication number: 20240093416
    Abstract: A sewing machine includes a main body and a quick release needle plate module. The main body includes a base seat having an inner frame, and an outer case that is mounted to the inner frame and that defines an accommodating compartment. The quick release needle plate module includes a catch member, and a needle plate that covers the accommodating compartment, that is detachably pivoted to a rear section of the inner frame, and that engages the catch member. The quick release needle plate module further includes a press member inserted through the outer case and the inner frame, and operable to push the catch member to disengage the catch member. The needle plate has a plate body that covers the accommodating compartment, and a resilient member mounted between the inner frame and the plate body for driving pivot action of the plate body away from the inner frame.
    Type: Application
    Filed: January 20, 2023
    Publication date: March 21, 2024
    Applicant: ZENG HSING INDUSTRIAL CO., LTD.
    Inventors: Kun-Lung HSU, Ming-Ta LEE, Wei-Chen CHEN, Po-Hsien TSENG
  • Publication number: 20240094282
    Abstract: A circuit test structure includes a chip including a conductive line which traces a perimeter of the chip. The circuit test structure further includes an interposer electrically connected to the chip, wherein the conductive line is over both the chip and the interposer. The circuit test structure further includes a test structure connected to the conductive line. The circuit test structure further includes a testing site, wherein the test structure is configured to electrically connect the testing site to the conductive line.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 21, 2024
    Inventors: Ching-Fang CHEN, Hsiang-Tai LU, Chih-Hsien LIN
  • Publication number: 20240096806
    Abstract: A method for manufacturing a semiconductor structure is provided. A substrate including a fin structure is received, provided or formed. A sacrificial gate layer is formed over the fin structure and a source/drain structure is formed adjacent to the sacrificial gate layer, wherein the sacrificial gate layer is surrounded by a dielectric structure. The sacrificial gate layer is removed, wherein a recess is defined by the dielectric structure. A work function layer is formed in the recess, wherein the work function layer includes an overhang portion at an opening of the recess. A thickness of the work function layer is reduced. A glue layer is formed over the work function layer. A semiconductor structure thereof is also provided.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 21, 2024
    Inventors: CHAO-HSUAN CHEN, WEI CHEN HUNG, LI-WEI YIN, YU-HSIEN LIN, YIH-ANN LIN, RYAN CHIA-JEN CHEN
  • Publication number: 20240098932
    Abstract: A foldable electronic device, including a first body, a second body, an air valve movably disposed in the first body, at least one triggering member, and a hinge connecting the first body and the second body, is provided. The first body has multiple openings respectively located at two opposite surfaces. The triggering member is movably disposed in the first body and has a part exposed outside the first body. The air valve and the triggering member are mutually on moving paths of each other. The first body and the second body are rotated to be folded or unfolded relative to each other by the hinge. A part of the triggering member is suitable for bearing a force such that the triggering member drives the air valve, so that the air valve opens or closes the openings.
    Type: Application
    Filed: July 19, 2023
    Publication date: March 21, 2024
    Applicant: Acer Incorporated
    Inventors: Hui-Ping Sun, Jui-Yi Yu, Chun-Hung Wen, Yen-Chou Chueh, Yu-Ming Lin, Chun-Hsien Chen
  • Patent number: 11934223
    Abstract: A foldable electronic device, including a first body having a first shaft member, at least one second body having a second shaft member, and a latching member, is provided. The first shaft member and the second shaft member are coaxially pivoted together. The first shaft member has a recess. The second shaft member has a locking hole. The latching member is movably disposed in the recess and the locking hole, so that when the latching member leaves the locking hole, the first body and the second body are relatively pivoted through the first shaft member and the second shaft member, or when the latching member moves into the locking hole, the latching member interferes with the first shaft member and the second shaft member to block the first body and the second body from relatively pivoting.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: March 19, 2024
    Assignee: Acer Incorporated
    Inventors: Hui-Ping Sun, Chun-Hung Wen, Yen-Chou Chueh, Chun-Hsien Chen
  • Patent number: 11936927
    Abstract: A multimedia signal transmission control system is provided, which includes a transmitter control circuit and a receiver control circuit coupled with each other. The transmitter control circuit packs a control signal and at least one of multimedia signals into first hybrid data packets in an active video period of a video frame, and packs the control signal and another at least one of the multimedia signals into second hybrid data packets in a vertical front porch and a vertical back porch of the video frame. The receiver control circuit receives the first hybrid data packets in the active video period, and receives the second hybrid data packets in the vertical front porch and the vertical back porch. The receiver control circuit unpacks the first hybrid data packets and the second hybrid data packets to provide the control signal and the multimedia signals to a display module.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: March 19, 2024
    Assignee: Realtek Semiconductor Corporation
    Inventors: Yun-Hung Lin, Po-Hsien Wu, Li-Yu Chen
  • Patent number: 11934107
    Abstract: Embodiments described herein relate to methods of forming layers using maskless based lithography. In these embodiments, the methods implement ladders of dose change such that a geometric shape can be divided into overlaying sections. The overlaying sections can include a different dose of each section such that taper control can be achieved. The taper can be achieved by manipulating the geometry “mask data” into overlaying sections that are exposed by various doses controlled by pixel blending (PB) exposure techniques. To perform the methods described herein, a maskless lithography tool is used. The maskless lithography tool includes a controller that performs software based “mask data” manipulation.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: March 19, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Shih-Hsien Lee, Tingwei Chiu, Frederick Lie, Jang Fung Chen
  • Patent number: 11935728
    Abstract: In order to reduce the occurrence of current alarms in a semiconductor etching or deposition process, a controller determines an offset in relative positions of a cover ring and a shield over a wafer within a vacuum chamber. The controller provides a position alarm and/or adjusts the position of the cover ring or shield when the offset is greater than a predetermined value or outside a range of acceptable values.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Cheng Wu, Sheng-Ying Wu, Ming-Hsien Lin, Chun Fu Chen
  • Publication number: 20240088122
    Abstract: A method of forming a package includes bonding a device die to an interposer wafer, with the interposer wafer including metal lines and vias, forming a dielectric region to encircle the device die, and forming a through-via to penetrate through the dielectric region. The through-via is electrically connected to the device die through the metal lines and the vias in the interposer wafer. The method further includes forming a polymer layer over the dielectric region, and forming an electrical connector. The electrical connector is electrically coupled to the through-via through a conductive feature in the polymer layer. The interposer wafer is sawed to separate the package from other packages.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Jie Chen, Hsien-Wei Chen, Ming-Fa Chen, Chen-Hua Yu
  • Patent number: D1018527
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: March 19, 2024
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Han-Tsai Liu, Jyh-Chyang Tzou, Cheng-Shiue Jan, Yao-Hsien Yang, Pai-Feng Chen, I-Hao Chen
  • Patent number: D1018774
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: March 19, 2024
    Assignee: HOMEWAY TECHNOLOGY CO., LTD.
    Inventors: Ming-Kun Chen, Chin-Hsing Hsieh, Tsung-Hsien Hsieh