Abstract: In a method of manufacturing a photo mask, an etching mask layer having circuit patterns is formed over a target layer of the photo mask to be etched. The photo mask includes a backside conductive layer. The target layer is etched by plasma etching, while preventing active species of plasma from attacking the backside conductive layer.

Abstract: A photo mask for extreme ultra violet (EUV) lithography includes a substrate having a front surface and a back surface opposite to the front surface, a multilayer Mo/Si stack disposed on the front surface of the substrate, a capping layer disposed on the multilayer Mo/Si stack, an absorber layer disposed on the capping layer, and a backside conductive layer disposed on the back surface of the substrate. The backside conductive layer is made of tantalum boride.

Abstract: A mask for cleaning a lithography apparatus includes a mask substrate and a coating provided on a surface of the mask substrate. The coating is configured to trap particulate contaminant matter from the lithography apparatus. A method of cleaning a lithography tool is also provided preparing a cleaning mask including a particle trapping layer formed on a substrate. The method includes transferring the cleaning mask through a mask transferring route of the lithography tool. Subsequently, the method includes analyzing a particle trapped by the particle trapping layer.

Abstract: A method includes placing a photomask having a contamination on a surface thereof in a plasma processing chamber. The contaminated photomask is plasma processed in the plasma processing chamber to remove the contamination from the surface. The plasma includes oxygen plasma or hydrogen plasma.

Abstract: Fabricating a photomask includes forming a protection layer over a substrate. A plurality of multilayers of reflecting films are formed over the protection layer. A capping layer is formed over the plurality of multilayers. An absorption layer is formed over capping layer. A first photoresist layer is formed over portions of absorption layer. Portions of the first photoresist layer and absorption layer are patterned, forming first openings in absorption layer. The first openings expose portions of the capping layer. Remaining portions of first photoresist layer are removed and a second photoresist layer is formed over portions of absorption layer. The second photoresist layer covers at least the first openings. Portions of the absorption layer and capping layer and plurality of multilayer of reflecting films not covered by the second photoresist layer are patterned, forming second openings. The second openings expose portions of protection layer and second photoresist layer is removed.

Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.

Abstract: The present disclosure provides an apparatus for a semiconductor lithography process in accordance with some embodiments. The apparatus includes a pellicle membrane with a thermal conductive surface; a porous pellicle frame; and a thermal conductive adhesive layer that secures the pellicle membrane to the porous pellicle frame. The porous pellicle frame includes a plurality of pore channels continuously extending from an exterior surface of the porous pellicle frame to an interior surface of the porous pellicle frame.

Abstract: A method of manufacturing an extreme ultraviolet (EUV) lithography mask includes forming an image pattern in an absorption layer of EUV mask blank. The EUV mask blank includes: a multilayer stack including alternating molybdenum (Mo) and silicon (Si) layers disposed over a first surface of a mask substrate, a capping layer disposed over the multilayer stack, and an absorption layer disposed over the capping layer. A border region surrounds the image pattern having a trench wherein the absorption layer, the capping layer and at least a portion of the multilayer stack are etched. Concave sidewalls are formed in the border region or an inter-diffused portion is formed in the multilayer stack of the trench.

Abstract: Photomasks and methods of fabricating the photomasks are provided herein. In some examples, a layout for forming an integrated circuit device is received. The layout includes a set of printing features. A region of the layout is identified. The region is at a distance from the set of printing features such that an exposure region associated with a feature in the region does not affect a set of exposure regions associated with the set of printing features. A plurality of non-printing features is inserted into the region. A photomask is fabricated based on the layout.

Abstract: A lithography mask includes a substrate that contains a low thermal expansion material (LTEM). A reflective structure is disposed over a first side of the substrate. An absorber layer is disposed over the reflective structure. The absorber layer contains one or more first overlay marks. A conductive layer is disposed over a second side of the substrate, the second side being opposite the first side. The conductive layer contains portions of one or more second overlay marks. In some embodiments, the lithography mask includes an EUV lithography mask.

Abstract: The present disclosure provides a mask. The mask includes a substrate; an etch stop layer disposed on the substrate, wherein the etch stop layer includes at least one of ruthenium oxide, tungsten nitride, and titanium nitride and is doped with at least one of phosphorous (P), calcium (Ca), and sodium (Na); and a material layer disposed on the etch stop layer and patterned to have an opening, wherein the etch stop layer completely covers a portion of the substrate within the opening.

Abstract: The present disclosure describes a method to form alignment marks on or in the top layer of an extreme ultraviolet (EUV) mask blank without the use of photolithographic methods. For example, the method can include forming a metal structure on the top layer of the EUV mask blank by dispensing a hexacarbonylchromium vapor on the top layer of the EUV mask and exposing the hexacarbonylchromium vapor to an electron-beam. The hexacarbonylchromium vapor is decomposed to form the metal structure at an area which is proximate to where the hexacarbonylchromium vapors interact with the electron-beam. In another example, the method can include forming a patterned structure in the top layer of an EUV mask blank with the use of an etcher aperture and an etching process.

Abstract: A method comprises receiving a workpiece that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further comprises patterning the absorber layer to provide first trenches corresponding to circuit patterns on a wafer, and patterning the absorber layer, the capping layer, and the reflective multilayer to provide second trenches corresponding to a die boundary area on the wafer, thereby providing an extreme ultraviolet lithography (EUVL) mask. The method further comprises treating the EUVL mask with a treatment chemical that prevents exposed surfaces of the absorber layer from oxidation.

Abstract: The present disclosure provides a phase shift mask. The phase shift mask includes a transparent substrate; an etch stop layer disposed on the substrate; and a tunable transparent material layer disposed on the etch stop layer and patterned to have an opening, wherein the tunable transparent material layer is designed to provide phase shift and has a transmittance greater than 90%.

Abstract: A photomask includes a pattern region and a plurality of defects in the pattern region. The photomask further includes a first fiducial mark outside of the pattern region, wherein the first fiducial mark includes identifying information for the photomask, the first fiducial mark has a first size and a first shape. The photomask further includes a second fiducial mark outside of the pattern region. The second fiducial mark has a second size different from the first size, or a second shape different from the first shape.

Abstract: A structure including an EUV mask and a pellicle attached to the EUV mask. The pellicle includes a pellicle frame and a plurality of pellicle membrane layers attached to the pellicle frame. The plurality of pellicle membrane layers include at least one core pellicle membrane layer and an additional pellicle membrane layer is disposed on the at least one core pellicle membrane layer. In some embodiments, the additional pellicle membrane layer is a material having a thermal emissivity greater than 0.2, a transmittance greater than 80%, and a refractive index (n) for 13.5 nanometer source of greater than 0.9.

Abstract: The present disclosure describes a method to form alignment marks on or in the top layer of an extreme ultraviolet (EUV) mask blank without the use of photolithographic methods. For example, the method can include forming a metal structure on the top layer of the EUV mask blank by dispensing a hexacarbonylchromium vapor on the top layer of the EUV mask and exposing the hexacarbonylchromium vapor to an electron-beam. The hexacarbonylchromium vapor is decomposed to form the metal structure at an area which is proximate to where the hexacarbonylchromium vapors interact with the electron-beam. In another example, the method can include forming a patterned structure in the top layer of an EUV mask blank with the use of an etcher aperture and an etching process.

Abstract: A method for fabricating a pellicle includes forming a first dielectric layer over a back surface of a substrate. After forming the first dielectric layer, and in some embodiments, a graphene layer is formed over a front surface of the substrate. In some examples, after forming the graphene layer, the first dielectric layer is patterned to form an opening in the first dielectric layer that exposes a portion of the back surface of the substrate. Thereafter, while using the patterned first dielectric layer as a mask, an etching process may be performed to the back surface of the substrate to form a pellicle having a pellicle membrane that includes the graphene layer.

Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.

Abstract: A method of fabricating a photomask includes selectively exposing portions of a photomask blank to radiation to change an optical property of the portions of the photomask blank exposed to the radiation, thereby forming a pattern of exposed portions of the photomask blank and unexposed portions of the photomask blank. The pattern corresponds to a pattern of semiconductor device features.