Patents by Inventor Hsin-Chang Lee

Hsin-Chang Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180059531
    Abstract: The present disclosure provides a phase shift mask. The phase shift mask includes a transparent substrate; an etch stop layer disposed on the substrate; and a tunable transparent material layer disposed on the etch stop layer and patterned to have an opening, wherein the tunable transparent material layer is designed to provide phase shift and has a transmittance greater than 90%.
    Type: Application
    Filed: May 17, 2017
    Publication date: March 1, 2018
    Inventors: Yun-Yue Lin, Hsin-Chang Lee
  • Patent number: 9897910
    Abstract: A method for forming a lithography mask includes forming a capping layer on a reflective multilayer layer, the capping layer comprising a first material, forming a patterned patterning layer on the capping layer, and introducing a secondary material into the capping layer, the secondary material having an atomic number that is smaller than 15.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: February 20, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pei-Cheng Hsu, Chih-Cheng Lin, Ta-Cheng Lien, Wei-Shiuan Chen, Hsin-Chang Lee, Anthony Yen
  • Patent number: 9869928
    Abstract: Embodiments of EUV photomasks and methods for forming a EUV photomask are provided. The method comprises providing a substrate, a reflective layer, a capping layer, a hard mask layer, and forming an opening therein. An absorber layer is then filled in the opening and over the top surface of the hard mask layer. A planarized process is provided to remove the absorber layer above the top surface of the hard mask layer and form an absorber in the opening, wherein the absorber has a top portion wider than a bottom portion.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: January 16, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tao-Min Huang, Chih-Tsung Shih, Chia-Jen Chen, Hsin-Chang Lee, Anthony Yen
  • Publication number: 20170351170
    Abstract: The present disclosure provides an apparatus for a semiconductor lithography process in accordance with some embodiments. The apparatus includes a pellicle membrane with a thermal conductive surface; a porous pellicle frame; and a thermal conductive adhesive layer that secures the pellicle membrane to the porous pellicle frame. The porous pellicle frame includes a plurality of pore channels continuously extending from an exterior surface of the porous pellicle frame to an interior surface of the porous pellicle frame.
    Type: Application
    Filed: August 24, 2017
    Publication date: December 7, 2017
    Inventors: AMO CHEN, YUN-YUE LIN, TA-CHENG LIEN, HSIN-CHANG LEE, CHIH-CHENG LIN, JENG-HORNG CHEN
  • Patent number: 9759997
    Abstract: The present disclosure provides an apparatus for a semiconductor lithography process in accordance with some embodiments. The apparatus includes a pellicle membrane with a thermal conductive surface; a porous pellicle frame; and a thermal conductive adhesive layer that secures the pellicle membrane to the porous pellicle frame. The porous pellicle frame includes a plurality of pore channels continuously extending from an exterior surface of the porous pellicle frame to an interior surface of the porous pellicle frame.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: September 12, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Amö Chen, Yun-Yue Lin, Ta-Cheng Lien, Hsin-Chang Lee, Chih-Cheng Lin, Jeng-Horng Chen
  • Publication number: 20170176850
    Abstract: The present disclosure provides an apparatus for a semiconductor lithography process in accordance with some embodiments. The apparatus includes a pellicle membrane with a thermal conductive surface; a porous pellicle frame; and a thermal conductive adhesive layer that secures the pellicle membrane to the porous pellicle frame. The porous pellicle frame includes a plurality of pore channels continuously extending from an exterior surface of the porous pellicle frame to an interior surface of the porous pellicle frame.
    Type: Application
    Filed: December 17, 2015
    Publication date: June 22, 2017
    Inventors: Amö Chen, Yun-Yue Lin, Ta-Cheng Lien, Hsin-Chang Lee, Chih-Cheng Lin, JENG-HORNG CHEN
  • Patent number: 9651857
    Abstract: A photomask includes a low thermal expansion material (LTEM) substrate, a patterned opaque layer over the LTEM substrate, and a patterned capping layer over the opaque layer. The patterned capping layer includes a transition metal material for suppressing haze growth, such as metal oxide, metal nitride, or metal oxynitride. The material in the capping layer reacts with a hydrogenic compound from a lithography environment to for an atomic level hydrogen passivation layer. The passivation layer has superior ability to suppress photo-induced haze defect growth on the photomask surface, to improve production cycle time and reduce the production cost.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: May 16, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY. LTD.
    Inventors: Yun-Yue Lin, Chia-Jen Chen, Hsin-Chang Lee, Ta-Cheng Lien, Anthony Yen
  • Publication number: 20170108768
    Abstract: A method for forming a lithography mask includes forming a capping layer on a reflective multilayer layer, the capping layer comprising a first material, forming a patterned patterning layer on the capping layer, and introducing a secondary material into the capping layer, the secondary material having an atomic number that is smaller than 15.
    Type: Application
    Filed: December 30, 2016
    Publication date: April 20, 2017
    Inventors: PEI-CHENG HSU, CHIH-CHENG LIN, TA-CHENG LIEN, WEI-SHIUAN CHEN, HSIN-CHANG LEE, ANTHONY YEN
  • Patent number: 9557649
    Abstract: A photolithographic technique includes receiving a mask having a printing feature region, a sub-resolution assist feature (SRAF) region, and a third region. Each region has a different thickness of an absorptive layer disposed therein. The technique also includes exposing the mask to radiation, such that an intensity of radiation reflected by the SRAF region is substantially between an intensity of radiation reflected by the printing feature region and an intensity of radiation reflected by the third region. Using the radiation reflected by the printing feature region, the radiation reflected by the SRAF region, and the radiation reflected by the third region a workpiece is exposed.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: January 31, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tao-Min Huang, Chia-Jen Chen, Hsin-Chang Lee, Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9535317
    Abstract: A method for forming a lithography mask includes forming a capping layer on a reflective multilayer layer, the capping layer comprising a first material, forming a patterned patterning layer on the capping layer, and introducing a secondary material into the capping layer, the secondary material having an atomic number that is smaller than 15.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: January 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pei-Cheng Hsu, Chih-Cheng Lin, Ta-Cheng Lien, Wei-Shiuan Chen, Hsin-Chang Lee, Anthony Yen
  • Patent number: 9530200
    Abstract: A method and a system for inspection of a patterned structure are provided. In various embodiments, the method for inspection of a patterned structure includes transferring the patterned structure into a microscope. The method further includes acquiring a top-view image of the patterned structure by the microscope. The method further includes transferring the patterned structure out of the microscope and exporting the top-view image to an image analysis processor. The method further includes measuring a difference between a contour of the top-view image and a predetermined layout of the patterned structure by the image analysis processor.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: December 27, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Chang Hsueh, Chia-Jen Chen, Hsin-Chang Lee
  • Publication number: 20160349610
    Abstract: A method for fabricating a pellicle assembly for a lithography process includes fabricating a pellicle frame including a sidewall having a porous material. In some embodiments, the pellicle frame is subjected to an anodization process to form the porous material. The porous material includes a plurality of pore channels extending, in a direction perpendicular to an exterior surface of the sidewall, from the exterior surface to an interior surface of the sidewall. In various embodiments, a pellicle membrane is formed, and the pellicle membrane is attached to the pellicle frame such that the pellicle membrane is suspended by the pellicle frame. Some embodiments disclosed herein further provide a system including a membrane and a pellicle frame that secures the membrane across the pellicle frame. In some examples, a portion of the pellicle frame includes a porous material, where the porous material includes the plurality of pore channels.
    Type: Application
    Filed: May 29, 2015
    Publication date: December 1, 2016
    Inventors: Pei-Cheng Hsu, Chih-Cheng Lin, Hsin-Chang Lee, Ta-Cheng Lien, Anthony Yen
  • Publication number: 20160299419
    Abstract: A lithography mask includes a substrate, a reflective multilayer (ML) on the substrate, and a barrier layer on the reflective ML. The barrier layer includes at least one material selected from the group consisting of ruthenium nitride, hafnium oxide, aluminum nitride, boron carbide, boron nitride, and a combination thereof.
    Type: Application
    Filed: June 13, 2016
    Publication date: October 13, 2016
    Inventors: Yun-Yue Lin, Hsin-Chang Lee, Chia-Jen Chen, Anthony Yen
  • Patent number: 9429835
    Abstract: The present disclosure provides a structure of a photomask. The photomask includes a substrate; and a conductive material layer dispose over the substrate and patterned to include a plurality of openings and a recess structure surrounding the plurality of openings.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: August 30, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chang Hsueh, Chia-Jen Chen, Hsin-Chang Lee
  • Publication number: 20160231647
    Abstract: A method for fabricating a pellicle for EUV lithography processes includes placing a hard mask in contact with a surface of a substrate. In some embodiments, the hard mask is configured to pattern the surface of the substrate to include a first region and a second region surrounding the first region. By way of example, while the mask in positioned in contact with the substrate, an etch process of the substrate is performed to etch the first and second regions into the substrate. Thereafter, an excess substrate region is removed so as to separate the etched first region from the excess substrate region. In various embodiments, the etched and separated first region serves as a pellicle for an extreme ultraviolet (EUV) lithography process.
    Type: Application
    Filed: February 5, 2015
    Publication date: August 11, 2016
    Inventors: Pei-Cheng Hsu, Chih-Tsung Shih, Jeng-Horng Chen, Chih-Cheng Lin, Hsin-Chang Lee, Shinn-Sheng Yu, Ta-Cheng Lien, Anthony Yen
  • Publication number: 20160223900
    Abstract: Embodiments of EUV photomasks and methods for forming a EUV photomask are provided. The method comprises providing a substrate, a reflective layer, a capping layer, a hard mask layer, and forming an opening therein. An absorber layer is then filled in the opening and over the top surface of the hard mask layer. A planarized process is provided to remove the absorber layer above the top surface of the hard mask layer and form an absorber in the opening, wherein the absorber has a top portion wider than a bottom portion.
    Type: Application
    Filed: April 11, 2016
    Publication date: August 4, 2016
    Inventors: Tao-Min Huang, Chih-Tsung Shih, Chia-Jen Chen, Hsin-Chang Lee, Anthony Yen
  • Publication number: 20160195812
    Abstract: A photolithographic technique includes receiving a mask having a printing feature region, a sub-resolution assist feature (SRAF) region, and a third region. Each region has a different thickness of an absorptive layer disposed therein. The technique also includes exposing the mask to radiation, such that an intensity of radiation reflected by the SRAF region is substantially between an intensity of radiation reflected by the printing feature region and an intensity of radiation reflected by the third region. Using the radiation reflected by the printing feature region, the radiation reflected by the SRAF region, and the radiation reflected by the third region a workpiece is exposed.
    Type: Application
    Filed: March 14, 2016
    Publication date: July 7, 2016
    Inventors: TAO-MIN HUANG, CHIA-JEN CHEN, HSIN-CHANG LEE, CHIH-TSUNG SHIH, SHINN-SHENG YU, JENG-HORNG CHEN, ANTHONY YEN
  • Publication number: 20160187770
    Abstract: A method for forming a lithography mask includes forming a capping layer on a reflective multilayer layer, the capping layer comprising a first material, forming a patterned patterning layer on the capping layer, and introducing a secondary material into the capping layer, the secondary material having an atomic number that is smaller than 15.
    Type: Application
    Filed: December 24, 2014
    Publication date: June 30, 2016
    Inventors: Pei-Cheng Hsu, Chih-Cheng Lin, Ta-Cheng Lien, Wei-Shiuan Chen, Hsin-Chang Lee, Anthony Yen
  • Patent number: 9366953
    Abstract: The present disclosure provides a lithography mask comprising a substrate, a reflective multiplayer (ML) on the substrate, a barrier layer on the reflective ML, and an absorber layer over the barrier layer. In some embodiments, a thickness of the barrier layer is less than or equal to about 10 nm. In some embodiments, a portion of the absorber layer and a portion of the barrier layer are removed. The present disclosure also provides a method for fabricating a lithography mask, and a method for patterning a substrate using a lithography mask.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: June 14, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yun-Yue Lin, Hsin-Chang Lee, Chia-Jen Chen, Anthony Yen
  • Patent number: D794954
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: August 22, 2017
    Assignee: Stanley Black & Decker, Inc.
    Inventors: Hsin-Chang Lee, Nadin Daniel Horovitz