Patents by Inventor Hsin-Chi Chen

Hsin-Chi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11011566
    Abstract: A bonding pad structure comprises an interconnect layer, an isolation layer over the interconnect layer, a conductive pad, and one or more non-conducting stress-releasing structures. The conductive pad comprises a planar portion over the isolation layer, and one or more bridging portions extending through at least the isolation layer and to the interconnect layer for establishing electric contact therewith, wherein there is a trench in the one or more bridging portions. The one or more non-conducting stress-releasing structures are disposed between the isolation layer and the conductive pad. The trench is surrounded by one of the one or more non-conducting stress-releasing structures from a top view.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: May 18, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Volume Chien, I-Chih Chen, Hsin-Chi Chen, Hung-Ta Huang, Ying-Hao Chen, Ying-Lang Wang
  • Publication number: 20210091091
    Abstract: A semiconductor structure includes a first transistor comprising a first gate structure over a first active region in a substrate. The semiconductor structure further includes a second active region in the substrate. The semiconductor structure further includes a first butted contact. The butted contact includes a first portion extending in a first direction and overlapping the second active region, and a second portion extending from the first portion in a second direction, different from the first direction, wherein the second portion directly contacts the first gate structure.
    Type: Application
    Filed: December 3, 2020
    Publication date: March 25, 2021
    Inventors: You Che CHUANG, Chih-Ming LEE, Hsin-Chi CHEN, Hsun-Ying HUANG
  • Patent number: 10943942
    Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a device layer and a trench isolation. The semiconductor substrate has a front side surface and a back side surface opposite to the front side surface. The radiation sensing member is disposed in a photosensitive region of the semiconductor substrate and extends from the front side surface of the semiconductor substrate. The radiation sensing member includes a semiconductor material with an optical band gap energy smaller than 1.77 eV. The device layer is over the front side surface of the semiconductor substrate and the radiation sensing member. The trench isolation is disposed in an isolation region of the semiconductor substrate and extends from the back side surface of the semiconductor substrate.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: March 9, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Yu Wei, Yen-Liang Lin, Kuo-Cheng Lee, Hsun-Ying Huang, Hsin-Chi Chen
  • Publication number: 20210057468
    Abstract: Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.
    Type: Application
    Filed: September 4, 2020
    Publication date: February 25, 2021
    Inventors: Chiu-Jung Chen, Chun-Hao Chou, Hsin-Chi Chen, Kuo-Cheng Lee, Volume Chien, Yung-Lung Hsu, Yun-Wei Cheng
  • Publication number: 20210033176
    Abstract: A buffer gear set mounted between a motor and a transmission assembly of a power tool is disclosed to include an outer ring seat and an inner ring seat coaxially arranged together, a planetary gear set mounted in the outer ring seat, accommodation spaces defined between the outer ring seat and the inner ring seat, and buffer members respectively accommodated in the accommodation spaces. When an external force is applied between the outer ring seat and the inner ring seat, the buffer members absorb a part of the external force transmitted between the outer ring seat and the inner ring seat, thereby reducing the impact of the overall power tool, achieving shock absorption, reducing noise and improving work efficiency and quality.
    Type: Application
    Filed: September 10, 2019
    Publication date: February 4, 2021
    Inventor: HSIN-CHI CHEN
  • Patent number: 10872921
    Abstract: An image sensor and a method for fabricating the image sensor are provided. In the method for fabricating the image sensor, at first, a substrate having a first surface and a second surface opposite to the first surface is provided. Then, light-sensitive regions are formed in the substrate. Thereafter, transfer gate structures are formed on the first surface of the substrate. Then, the first surface of the substrate is formed to form recess structures on the light-sensitive regions. Thereafter, light-reflective layers are formed to cover the recess structures of the first surface of the substrate, in which the recess structures are filled with protrusion structures of the light-reflective layers. Further, the second surface of the substrate may be etched to form recess structures corresponding to the light-sensitive regions.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: December 22, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Hsin-Chi Chen
  • Publication number: 20200395395
    Abstract: A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A plurality of isolation structures are each disposed between two respective radiation-sensing regions. The isolation structures protrude out of the second side of the substrate.
    Type: Application
    Filed: August 31, 2020
    Publication date: December 17, 2020
    Inventors: Kuo-Cheng Lee, Yun-Wei Cheng, Yung-Lung Hsu, Hsin-Chi Chen
  • Patent number: 10861859
    Abstract: A semiconductor structure includes a first transistor including a first gate structure over a first active region in a substrate, a second transistor including a second gate structure over a second active region in the substrate, and a butted contact electrically connecting the second active region of the second transistor to the first gate structure of the first transistor. The butted contact includes a first portion extending along a first direction and overlapping at least the second active region, and a second portion extending along a second direction different from the first direction and intersecting the first portion. The second portion extends over the first gate structure.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: December 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: You Che Chuang, Chih-Ming Lee, Hsin-Chi Chen, Hsun-Ying Huang
  • Patent number: 10851970
    Abstract: A method of fabricating a casing including steps of providing a polycarbonate substrate, printing a first material on the polycarbonate substrate to form a light shielding layer by using a first screen, and printing a second material on the light shielding layer to form a light transmission layer by using a second screen is provided. The light shielding layer has at least one patterned transmissive region. The light transmission layer covers the at least one patterned transmissive region and a portion of polycarbonate substrate exposed by the at least one patterned transmissive region. Mesh counts of the first screen is greater than that of the second screen. A casing including a polycarbonate substrate, a light shielding layer, and a light transmission layer is provided. A thickness of the light transmission layer is greater than a thickness of the light shielding layer. An electronic device adopting the casing is provided.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: December 1, 2020
    Assignee: Wistron Corporation
    Inventors: Yi-An Chen, Hsin-Chi Chen, Yu-Teng Chang, Ying-Chi Wu, Hsiang-Ho Lo
  • Publication number: 20200321294
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first bonding layer formed below a first substrate, a first bonding via formed through the first oxide layer and the first bonding layer, a first dummy pad formed in the first bonding layer. The semiconductor structure includes a second semiconductor device. The second semiconductor device includes a second bonding layer formed over a second substrate, a second bonding via formed through the second bonding layer, and a second dummy pad formed in the second bonding layer. The semiconductor structure includes a bonding structure between the first substrate and the second substrate, wherein the bonding structure includes the first bonding via bonded to the second bonding via and the first dummy pad bonded to the second dummy pad.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Yu WEI, Cheng-Yuan LI, Yen-Liang LIN, Kuo-Cheng LEE, Hsun-Ying HUANG, Hsin-Chi CHEN
  • Patent number: 10790321
    Abstract: The present disclosure relates to a CMOS image sensor, and an associated method of formation. In some embodiments, the CMOS image sensor comprises a floating diffusion region disposed at one side of a transfer gate within a substrate and a photo detecting column disposed at the other side of the transfer gate opposing to the floating diffusion region within the substrate. The photo detecting column comprises a doped sensing layer with a doping type opposite to that of the substrate. The photo detecting column and the substrate are in contact with each other at a junction interface comprising one or more recessed portions. By forming the junction interface with recessed portions, the junction interface is enlarged compared to a previous p-n junction interface without recessed portions, and thus a full well capacity of the photodiode structure is improved.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: September 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Yu Wei, Hsin-Chi Chen, Kuo-Cheng Lee, Ping-Hao Lin, Hsun-Ying Huang, Yen-Liang Lin, Yu Ting Kao
  • Patent number: 10790391
    Abstract: The present disclosure describes a method that mitigates the formation of facets in source/drain silicon germanium (SiGe) epitaxial layers. The method includes forming an isolation region around a semiconductor layer and a gate structure partially over the semiconductor layer and the isolation region. Disposing first photoresist structures over the gate structure, a portion of the isolation region, and a portion of the semiconductor layer and doping, with germanium (Ge), exposed portions of the semiconductor layer and exposed portions of the isolation region to form Ge-doped regions that extend from the semiconductor layer to the isolation region. The method further includes disposing second photoresist structures over the isolation region and etching exposed Ge-doped regions in the semiconductor layer to form openings, where the openings include at least one common sidewall with the Ge-doped regions in the isolation region. Finally the method includes growing a SiGe epitaxial stack in the openings.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: September 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Gulbagh Singh, Hsin-Chi Chen, Kun-Tsang Chuang
  • Publication number: 20200303435
    Abstract: A semiconductor structure includes an ILD disposed over a semiconductive substrate, an isolation disposed between the semiconductive substrate and the ILD, and a conductive pad disposed within the semiconductive substrate, the isolation and the ILD. A top surface of the conductive pad is substantially parallel with two surfaces of the semiconductive substrate. The top surface of the conductive pad is between the two surfaces of the semiconductive substrate. Sidewalls of the conductive pad are in direct contact with the ILD and the isolation.
    Type: Application
    Filed: June 9, 2020
    Publication date: September 24, 2020
    Inventors: CHIA-YU WEI, CHIN-HSUN HSIAO, YI-HSING CHU, YEN-LIANG LIN, YUNG-LUNG HSU, HSIN-CHI CHEN
  • Publication number: 20200295046
    Abstract: Bulk semiconductor substrates configured to exhibit semiconductor-on-insulator (SOI) behavior, and corresponding methods of fabrication, are disclosed herein. An exemplary bulk substrate configured to exhibit SOI behavior includes a first isolation trench that defines a channel region of the bulk substrate and a second isolation trench that defines an active region that includes the channel region. The first isolation trench includes a first isolation trench portion and a second isolation trench portion disposed over the first isolation trench portion. A first isolation material fills the first isolation trench portion, and an epitaxial material fills the second isolation trench portion. The epitaxial material is disposed on the first isolation material. A second isolation material fills the second isolation trench. A portion of the bulk substrate underlying the first isolation trench and the channel region is configured to have a higher resistance than the bulk substrate.
    Type: Application
    Filed: June 1, 2020
    Publication date: September 17, 2020
    Inventors: Gulbagh Singh, Kun-Tsang Chuang, Hsin-Chi Chen
  • Patent number: 10770502
    Abstract: Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: September 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chiu-Jung Chen, Chun-Hao Chou, Hsin-Chi Chen, Kuo-Cheng Lee, Volume Chien, Yung-Lung Hsu, Yun-Wei Cheng
  • Patent number: 10770501
    Abstract: A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A plurality of isolation structures are each disposed between two respective radiation-sensing regions. The isolation structures protrude out of the second side of the substrate.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: September 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Cheng Lee, Yun-Wei Cheng, Yung-Lung Hsu, Hsin-Chi Chen
  • Publication number: 20200271302
    Abstract: A method of fabricating a casing including steps of providing a polycarbonate substrate, printing a first material on the polycarbonate substrate to form a light shielding layer by using a first screen, and printing a second material on the light shielding layer to form a light transmission layer by using a second screen is provided. The light shielding layer has at least one patterned transmissive region. The light transmission layer covers the at least one patterned transmissive region and a portion of polycarbonate substrate exposed by the at least one patterned transmissive region. Mesh counts of the first screen is greater than that of the second screen. A casing including a polycarbonate substrate, a light shielding layer, and a light transmission layer is provided. A thickness of the light transmission layer is greater than a thickness of the light shielding layer. An electronic device adopting the casing is provided.
    Type: Application
    Filed: May 28, 2019
    Publication date: August 27, 2020
    Applicant: Wistron Corporation
    Inventors: Yi-An Chen, Hsin-Chi Chen, Yu-Teng Chang, Ying-Chi Wu, Hsiang-Ho Lo
  • Publication number: 20200266225
    Abstract: A method for forming a light sensing device is provided. The method includes forming a light sensing region in a semiconductor substrate and forming a light shielding layer over the semiconductor substrate. The method also includes forming a dielectric layer over the light shielding layer and partially removing the light shielding layer and the dielectric layer to form a light shielding element and a dielectric element. A top width of the light shielding element is greater than a bottom width of the dielectric element. The light shielding element and the dielectric element surround a recess, and the recess is aligned with the light sensing region. The method further includes forming a filter element in the recess.
    Type: Application
    Filed: May 6, 2020
    Publication date: August 20, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yun-Wei CHENG, Yi-Hsing CHU, Yin-Chieh HUANG, Chun-Hao CHOU, Kuo-Cheng LEE, Hsun-Ying HUANG, Hsin-Chi CHEN
  • Publication number: 20200251554
    Abstract: The present disclosure describes a fabrication method that prevents divots during the formation of isolation regions in integrated circuit fabrication. In some embodiments, the method of forming the isolation regions includes depositing a protective layer over a semiconductor layer; patterning the protective layer to expose areas of the semiconductor layer; depositing an oxide on the exposed areas the semiconductor layer and between portions of the patterned protective layer; etching a portion of the patterned protective layer to expose the semiconductor layer; etching the exposed semiconductor layer to form isolation openings in the semiconductor layer; and filling the isolation openings with a dielectric to form the isolation regions.
    Type: Application
    Filed: April 22, 2020
    Publication date: August 6, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Gulbagh SINGH, Hsin-Chi CHEN, Kun-Tsang CHUANG
  • Publication number: 20200212244
    Abstract: A photodetector includes: a substrate; a first semiconductor region, the first semiconductor region extending into the substrate from a front side of the substrate; and a second semiconductor region, the second semiconductor region further extending into the substrate from a bottom boundary of the first semiconductor region, wherein when the photodetector operates under a Geiger mode, the second semiconductor region is fully depleted to absorb a radiation source received from a back side of the substrate.
    Type: Application
    Filed: March 13, 2020
    Publication date: July 2, 2020
    Inventors: Chia-Yu WEI, Yu-Ting KAO, Yen-Liang LIN, Wen-I HSU, Hsun-Ying HUANG, Kuo-Cheng LEE, Hsin-Chi CHEN