Patents by Inventor Hsin-Chi Chen

Hsin-Chi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180033820
    Abstract: Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.
    Type: Application
    Filed: October 9, 2017
    Publication date: February 1, 2018
    Inventors: Chiu-Jung Chen, Chun-Hao Chou, Hsin-Chi Chen, Kuo-Cheng Lee, Volume Chien, Yung-Lung Hsu, Yun-Wei Cheng
  • Publication number: 20180006046
    Abstract: A semiconductor structure includes a semiconductor substrate, at least one raised dummy feature, at least one memory cell, and at least one word line. The raised dummy feature is present on the semiconductor substrate and defines a cell region on the semiconductor substrate. The memory cell is present on the cell region. The word line is present adjacent to the memory cell.
    Type: Application
    Filed: September 18, 2017
    Publication date: January 4, 2018
    Inventors: Chiang-Ming Chuang, Chien-Hsuan Liu, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Hsin-Chi Chen
  • Patent number: 9832399
    Abstract: An image sensor including a substrate, a trench isolation, a plurality of image sensing units, at least one phase detection unit, and an interconnection layer is provided. The trench isolation is in the substrate, and a plurality of active areas of the substrate are separated from each other by the trench isolation. The image sensing units and the at least one phase detection unit are in the active areas arranged in an array, and a sensing area of the at least one phase detection unit is smaller than a sensing area of each of the image sensing units. The interconnection layer is disposed on the image sensing units and the at least one phase detection unit. In addition, a method of fabricating an image sensor is also provided.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: November 28, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Yu Wei, Chin-Hsun Hsiao, Po-Chun Chiu, Yu-Hsuan Cheng, Yung-Lung Hsu, Hsin-Chi Chen, Ching-Ling Cheng
  • Patent number: 9812488
    Abstract: A backside illuminated (BSI) image sensor comprises a semiconductor substrate having a first surface and a second surface opposite to the first surface; a photosensitive element in the semiconductor substrate; a gate structure partially over the first surface of the semiconductor substrate; and a temporary carrier depository in proximity to the first surface of the semiconductor substrate, wherein the gate structure has a plug portion extending from the first surface toward the second surface. The plug portion of the gate structure helps to increase the charge transfer efficiency so as to improve quantum efficiency of the BSI image sensor.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: November 7, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tsung-Han Tsai, Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Yung-Lung Hsu, Hsin-Chi Chen
  • Publication number: 20170309659
    Abstract: A method of manufacturing a semiconductor structure includes receiving a substrate and an interlayer dielectric (ILD) over the substrate; bonding the substrate and the ILD over a carrier substrate; forming a recessed portion extended through the substrate and the ILD; disposing a conductive material into the recessed portion; and removing the carrier substrate, wherein the conductive material is in contact with the ILD and is separated from the substrate.
    Type: Application
    Filed: July 13, 2017
    Publication date: October 26, 2017
    Inventors: CHIA-YU WEI, CHIN-HSUN HSIAO, YI-HSING CHU, YEN-LIANG LIN, YUNG-LUNG HSU, HSIN-CHI CHEN
  • Patent number: 9799697
    Abstract: A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A plurality of isolation structures are each disposed between two respective radiation-sensing regions. The isolation structures protrude out of the second side of the substrate.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: October 24, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Cheng Lee, Yun-Wei Cheng, Yung-Lung Hsu, Hsin-Chi Chen
  • Patent number: 9786716
    Abstract: Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: October 10, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chiu-Jung Chen, Chun-Hao Chou, Hsin-Chi Chen, Kuo-Cheng Lee, Volume Chien, Yung-Lung Hsu, Yun-Wei Cheng
  • Patent number: 9768214
    Abstract: A device includes a substrate having a non-pixel region and a pixel region; sensor elements disposed in the pixel region; and a metal layer disposed over the substrate. The metal layer includes a metal shield disposed in the non-pixel region and first trenches over the respective sensor elements in the pixel region. The device further includes a dielectric layer disposed over the metal layer. The dielectric layer has second trenches over the respective sensor elements and third trenches over the metal shield. The first trenches are completely through the metal layer, and the second trenches are partially through the dielectric layer.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: September 19, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Chun-Hao Chou, Yin-Chieh Huang, Kuo-Cheng Lee, Chi-Cherng Jeng, Hsin-Chi Chen
  • Patent number: 9768182
    Abstract: A semiconductor structure includes a semiconductor substrate, at least one raised dummy feature, at least one memory cell, and at least one word line. The raised dummy feature is present on the semiconductor substrate and defines a cell region on the semiconductor substrate. The memory cell is present on the cell region. The word line is present adjacent to the memory cell.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: September 19, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chiang-Ming Chuang, Chien-Hsuan Liu, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Hsin-Chi Chen
  • Publication number: 20170250188
    Abstract: A method of manufacturing a non-volatile memory is described. A substrate including a first region and a second region located at periphery of the first region is provided. A plurality of stacked structures are formed on the first region of the substrate. A wall structure is formed on the second region of the substrate. A conductive layer is formed over the substrate. A bottom anti-reflective coating is formed over the conductive layer. The bottom anti-reflective coating and the conductive layer are etched back. The conductive layer is patterned.
    Type: Application
    Filed: February 25, 2016
    Publication date: August 31, 2017
    Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
  • Patent number: 9746942
    Abstract: An optical touch pen includes a pen case, an operation module, and a power module. The operation module is disposed within an upper cover of the pen case, and includes a pen tip, a supporting part, a circuit board and a multi-directional auxiliary element. The multi-directional auxiliary element is arranged between an inner wall of the upper cover and the engaging structure of the supporting part. The power module is disposed within a lower cover of the pen case. When an external force is applied to the pen tip, the pen tip and the supporting part are shifted in response to the external force, the engaging structure of the supporting part is shifted relative to the multi-directional auxiliary element, and the external force is transmitted downwardly to the circuit board. Consequently, a current switch on the circuit board is triggered and the power module is electrically conducted.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: August 29, 2017
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Hsin-Chi Chen
  • Patent number: 9748301
    Abstract: A semiconductor structure includes a semiconductive substrate includes a first side and a second side opposite to the first side, a radiation sensing device disposed in the semiconductive substrate, an interlayer dielectric (ILD) disposed over the first side of the semiconductive substrate, and a conductive pad passing through the ILD, disposed in the semiconductive substrate and configured to couple with an interconnect structure disposed over the ILD, wherein a portion of the conductive pad is surrounded by the semiconductive substrate, and a step height is configured by a surface of the portion of the conductive pad and the second side of the semiconductive substrate.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: August 29, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chia-Yu Wei, Chin-Hsun Hsiao, Yi-Hsing Chu, Yen-Liang Lin, Yung-Lung Hsu, Hsin-Chi Chen
  • Patent number: 9728511
    Abstract: A semiconductor wafer includes a substrate, an integrated circuit and a die seal ring structure. The substrate is with a die region, a die seal ring region surrounding the die region and a scribe line region surrounding the die seal ring region. The substrate includes a first surface and a second surface opposite to the first surface, and periodic recesses within the first surface of the die seal ring region, the scribe line region or both the die seal ring region and the scribe line region. The integrated circuit is located on the first surface and the second surface of the die region. The die seal ring structure is located on the second surface of the die seal ring region. A semiconductor die is also provided.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: August 8, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsi-Jung Wu, Volume Chien, Ying-Lang Wang, Hsin-Chi Chen, Ying-Hao Chen, Hung-Ta Huang
  • Publication number: 20170223285
    Abstract: An image sensor including a substrate, a trench isolation, a plurality of image sensing units, at least one phase detection unit, and an interconnection layer is provided. The trench isolation is in the substrate, and a plurality of active areas of the substrate are separated from each other by the trench isolation. The image sensing units and the at least one phase detection unit are in the active areas arranged in an array, and a sensing area of the at least one phase detection unit is smaller than a sensing area of each of the image sensing units. The interconnection layer is disposed on the image sensing units and the at least one phase detection unit. In addition, a method of fabricating an image sensor is also provided.
    Type: Application
    Filed: January 29, 2016
    Publication date: August 3, 2017
    Inventors: Chia-Yu Wei, Chin-Hsun Hsiao, Po-Chun Chiu, Yu-Hsuan Cheng, Yung-Lung Hsu, Hsin-Chi Chen, Ching-Ling Cheng
  • Publication number: 20170151661
    Abstract: A trigger mechanism used in a power tool is disclosed to include a grip including a mounting chamber and two opposing first guide portions, and a tripper, which is mounted in the mounting chamber of the grip and movable by an external force along an axis direction relative to the grip and includes two opposing second guide portions respectively coupled to the first guide portions of the grip for enabling the trigger to move moved along the axis direction relative to the grip in a stable and smooth manner.
    Type: Application
    Filed: February 10, 2016
    Publication date: June 1, 2017
    Inventor: HSIN-CHI CHEN
  • Patent number: 9666555
    Abstract: A method of manufacturing a semiconductor structure includes providing a first wafer including a surface, removing some portions of the first wafer over the surface to form a plurality of recesses extended over at least a portion of the surface of the first wafer, providing a second wafer, and disposing the second wafer over the surface of the first wafer.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: May 30, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chen-Chun Chen, Chiu-Jung Chen, Fu-Tsun Tsai, Shiu-Ko Jangjian, Chi-Cherng Jeng, Hsin-Chi Chen
  • Patent number: 9659985
    Abstract: An integrated circuit includes a first semiconductor device, a second semiconductor device, and a metal shielding layer. The first semiconductor device includes a first substrate and a first multi-layer structure, and the first substrate supports the first multi-layer structure. The second semiconductor device includes a second substrate and a second multi-layer structure, and the second substrate supports the second multi-layer structure. The metal shielding layer is disposed between the first multi-layer structure and the second multi-layer structure, wherein the metal shielding layer is electrically connected to the second semiconductor device.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: May 23, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Tsung-Han Tsai, Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Yung-Lung Hsu, Hsin-Chi Chen
  • Patent number: 9643301
    Abstract: An impact device for power transmission includes an impact unit and a hydraulic pressure adjusting unit. The impact unit has a hydraulic cylinder which is installed with a piston assembly and an output shaft therein for outputting torque through the output shaft by utilizing a hydraulic pressure provided in the hydraulic cylinder. The hydraulic pressure adjusting unit is disposed in the hydraulic cylinder and operative to adjust the hydraulic pressure of the hydraulic cylinder. Therefore, the impact device for power transmission can generate a hydraulic torque pulse, and the magnitude of the output torque can be adjusted by the hydraulic pressure adjusting unit.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: May 9, 2017
    Assignee: Tranmax Machinery Co., Ltd.
    Inventor: Hsin-Chi Chen
  • Publication number: 20170110466
    Abstract: A semiconductor structure includes a semiconductor substrate, at least one raised dummy feature, at least one memory cell, and at least one word line. The raised dummy feature is present on the semiconductor substrate and defines a cell region on the semiconductor substrate. The memory cell is present on the cell region. The word line is present adjacent to the memory cell.
    Type: Application
    Filed: May 18, 2016
    Publication date: April 20, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chiang-Ming CHUANG, Chien-Hsuan LIU, Chih-Ming LEE, Kun-Tsang CHUANG, Hung-Che LIAO, Hsin-Chi CHEN
  • Publication number: 20170084657
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a light sensing feature, a negative oxide layer, a gate dielectric layer and a transfer gate. The light sensing feature is configured in the substrate to detect an incoming radiation. The negative oxide layer is over the light sensing feature. The gate dielectric layer is over the negative oxide layer. The transfer gate is over the gate dielectric layer.
    Type: Application
    Filed: September 17, 2015
    Publication date: March 23, 2017
    Inventors: Chia-Yu WEI, Hsin-Chi CHEN, Ssu-Chiang WENG, Yung-Lung HSU, Yen-Liang LIN, Chin-Hsun HSIAO