Patents by Inventor Hsing-Chung Lee

Hsing-Chung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240138272
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a first conductive structure over a substrate. A data storage structure overlies the first conductive structure. The data storage structure comprises a first dielectric layer on the first conductive structure and a second dielectric layer on the first dielectric layer. The first dielectric layer comprises a dielectric material and a first dopant having a concentration that changes from a top surface of the first dielectric layer in a direction towards the first conductive structure. A second conductive structure overlies the data storage structure.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Fa-Shen Jiang, Cheng-Yuan Tsai, Hai-Dang Trinh, Hsing-Lien Lin, Hsun-Chung Kuang, Bi-Shen Lee
  • Publication number: 20240088224
    Abstract: A semiconductor structure includes a first gate structure, a second gate structure coupled to the first gate structure, a source region, a first drain region, and a second drain region. The source region is surrounded by the first gate structure and the second gate structure. The first drain region is separated from the source region by the first gate structure. The second drain region is separated from the source region by the second gat structure. A shape of the first drain region and a shape of the second drain region are different from each other from a plan view.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 14, 2024
    Inventors: HSING-I TSAI, FU-HUAN TSAI, CHIA-CHUNG CHEN, HSIAO-CHUN LEE, CHI-FENG HUANG, CHO-YING LU, VICTOR CHIANG LIANG
  • Patent number: 11916127
    Abstract: Various embodiments of the present disclosure are directed towards a memory device including a first bottom electrode layer over a substrate. A ferroelectric switching layer is disposed over the first bottom electrode layer. A first top electrode layer is disposed over the ferroelectric switching layer. A second bottom electrode layer is disposed between the first bottom electrode layer and the ferroelectric switching layer. The second bottom electrode layer is less susceptible to oxidation than the first bottom electrode layer.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi Yang Wei, Bi-Shen Lee, Hsin-Yu Lai, Hai-Dang Trinh, Hsing-Lien Lin, Hsun-Chung Kuang
  • Publication number: 20130119396
    Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
    Type: Application
    Filed: May 9, 2012
    Publication date: May 16, 2013
    Applicant: CBRITE INC.
    Inventors: Gang YU, Chan-Long SHIEH, Hsing-Chung LEE
  • Patent number: 8377743
    Abstract: A method of annealing a metal oxide on a temperature sensitive substrate formation includes the steps of providing a temperature sensitive substrate formation and forming a spacer layer on a surface of the substrate formation. A metal oxide semiconductor device is formed on the spacer layer, the device includes at least a layer of amorphous metal oxide semiconductor material, an interface of the amorphous metal oxide layer with a dielectric layer, and a gate metal layer adjacent the layer of amorphous metal oxide semiconductor material and the interface. The method then includes the step of at least partially annealing the layer of metal oxide semiconductor material by heating the adjacent gate metal layer with pulses of infra red radiation to improve the mobility and operating stability of the amorphous metal oxide semiconductor material while retaining at least the amorphous metal oxide semiconductor material adjacent the gate metal layer amorphous.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: February 19, 2013
    Assignee: CBRITE Inc.
    Inventors: Chan-Long Shieh, Hsing-Chung Lee
  • Patent number: 8222077
    Abstract: Two-terminal switching devices of MIM type having at least one electrode formed by a liquid phase processing method are provided for use in active matrix backplane applications; more specifically, MIM devices with symmetric current-voltage characteristics are applied for LCD active matrix backplane applications, and MIM devices with asymmetric current-voltage characteristics are applied for active matrix backplane implementation for electrophoretic displays (EPD) and rotating element displays. In particular, the combination of the bottom metal, metal-oxide insulator and solution-processible top conducting layer enables high throughput, roll-to-roll process for flexible displays.
    Type: Grant
    Filed: November 6, 2007
    Date of Patent: July 17, 2012
    Assignee: Cbrite Inc.
    Inventors: Xiong Gong, Kaixia Yang, Gang Yu, Boo Jorgen Larŝ Nilsson, Chan-Long Shieh, Hsing-Chung Lee, Fatt Foong
  • Patent number: 8193594
    Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: June 5, 2012
    Assignee: CBRITE Inc.
    Inventors: Gang Yu, Chan-Long Shieh, Hsing-Chung Lee
  • Publication number: 20110147761
    Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
    Type: Application
    Filed: January 27, 2011
    Publication date: June 23, 2011
    Applicant: CBRITE INC.
    Inventors: Gang Yu, Chan-Long Shieh, Hsing-Chung Lee
  • Publication number: 20110062431
    Abstract: A method of annealing a metal oxide on a temperature sensitive substrate formation includes the steps of providing a temperature sensitive substrate formation and forming a spacer layer on a surface of the substrate formation. A metal oxide semiconductor device is formed on the spacer layer, the device includes at least a layer of amorphous metal oxide semiconductor material, an interface of the amorphous metal oxide layer with a dielectric layer, and a gate metal layer adjacent the layer of amorphous metal oxide semiconductor material and the interface. The method then includes the step of at least partially annealing the layer of metal oxide semiconductor material by heating the adjacent gate metal layer with pulses of infra red radiation to improve the mobility and operating stability of the amorphous metal oxide semiconductor material while retaining at least the amorphous metal oxide semiconductor material adjacent the gate metal layer amorphous.
    Type: Application
    Filed: September 1, 2010
    Publication date: March 17, 2011
    Inventors: Chan-Long Shieh, Hsing-Chung Lee
  • Patent number: 7898042
    Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotataing element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: March 1, 2011
    Assignee: Cbrite Inc.
    Inventors: Gang Yu, Chan-Long Shieh, Hsing-Chung Lee
  • Publication number: 20100314072
    Abstract: Base plate apparatus for mounting IGBT modules, the base plate apparatus includes a base plate with a mounting surface and an opposed surface. A tailored coefficient of thermal expansion interface layer is directly bonded to the mounting surface of the base plate and forms a mounting surface for mounting IGBT modules. The interface layer has a coefficient of thermal expansion ranging from approximately 4 ppm/° C. to approximately 12 ppm/° C.
    Type: Application
    Filed: June 11, 2009
    Publication date: December 16, 2010
    Inventors: Hsing-Chung Lee, Rajiv Tandon, Ralph Remsburg
  • Publication number: 20100309940
    Abstract: A heat spreader structure includes a high power laser with an epi side and an emitting facet. A vapor chamber includes a housing defining an inner vapor cavity and a wick positioned in the vapor cavity to define an evaporation area on one side of the cavity, a condensation area on an opposite side of the cavity, and fluid communication between the condensation area and the evaporation area. A space defined between the evaporation area and the condensation area. The wick includes a porous powder sintered to inner surfaces of the sealed cavity to hold the porous powder in position. The epi side of the laser is coupled to the one side of the vapor chamber and heat removal mechanism is coupled to the opposite side of the cavity.
    Type: Application
    Filed: June 4, 2009
    Publication date: December 9, 2010
    Inventor: Hsing-Chung Lee
  • Patent number: 7772589
    Abstract: A high performance thin film transistor includes a flexible substrate, a layer of metal oxide semiconductor material deposited on the flexible substrate, and a layer of self-assembled organic gate dielectric material deposited on the metal oxide semiconductor material. The metal oxide semiconductor material has high carrier mobility and is transparent. An interface is formed between the layer of metal oxide semiconductor material and the layer of organic gate dielectric material that is substantially free of reactions and Fermi level pinning. The polymer materials are not polar and do not give rise to gap state formation and interface scattering.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: August 10, 2010
    Assignee: Cbrite Inc.
    Inventors: Chan-Long Shieh, Gang Yu, Hsing-Chung Lee
  • Publication number: 20090289301
    Abstract: A method of annealing a metal oxide on a temperature sensitive substrate formation includes the steps of providing a temperature sensitive substrate formation and forming a spacer layer on a surface of the temperature sensitive substrate formation. A metal oxide semiconductor device is formed on the spacer layer, the device includes at least a layer of metal oxide semiconductor material, an interface of the metal oxide layer with a dielectric layer, and a gate metal layer adjacent the layer of metal oxide semiconductor material and the interface. The method then includes the step of at least partially annealing the layer of metal oxide semiconductor material by heating the adjacent gate metal layer with pulses of infra red or visible light radiation.
    Type: Application
    Filed: May 21, 2008
    Publication date: November 26, 2009
    Inventors: Chan-Long Shieh, Hsing-Chung Lee
  • Patent number: 7605026
    Abstract: A method of fabricating self-aligned metal oxide TFTs on transparent flexible substrates is disclosed and includes the steps of providing a transparent flexible substrate with at least an opaque first metal TFT electrode in a supporting relationship on the front surface of the substrate and a layer of transparent material, including at least one of a metal oxide semiconductor and/or a gate dielectric, on the front surface of the substrate and the first metal TFT electrode. A layer of photoresist is positioned in overlying relationship to the layer of transparent material. Dual photo masks are positioned over the front and rear surfaces of the substrate, respectively, and the layer of photoresist is exposed. The layer of photoresist is developed and used to form a layer of second metal.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: October 20, 2009
    Assignee: CBRITE, Inc.
    Inventors: Chan-Long Shieh, Hsing-Chung Lee
  • Publication number: 20080174519
    Abstract: Reconfigurable color signage includes an array of light valves each having memory. An active matrix including a plurality of conductive select and data lines is positioned on one side of the array. Each light valve is electrically coupled to be separately addressable by a unique combination of select and data line. The active matrix has a write mode in which signals are supplied to each light valve to provide a selected light transmittance and a display mode in which the memory of each light valve retains the selected transmittance after the signals of the write mode have been removed. A backlight is positioned to direct light in a light path through the array and a color filter is positioned in the light path to define a plurality of pixels, including one red, green, and blue filter for each pixel, and each positioned to be associated with a separate light valve.
    Type: Application
    Filed: January 23, 2007
    Publication date: July 24, 2008
    Inventors: Chan-Long Shieh, Hsing-Chung Lee
  • Publication number: 20080169464
    Abstract: Two-terminal switching devices of MIM type having at least one electrode formed by a liquid phase processing method are provided for use in active matrix backplane applications; more specifically, MIM devices with symmetric current-voltage characteristics are applied for LCD active matrix backplane applications, and MIM devices with asymmetric current-voltage characteristics are applied for active matrix backplane implementation for electrophoretic displays (EPD) and rotating element displays. In particular, the combination of the bottom metal, metal-oxide insulator and solution-processible top conducting layer enables high throughput, roll-to-roll process for flexible displays.
    Type: Application
    Filed: November 6, 2007
    Publication date: July 17, 2008
    Inventors: Xiong Gong, Kaixia Yang, Gang Yu, Boo Jorgen Lars Nilsson, Chan-Long Shieh, Hsing-Chung Lee, Fatt Foong
  • Publication number: 20080105870
    Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotataing element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
    Type: Application
    Filed: May 9, 2007
    Publication date: May 8, 2008
    Inventors: Gang Yu, Chan-Long Shieh, Hsing-Chung Lee
  • Patent number: 7215891
    Abstract: An optical transceiver includes a single integrated circuit chip to integrate the drive, receive, control, and monitoring functions of the optical transceiver. The single chip may further have an advance replacement algorithm and monitoring algorithm for the opto-electronic devices of the optical transmitter and receiver to generate flags and/or an advance replacement indication. Methods, apparatus, and systems are disclosed.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: May 8, 2007
    Assignee: JDS Uniphase Corporation
    Inventors: Min-Wen Chiang, Wenbin Jiang, David K. Lewis, Hsing-Chung Lee
  • Patent number: 7013088
    Abstract: A multichannel fiber optic module has an electromagnetic shield surrounding high frequency electrical components which is electrically and mechanically coupled to one or more guide rails near edges of a printed circuit board. The one or more guide rails of the printed circuit board include a ground trace on the top and/or bottom surfaces of the printed circuit board. The fiber optic module can be hot inserted into a module cage which has guide rail slots for mating with the guide rails of the fiber optic module. Through the guide rail slots, electromagnetic radiation from the fiber optic module is shunted to a ground plane to which the module cage is coupled on a host chassis ground. Standard singular fiber receptacles are used for the parallel data link modules to allow field cable termination.
    Type: Grant
    Filed: August 30, 2000
    Date of Patent: March 14, 2006
    Assignee: JDS Uniphase Corporation
    Inventors: Wenbin Jiang, Hsing-Chung Lee, Min-Wen Cheng, Chan-Long Shieh, Cheng Ping Wei, Edwin D. Dair