Patents by Inventor Hsing-Chung Lee
Hsing-Chung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240138272Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a first conductive structure over a substrate. A data storage structure overlies the first conductive structure. The data storage structure comprises a first dielectric layer on the first conductive structure and a second dielectric layer on the first dielectric layer. The first dielectric layer comprises a dielectric material and a first dopant having a concentration that changes from a top surface of the first dielectric layer in a direction towards the first conductive structure. A second conductive structure overlies the data storage structure.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Inventors: Fa-Shen Jiang, Cheng-Yuan Tsai, Hai-Dang Trinh, Hsing-Lien Lin, Hsun-Chung Kuang, Bi-Shen Lee
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Publication number: 20240088224Abstract: A semiconductor structure includes a first gate structure, a second gate structure coupled to the first gate structure, a source region, a first drain region, and a second drain region. The source region is surrounded by the first gate structure and the second gate structure. The first drain region is separated from the source region by the first gate structure. The second drain region is separated from the source region by the second gat structure. A shape of the first drain region and a shape of the second drain region are different from each other from a plan view.Type: ApplicationFiled: November 14, 2023Publication date: March 14, 2024Inventors: HSING-I TSAI, FU-HUAN TSAI, CHIA-CHUNG CHEN, HSIAO-CHUN LEE, CHI-FENG HUANG, CHO-YING LU, VICTOR CHIANG LIANG
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Patent number: 11916127Abstract: Various embodiments of the present disclosure are directed towards a memory device including a first bottom electrode layer over a substrate. A ferroelectric switching layer is disposed over the first bottom electrode layer. A first top electrode layer is disposed over the ferroelectric switching layer. A second bottom electrode layer is disposed between the first bottom electrode layer and the ferroelectric switching layer. The second bottom electrode layer is less susceptible to oxidation than the first bottom electrode layer.Type: GrantFiled: June 16, 2021Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi Yang Wei, Bi-Shen Lee, Hsin-Yu Lai, Hai-Dang Trinh, Hsing-Lien Lin, Hsun-Chung Kuang
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Publication number: 20130119396Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.Type: ApplicationFiled: May 9, 2012Publication date: May 16, 2013Applicant: CBRITE INC.Inventors: Gang YU, Chan-Long SHIEH, Hsing-Chung LEE
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Patent number: 8377743Abstract: A method of annealing a metal oxide on a temperature sensitive substrate formation includes the steps of providing a temperature sensitive substrate formation and forming a spacer layer on a surface of the substrate formation. A metal oxide semiconductor device is formed on the spacer layer, the device includes at least a layer of amorphous metal oxide semiconductor material, an interface of the amorphous metal oxide layer with a dielectric layer, and a gate metal layer adjacent the layer of amorphous metal oxide semiconductor material and the interface. The method then includes the step of at least partially annealing the layer of metal oxide semiconductor material by heating the adjacent gate metal layer with pulses of infra red radiation to improve the mobility and operating stability of the amorphous metal oxide semiconductor material while retaining at least the amorphous metal oxide semiconductor material adjacent the gate metal layer amorphous.Type: GrantFiled: September 1, 2010Date of Patent: February 19, 2013Assignee: CBRITE Inc.Inventors: Chan-Long Shieh, Hsing-Chung Lee
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Patent number: 8222077Abstract: Two-terminal switching devices of MIM type having at least one electrode formed by a liquid phase processing method are provided for use in active matrix backplane applications; more specifically, MIM devices with symmetric current-voltage characteristics are applied for LCD active matrix backplane applications, and MIM devices with asymmetric current-voltage characteristics are applied for active matrix backplane implementation for electrophoretic displays (EPD) and rotating element displays. In particular, the combination of the bottom metal, metal-oxide insulator and solution-processible top conducting layer enables high throughput, roll-to-roll process for flexible displays.Type: GrantFiled: November 6, 2007Date of Patent: July 17, 2012Assignee: Cbrite Inc.Inventors: Xiong Gong, Kaixia Yang, Gang Yu, Boo Jorgen Larŝ Nilsson, Chan-Long Shieh, Hsing-Chung Lee, Fatt Foong
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Patent number: 8193594Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.Type: GrantFiled: January 27, 2011Date of Patent: June 5, 2012Assignee: CBRITE Inc.Inventors: Gang Yu, Chan-Long Shieh, Hsing-Chung Lee
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Publication number: 20110147761Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.Type: ApplicationFiled: January 27, 2011Publication date: June 23, 2011Applicant: CBRITE INC.Inventors: Gang Yu, Chan-Long Shieh, Hsing-Chung Lee
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Publication number: 20110062431Abstract: A method of annealing a metal oxide on a temperature sensitive substrate formation includes the steps of providing a temperature sensitive substrate formation and forming a spacer layer on a surface of the substrate formation. A metal oxide semiconductor device is formed on the spacer layer, the device includes at least a layer of amorphous metal oxide semiconductor material, an interface of the amorphous metal oxide layer with a dielectric layer, and a gate metal layer adjacent the layer of amorphous metal oxide semiconductor material and the interface. The method then includes the step of at least partially annealing the layer of metal oxide semiconductor material by heating the adjacent gate metal layer with pulses of infra red radiation to improve the mobility and operating stability of the amorphous metal oxide semiconductor material while retaining at least the amorphous metal oxide semiconductor material adjacent the gate metal layer amorphous.Type: ApplicationFiled: September 1, 2010Publication date: March 17, 2011Inventors: Chan-Long Shieh, Hsing-Chung Lee
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Patent number: 7898042Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotataing element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.Type: GrantFiled: May 9, 2007Date of Patent: March 1, 2011Assignee: Cbrite Inc.Inventors: Gang Yu, Chan-Long Shieh, Hsing-Chung Lee
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Publication number: 20100314072Abstract: Base plate apparatus for mounting IGBT modules, the base plate apparatus includes a base plate with a mounting surface and an opposed surface. A tailored coefficient of thermal expansion interface layer is directly bonded to the mounting surface of the base plate and forms a mounting surface for mounting IGBT modules. The interface layer has a coefficient of thermal expansion ranging from approximately 4 ppm/° C. to approximately 12 ppm/° C.Type: ApplicationFiled: June 11, 2009Publication date: December 16, 2010Inventors: Hsing-Chung Lee, Rajiv Tandon, Ralph Remsburg
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Publication number: 20100309940Abstract: A heat spreader structure includes a high power laser with an epi side and an emitting facet. A vapor chamber includes a housing defining an inner vapor cavity and a wick positioned in the vapor cavity to define an evaporation area on one side of the cavity, a condensation area on an opposite side of the cavity, and fluid communication between the condensation area and the evaporation area. A space defined between the evaporation area and the condensation area. The wick includes a porous powder sintered to inner surfaces of the sealed cavity to hold the porous powder in position. The epi side of the laser is coupled to the one side of the vapor chamber and heat removal mechanism is coupled to the opposite side of the cavity.Type: ApplicationFiled: June 4, 2009Publication date: December 9, 2010Inventor: Hsing-Chung Lee
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Patent number: 7772589Abstract: A high performance thin film transistor includes a flexible substrate, a layer of metal oxide semiconductor material deposited on the flexible substrate, and a layer of self-assembled organic gate dielectric material deposited on the metal oxide semiconductor material. The metal oxide semiconductor material has high carrier mobility and is transparent. An interface is formed between the layer of metal oxide semiconductor material and the layer of organic gate dielectric material that is substantially free of reactions and Fermi level pinning. The polymer materials are not polar and do not give rise to gap state formation and interface scattering.Type: GrantFiled: April 22, 2008Date of Patent: August 10, 2010Assignee: Cbrite Inc.Inventors: Chan-Long Shieh, Gang Yu, Hsing-Chung Lee
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Publication number: 20090289301Abstract: A method of annealing a metal oxide on a temperature sensitive substrate formation includes the steps of providing a temperature sensitive substrate formation and forming a spacer layer on a surface of the temperature sensitive substrate formation. A metal oxide semiconductor device is formed on the spacer layer, the device includes at least a layer of metal oxide semiconductor material, an interface of the metal oxide layer with a dielectric layer, and a gate metal layer adjacent the layer of metal oxide semiconductor material and the interface. The method then includes the step of at least partially annealing the layer of metal oxide semiconductor material by heating the adjacent gate metal layer with pulses of infra red or visible light radiation.Type: ApplicationFiled: May 21, 2008Publication date: November 26, 2009Inventors: Chan-Long Shieh, Hsing-Chung Lee
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Patent number: 7605026Abstract: A method of fabricating self-aligned metal oxide TFTs on transparent flexible substrates is disclosed and includes the steps of providing a transparent flexible substrate with at least an opaque first metal TFT electrode in a supporting relationship on the front surface of the substrate and a layer of transparent material, including at least one of a metal oxide semiconductor and/or a gate dielectric, on the front surface of the substrate and the first metal TFT electrode. A layer of photoresist is positioned in overlying relationship to the layer of transparent material. Dual photo masks are positioned over the front and rear surfaces of the substrate, respectively, and the layer of photoresist is exposed. The layer of photoresist is developed and used to form a layer of second metal.Type: GrantFiled: December 3, 2007Date of Patent: October 20, 2009Assignee: CBRITE, Inc.Inventors: Chan-Long Shieh, Hsing-Chung Lee
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Publication number: 20080174519Abstract: Reconfigurable color signage includes an array of light valves each having memory. An active matrix including a plurality of conductive select and data lines is positioned on one side of the array. Each light valve is electrically coupled to be separately addressable by a unique combination of select and data line. The active matrix has a write mode in which signals are supplied to each light valve to provide a selected light transmittance and a display mode in which the memory of each light valve retains the selected transmittance after the signals of the write mode have been removed. A backlight is positioned to direct light in a light path through the array and a color filter is positioned in the light path to define a plurality of pixels, including one red, green, and blue filter for each pixel, and each positioned to be associated with a separate light valve.Type: ApplicationFiled: January 23, 2007Publication date: July 24, 2008Inventors: Chan-Long Shieh, Hsing-Chung Lee
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Publication number: 20080169464Abstract: Two-terminal switching devices of MIM type having at least one electrode formed by a liquid phase processing method are provided for use in active matrix backplane applications; more specifically, MIM devices with symmetric current-voltage characteristics are applied for LCD active matrix backplane applications, and MIM devices with asymmetric current-voltage characteristics are applied for active matrix backplane implementation for electrophoretic displays (EPD) and rotating element displays. In particular, the combination of the bottom metal, metal-oxide insulator and solution-processible top conducting layer enables high throughput, roll-to-roll process for flexible displays.Type: ApplicationFiled: November 6, 2007Publication date: July 17, 2008Inventors: Xiong Gong, Kaixia Yang, Gang Yu, Boo Jorgen Lars Nilsson, Chan-Long Shieh, Hsing-Chung Lee, Fatt Foong
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Publication number: 20080105870Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotataing element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.Type: ApplicationFiled: May 9, 2007Publication date: May 8, 2008Inventors: Gang Yu, Chan-Long Shieh, Hsing-Chung Lee
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Patent number: 7215891Abstract: An optical transceiver includes a single integrated circuit chip to integrate the drive, receive, control, and monitoring functions of the optical transceiver. The single chip may further have an advance replacement algorithm and monitoring algorithm for the opto-electronic devices of the optical transmitter and receiver to generate flags and/or an advance replacement indication. Methods, apparatus, and systems are disclosed.Type: GrantFiled: June 6, 2003Date of Patent: May 8, 2007Assignee: JDS Uniphase CorporationInventors: Min-Wen Chiang, Wenbin Jiang, David K. Lewis, Hsing-Chung Lee
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Patent number: 7013088Abstract: A multichannel fiber optic module has an electromagnetic shield surrounding high frequency electrical components which is electrically and mechanically coupled to one or more guide rails near edges of a printed circuit board. The one or more guide rails of the printed circuit board include a ground trace on the top and/or bottom surfaces of the printed circuit board. The fiber optic module can be hot inserted into a module cage which has guide rail slots for mating with the guide rails of the fiber optic module. Through the guide rail slots, electromagnetic radiation from the fiber optic module is shunted to a ground plane to which the module cage is coupled on a host chassis ground. Standard singular fiber receptacles are used for the parallel data link modules to allow field cable termination.Type: GrantFiled: August 30, 2000Date of Patent: March 14, 2006Assignee: JDS Uniphase CorporationInventors: Wenbin Jiang, Hsing-Chung Lee, Min-Wen Cheng, Chan-Long Shieh, Cheng Ping Wei, Edwin D. Dair