Patents by Inventor Hsiung Hsu

Hsiung Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130339911
    Abstract: A method for creating double patterning compliant integrated circuit layouts is disclosed. The method allows patterns to be assigned to different masks and stitched together during lithography. The method also allows portions of the pattern to be removed after the process.
    Type: Application
    Filed: August 20, 2013
    Publication date: December 19, 2013
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Hsiung HSU, Huang-Yu CHEN, Chung-Hsing WANG
  • Patent number: 8601409
    Abstract: A method comprises (a) providing an integrated circuit (IC) layout comprising data representing a plurality of circuit patterns to be formed on or in a single layer of an IC by multi-patterning; (b) dividing the plurality of circuit patterns into two or more groups; (c) assigning the circuit patterns within each group to a respective mask to provide mask assignment data, for forming each group of circuit patterns on or in the single layer of the IC; (d) compressing the mask assignment data; and (e) storing the compressed mask assignment data to a non-transitory machine readable storage medium for use by an electronic design automation tool configured for reconstructing the mask assignment data from the compressed data.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: December 3, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co, Ltd.
    Inventors: Huang-Yu Chen, Chin-Hsiung Hsu, Wen-Hao Chen, Chung-Hsing Wang
  • Patent number: 8587520
    Abstract: Some implementations provide techniques and arrangements to receive image information. A plurality of reference fields of a user-manipulated device may be identified. Each reference field of the plurality of reference fields may include reference elements. The plurality of reference fields may be identified based on colors of the reference elements, shapes of the reference elements, and/or a pattern of the reference elements. Some implementations may generate position information based on the plurality of reference fields. The position information may identify a position of the user-manipulated device relative to the video camera. Some implementations may provide the position information to an application.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: November 19, 2013
    Assignee: Microsoft Corporation
    Inventors: Feng-Hsiung Hsu, Rui Gao
  • Patent number: 8585931
    Abstract: Compositions are provided comprising a continuous liquid aqueous medium having dispersed therein a polydioxythiophene and at least one colloid-forming fluorinated polymeric acid. Films from invention compositions are useful as buffer layers in organic electronic devices, including electroluminescent devices, such as, for example, organic light emitting diodes (OLED) displays.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: November 19, 2013
    Assignee: E I du Pont de Nemours and Company
    Inventors: Che-Hsiung Hsu, Yong Cao, Sunghan Kim, Daniel David Lecloux, Chi Zhang
  • Patent number: 8585441
    Abstract: An electrical connector adapted to be straddle mounted to a PCB and a method for mounting such an electrical connector. The electrical connector includes a housing defining a datum to abut the bottom side of the PCB and an upper row of contacts fastened in the housing. Each upper contact has a flexible mounting portion extending from the housing to abut the top side of the PCB. The mounting portions of the top contacts and the datum of the housing is adapted to clip the PCB thereby positioning the electrical connector related to the PCB.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: November 19, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Chun-Hsiung Hsu, Yue-Ou Zhang
  • Patent number: 8583569
    Abstract: Accelerator systems and methods are disclosed that utilize FPGA technology to achieve better parallelism and flexibility. The accelerator system may be used to implement a relevance-ranking algorithm, such as RankBoost, for a training process. The algorithm and related data structures may be organized to enable streaming data access and, thus, increase the training speed. The data may be compressed to enable the system and method to be operable with larger data sets. At least a portion of the approximated RankBoost algorithm may be implemented as a single instruction multiple data streams (SIMD) architecture with multiple processing engines (PEs) in the FPGA. Thus, large data sets can be loaded on memories associated with an FPGA to increase the speed of the relevance ranking algorithm.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: November 12, 2013
    Assignee: Microsoft Corporation
    Inventors: Ning-Yi Xu, Xiong-Fei Cai, Feng-Hsiung Hsu
  • Patent number: 8568616
    Abstract: There are provided electrically conducting polymer compositions comprising an electrectically conductive polymer or copolymer and an organic solvent wettable fluorinated acid polymer. Electrically conductive polymer materials are derived from thiophene, pyrrole, aniline and polycyclic heteroaromatic precursor monomers. Non-conductive polymers derived from alkenyl, alkynyl, arylene, and heteroarylene precursor monomers. The organic-solvent wettable fluorinated acid polymer is fluorinated or highly fluorinated and may be colloid-forming. Acidic groups include carboxylic acid groups, sulfonic acid groups, sulfonimide groups, phosphoric acid groups, phosphonic acid groups, and combinations thereof. The compositions can be used in organic electronic devices.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: October 29, 2013
    Assignee: E I du Pont de Nemours and Company
    Inventors: Che-Hsiung Hsu, Christopher P. Junk, Frank P. Uckert, Mark F. Teasley, Andrew Edward Feiring, Charles J. Dubois, Viacheslav A. Petrov, Natalie Daoud, Amy Qi Han
  • Patent number: 8560509
    Abstract: Architecture that performs incremental computing for web searches by employing methods at least for storing the results of repeat queries on unchanged webpages and for computing results for the repeated queries. The architecture includes one or more algorithms for pre-computing query results on index servers, for only selectively choosing index servers whose result for a query change for a query computation process, and for re-using the unchanged web pages stored in the cache and computing results upon changed index and unchanged index separately.
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: October 15, 2013
    Assignee: Microsoft Corporation
    Inventors: Zenglin Xia, Ningyi Xu, Lintao Zhang, Bojun Huang, Mao Yang, Lang Zong, Feng-Hsiung Hsu
  • Patent number: 8539396
    Abstract: A method for creating double patterning compliant integrated circuit layouts is disclosed. The method allows patterns to be assigned to different masks and stitched together during lithography. The method also allows portions of the pattern to be removed after the process.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: September 17, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Hsiung Hsu, Huang-Yu Chen, Chung-Hsing Wang
  • Publication number: 20130229499
    Abstract: Technologies pertaining to computing depth images of a scene that includes a mobile object based upon the principle of light falloff are described herein. An infrared image of a scene that includes a mobile object is captured, wherein the infrared image has a plurality of pixels having a respective plurality of intensity values. A depth image for the scene is computed based at least in part upon square roots of respective intensity values in the infrared image.
    Type: Application
    Filed: June 7, 2012
    Publication date: September 5, 2013
    Applicant: MICROSOFT CORPORATION
    Inventors: Chunshui Zhao, Jing Yan, Jiawei GU, Feng-hsiung Hsu, Shaopeng Song, Mingjie Wang, Jie Li
  • Patent number: 8523611
    Abstract: An electrical connector comprises a printed circuit board (12) having a rear edge connected to the cable (10) and a front edge opposite to the rear edge, a number of upper contact modules (21) stacked along the front edge on a top side (122) of the printed circuit board (12), and a number of lower contact modules (22) stacked along the front edge on a bottom side 124 of the printed circuit board (12). Each of the contact modules (21, 22) has a conductor pairs (14) for transferring signal differential pairs lined along a column direction perpendicular to the printed circuit board (12) and an insulator (152, 156) encapsulating a portion of each conductor (14) of the conductor pairs.
    Type: Grant
    Filed: March 19, 2012
    Date of Patent: September 3, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Feng Pan, Chun-Hsiung Hsu
  • Patent number: 8491819
    Abstract: Provided are compositions having high conductivity and high work-function. The compositions comprise an aqueous dispersion or solution of an electrically conducting polymer and a perfluorinated polymeric acid. The conductive polymers may be made from conjugated monomers or comonomers and a non-fluorinated polymeric acid, and the perfluorinated polymeric acides may be derived from perfluoroolefins having perfluoro-ether-sulfonic acid side chains. Devices embodying such compositions are also provided.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: July 23, 2013
    Assignee: E I du Pont de Nemours and Company
    Inventor: Che-Hsiung Hsu
  • Publication number: 20130174106
    Abstract: A method for creating double patterning compliant integrated circuit layouts is disclosed. The method allows patterns to be assigned to different masks and stitched together during lithography. The method also allows portions of the pattern to be removed after the process.
    Type: Application
    Filed: March 9, 2012
    Publication date: July 4, 2013
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Hsiung HSU, Huang-Yu CHEN, Chung-Hsing WANG
  • Publication number: 20130154890
    Abstract: An antenna device is provided and includes a bottom, two monopole antennas, and a cover assembled with the bottom. A projection plane is defined perpendicular to the bottom. The two monopole antennas substantially symmetrically protrude from the bottom, and a gap is formed between the two monopole antennas. Projections of the two monopole antennas on the projection plane intersect with each other. Each of the two monopole antennas includes a first frequency receiving portion adjacent to the bottom, a second frequency receiving portion, and a connection portion located between the first frequency receiving portion and the second frequency receiving portion. A slot is formed through the connection portion to adjust a received frequency of the first or second frequency receiving portion. An accommodating space is formed between the cover and the bottom to accommodate the two monopole antennas.
    Type: Application
    Filed: April 5, 2012
    Publication date: June 20, 2013
    Inventors: Cheng-Geng JAN, I-Shan Chen, Chia-Hong Lin, Tien-Min Lin, Yi-Cheih Wang, Cheng-Hsiung Hsu
  • Patent number: 8461758
    Abstract: The present invention relates to buffer bilayers, and their use in electronic devices. The bilayer has a first layer including (a) at least one electrically conductive polymer doped with at least one non-highly-fluorinated acid polymer and (b) at least one highly-fluorinated acid polymer, and a second layer including inorganic nanoparticles which are oxides or sulfides.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: June 11, 2013
    Assignee: E I Du Pont de Nemours and Company
    Inventors: Che-Hsiung Hsu, Weiying Gao, Shiva Prakash
  • Patent number: 8455865
    Abstract: Compositions are provided comprising aqueous dispersions of electrically conducting organic polymers and a plurality of nanoparticles. Films cast from invention compositions are useful as buffer layers in electroluminescent devices, such as organic light emitting diodes (OLEDs) and electrodes for thin film field effect transistors. Buffer layers containing nanoparticles have a much lower conductivity than buffer layers without nanoparticles. In addition, when incorporated into an electroluminescent (EL) device, buffer layers according to the invention contribute to higher stress life of the EL device.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: June 4, 2013
    Assignee: E I du Pont de Nemours and Company
    Inventor: Che-Hsiung Hsu
  • Patent number: 8448100
    Abstract: A computer implemented system comprises: a tangible, non-transitory computer readable storage medium encoded with data representing an initial layout of an integrated circuit pattern layer having a plurality of polygons. A special-purpose computer is configured to perform the steps of: analyzing in the initial layout of an integrated circuit pattern layer having a plurality of polygons, so as to identify a plurality of multi-patterning conflict cycles in the initial layout; constructing in the computer a respective multi-patterning conflict cycle graph representing each identified multi-patterning conflict cycle; classifying each identified multi-patterning conflict cycle graph in the computer according to a number of other multi-patterning conflict cycle graphs which enclose that multi-patterning conflict cycle graph; and causing a display device to graphically display the plurality of multi-patterning conflict cycle graphs according to their respective classifications.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: May 21, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung Lung Lin, Chin-Chang Hsu, Ying-Yu Shen, Wen-Ju Yang, Hsiao-Shu Chao, Yi-Kan Cheng, Chin-Hsiung Hsu, Huang-Yu Chen, Yi-Chuin Tsai, Yuan-Te Hou, Chung-Hsing Wang
  • Patent number: 8442438
    Abstract: A wireless transmitter includes a first filtering unit coupled to a first cable for outputting a first DC source transmitted on the first cable, a first power converting unit for converting the first DC source into a second DC source, a second filtering unit for eliminating noise in the second DC source, a first DC blocking unit for blocking the second DC source and outputting a second frequency modulation (FM) signal, an amplifier for amplifying the second FM signal to generate a first FM signal, and a second DC blocking unit coupled to the amplifier and the first cable, for outputting the first FM signal to the first cable, such that the first FM signal is transmitted to the air through the first cable as a transmitting antenna.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: May 14, 2013
    Assignee: Wistron NeWeb Corporation
    Inventors: Cheng-Hsiung Hsu, Chung-Wei Hsu, Cheng-Yen Wen, Chun-Chia Kuo
  • Patent number: 8409476
    Abstract: There is provided a transparent conductor including conductive nanoparticles and at least one of (a) a fluorinated acid polymer and (b) a semiconductive polymer doped with a fluorinated acid polymer. The nanoparticles are carbon nanoparticles, metal nanoparticles, or combinations thereof. The carbon and metal nanoparticles are selected from nanotubes, fullerenes, and nanofibers. The acid polymers are fluorinated or highly fluorinated and have acidic groups including carboxylic acid groups, sulfonic acid groups, sulfonimide groups, phosphoric acid groups, phosphonic acid groups, and combinations thereof. The semiconductive polymers comprise homopolymers and copolymers derived from monomers selected from substituted and unsubstituted thiophenes, pyrroles, anilines, and cyclic heteroaromatics, and combinations of those. The compositions may be used in organic electronic devices (OLEDs).
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: April 2, 2013
    Assignee: E I du Pont de Nemours and Company
    Inventors: Che-Hsiung Hsu, Hjalti Skulason
  • Publication number: 20130054566
    Abstract: Methods, computer systems, and computer-readable media for accelerating a learning-to-rank algorithm using a central processing unit (CPU) and a graphics processing unit (GPU) are provided. The GPU processes document pairs created by the CPU in parallel to generate a lambda-gradient value and a weight for each document. The CPU builds a regression tree for the documents. The GPU is utilized to accelerate this process by constructing histograms of feature values, wherein the address of bins collecting the same feature value are shifted during the construction of the histogram. The output of the regression tree is a score for each document which is used to rank or order the document on a search engine results page.
    Type: Application
    Filed: August 31, 2011
    Publication date: February 28, 2013
    Applicant: MICROSOFT CORPORATION
    Inventors: NINGYI XU, Allan Wu, Jin Li, Yu Wang, Chunshui Zhao, Feng-Hsiung Hsu