Abstract: A method according to the present disclosure includes forming a bottom electrode layer over a substrate, forming an insulator layer over the bottom electrode layer, depositing a semiconductor layer over the bottom electrode layer, depositing a ferroelectric layer over the semiconductor layer, forming a top electrode layer over the ferroelectric layer, and patterning the bottom electrode layer, the insulator layer, the semiconductor layer, the ferroelectric layer, and the top electrode layer to form a memory stack. The semiconductor layer includes a plurality of portions with different thicknesses.

Abstract: Techniques are described for designing and forming cells comprising transistor devices for an integrated circuit. In an example, an integrated circuit structure includes a plurality of cells arranged in rows where some rows have different cell heights compared to other rows. Additionally, the various rows of cells may contain semiconductor nanoribbons having different widths between different rows. For example, any number of first rows of cells can each have a first height and any number of second rows can each have a second height that is smaller than the first height. The first rows of cells may include transistors with semiconductor nanoribbons having a first width and the second rows of cells may include transistors with semiconductor nanoribbons having a second width smaller than the first width. In some cases, any of the first rows of cells may also include transistors with semiconductor nanoribbons having the second width.

Abstract: An antenna structure and an electronic apparatus are provided. The antenna structure includes a substrate, a first radiation part, and a second radiation part. The substrate has a first surface and a second surface opposite to each other. The first radiation part is disposed on the first surface. The first radiation part is an absorber material. The second radiation part is disposed on the second surface. The second radiation part is coupled to a feeding part. There is a distance between the second radiation part and the first radiation part, so as to excite a first resonance mode through the coupling of the second radiation part to the first radiation part. Accordingly, the specific absorption rate (SAR) value of the electromagnetic wave is reduced.

Abstract: Disclosed herein is a method of identifying a plurality of mesenchymal stem cells (MSCs) that are therapeutic to a subject having an immune-related disease, for example, arthritis. According to embodiments of the present disclosure, the MSCs exhibiting to the immune-related disease are characterized in having an immunosuppressive protein binding value (IPBv) greater than 170 toward indoleamine 2,3-dioxygenase (IDO) after being exposed to 50-800 U/ml of IFN-?. Also disclosed herein are uses of the identified MSCs for the manufacture of a medicament, and methods of treating an immune-related disease by use of the identified MSCs or medicament.

Abstract: Methods for etching metal, such as for processing a metal gate, are provided. A method includes forming a hard mask over the metal, wherein the hard mask includes a sidewall defining an opening; and performing a plasma etching process including cycles of depositing a carbon nitride film on the sidewall and etching the metal.

Abstract: A cable management system for a server rack, including an adapter bracket coupled to the server rack; a rail assembly coupled to the adapter bracket, the rail assembly including a plurality of apertures; a cable management apparatus slideably coupled to the rail assembly, the cable management apparatus including: a plunger; a plurality of tabs; and a plurality of retention devices, wherein, when the cable management apparatus is coupled to the rail assembly, the plunger extends through one of the apertures to define a position of the cable management apparatus with respect to the rail assembly such that one or more cables of the server rack are positioned between opposing tabs of the plurality of tabs and coupled to the cable management apparatus by one or more of the retention devices.

Abstract: A computing device obtains an image of a user and detects at least one fashion accessory depicted in the image. The computing device determines a fashion accessory category for each of the at least one detected fashion accessory and retrieves at least one candidate fashion accessory associated with the accessory category from a data store. The computing device determines attributes of the fashion accessory and a replacement fashion accessory and performs virtual application of the replacement fashion accessory on the user based on the attributes of the fashion accessory and the replacement fashion accessory.

Abstract: There is provided an electronic product that performs the obstacle avoidance, positioning and object recognition according to image frames captured by the same optical sensor. The electronic product includes an optical sensor, a light emitting diode, a laser diode and a processor. The processor identifies an obstacle and a distance thereof according to image frames captured by the optical sensor when the laser diode is emitting light. The processor further performs the positioning and object recognition according to image frames captured by the optical sensor when the light emitting diode is emitting light.

Abstract: A material cutting and grinding device is provided. The material cutting and grinding device includes a shaft, a rotor assembly, a cutting grinding sheet, a fixture and a channel set. The rotor assembly includes a housing, a rotor, an air intake opening, blades and accommodating grooves. The rotor is accommodated in a holding groove of the housing. The rotor is sleeved on the shaft. The accommodating grooves are passed through the rotor. The blades are passed through the accommodating grooves. The cutting grinding sheet is connected to the other end of the shaft. The fixture clamps the cutting grinding sheet. The channel set includes a shaft channel and a gas channel. The shaft channel is passing through the shaft. The gas channel is disposed on the fixture. The gas channel is connected to the shaft channel.

Abstract: The current application fulfills a need for methods of making bi-specific CAR T-cells that have high efficacy. Aspects of the disclosure relate to a method for manufacturing a CD19/CD20 bi-specific chimeric antigen receptor (CAR) T cell comprising the ordered steps of: (a) providing a composition comprising a population of cells comprising T cells; (b) contacting the composition comprising the population of cells comprising T cells with one or more of a transactivating composition, IL-2, and/or IL-15; (c) transducing the cell composition from (b) with a CD19/CD20 bi-specific CAR nucleic acid; and (d) removing the transactivating composition from the cell composition of (c). Further aspects relate to a population of CD19/CD20 bi-specific CAR-T cells produced by the methods of the disclosure. Yet further aspects describe a method for treating a subject for B-cell lymphoma comprising administering cells of the disclosure.

Abstract: There is provided a lens including a first curved surface and a second curved surface. The first curved surface and the second curved surface have different focal distances and are arranged interlacedly along a radial direction of the lens.

Abstract: A method includes: abutting a first logic cell having a first cell height to a first memory cell having the first cell height; forming a first conductive rail and a second conductive rail at opposite sides of the first memory cell, respectively; forming a plurality of first conductive rails between the first conductive rail and the second conductive rail; forming a third conductive rail and a fourth conductive rail at opposite sides of the first logic cell, respectively; and forming a plurality of second conductive rails between the third conductive rail and the fourth conductive rail. An amount of the plurality of second conductive rails is larger than an amount of the plurality of first conductive rails.

Abstract: A method includes forming a fin that includes a first semiconductor layers and a second semiconductor layers alternatively disposed; forming a gate stack on the fin and a gate spacer disposed on a sidewall of the gate stack; etching the fin within a source/drain region, resulting in a source/drain trench; recessing the first semiconductor layers in the source/drain trench, resulting in first recesses underlying the gate spacer; forming inner spacers in the first recesses; recessing the second semiconductor layers in the source/drain trench, resulting in second recesses; and epitaxially growing a source/drain feature in the source/drain trench, wherein the epitaxially growing further includes a first epitaxial semiconductor layer extending into the second recesses; and a second epitaxial semiconductor layer on the first epitaxial semiconductor layer and filling in the source/drain trench, wherein the first and second epitaxial semiconductor layers are different in composition.

Abstract: An optical film, an optical film set, a backlight module and a display device are provided. The optical film includes a main body, plural first prism structures and plural second prism structures. The main body has a first optical surface and a second optical surface. The first prism structures are disposed on the first optical surface. Each of the first prism structures extends along a first direction. The second prism structures are disposed on the second optical surface. Each of the second prism structures extends along a second direction. The first direction is different from the second direction.

Abstract: A server rack includes a frame and a top panel. The frame includes a top frame structure and holds multiple information handling systems. The top panel includes a main portion and a sliding portion. The main portion is secured in a fixed location on the top frame structure. The sliding portion is adjustably coupled to a first edge of the main portion. The sliding portion transitions between a closed portion and an open position. A space between the sliding portion and an outer edge of the top frame structure is larger when the sliding portion is in the open position as compared to when the sliding portion is in the closed position.

Abstract: In some embodiments, the present disclosure provides an integrated chip including a first electrode made of a metal; a second electrode disposed over the first electrode; a ferroelectric layer between the first and second electrodes; and an interfacial layer separating the ferroelectric layer and the first electrode, the interfacial layer comprising a semiconductor material and configured to space the first electrode from the ferroelectric layer.

Abstract: A method includes: abutting a first logic cell having a first cell height to a first memory cell having the first cell height; forming a first conductive rail and a second conductive rail at opposite sides of the first memory cell, respectively; forming a plurality of first conductive rails between the first conductive rail and the second conductive rail; forming a third conductive rail and a fourth conductive rail at opposite sides of the first logic cell, respectively; and forming a plurality of second conductive rails between the third conductive rail and the fourth conductive rail. An amount of the plurality of second conductive rails is larger than an amount of the plurality of first conductive rails.

Abstract: A semiconductor device includes at least one memory cell and at least one logic cell. The at least one logic cell is disposed next to the at least one memory cell. The at least one logic cell includes fins. The fins are separated into fin groups for forming transistors. A distance between two adjacent groups of the plurality of fin groups is different from a distance between another two adjacent groups of the plurality of fin groups.

Abstract: A method of forming a semiconductor device includes forming an opening in a dielectric layer, and forming a barrier layer in the opening. A combined liner layer is formed over the barrier layer by first forming a first liner layer over the barrier layer, and forming a second liner layer over the first liner layer, such that the first liner layer and the second liner layer intermix. A conductive material layer is formed over the combined liner layer, and a thermal process is performed to reflow the conductive material layer.

Abstract: Semiconductor devices and methods are provided. A semiconductor device according to the present disclosure includes a first transistor having a first gate dielectric layer, a second transistor having a second gate dielectric layer, and a third transistor having a third gate dielectric layer. The first gate dielectric layer includes a first concentration of a dipole layer material, the second gate dielectric layer includes a second concentration of the dipole layer material, and the third gate dielectric layer includes a third concentration of the dipole layer material. The dipole layer material includes lanthanum oxide, aluminum oxide, or yittrium oxide. The first concentration is greater than the second concentration and the second concentration is greater than the third concentration.