Patents by Inventor HSUAN CHOU
HSUAN CHOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250147086Abstract: The present disclosure provides a system of measuring capacitance of a device-under-test (DUT). The system includes first switch, second switch, and a capacitance measurement device. The first switch is configured to receive a supply voltage. The first and second switches are electrically connected to the DUT. The capacitance measurement device is configured to provide a first pair of non-overlapping periodic signals with a first frequency, and a second pair of non-overlapping periodic signals with a second frequency. The second frequency is ? times the first frequency. When the first switch and the second switch receive the first pair of non-overlapping periodic signals, a first current is transmitted through the first switch and the second switch. When the first switch and the second switch receive the second pair of non-overlapping periodic signals, a second current is transmitted through the first switch and the second switch.Type: ApplicationFiled: January 13, 2025Publication date: May 8, 2025Inventors: MAO-HSUAN CHOU, RUEY-BIN SHEEN, CHIH-HSIEN CHANG
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Publication number: 20250150205Abstract: This disclosure provides methods, components, devices and systems for modulation of extended long range wireless packets. Some aspects more specifically relate to communicating packets in an extended long range (ELR) communication mode. A wireless communication device may receive an indication to transmit a single-user wireless packet associated with the ELR communication mode, where the single-user wireless packet includes a preamble portion and a data portion. At least the data portion may be associated with a duplication scheme pertaining to the ELR communication mode. The wireless communication device may transmit, in accordance with the indication, the single-user wireless packet using a first quantity of duplications of at least the data portion in accordance with the duplication scheme, where the first quantity of duplications is associated with the ELR communication mode.Type: ApplicationFiled: November 6, 2023Publication date: May 8, 2025Inventors: Lin YANG, Tzu-Hsuan CHOU, Bin TIAN
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Publication number: 20250123847Abstract: A BIOS code storage subsystem modification system includes a computing device having BIOS code storage device modification subsystem coupled to a BIOS storage system that includes a BIOS code storage device and a BIOS data storage device. The BIOS code storage device modification subsystem receives a BIOS code storage device modification interrupt and, in response, provides BIOS code storage device modification information in the BIOS data storage device. Subsequent to providing the BIOS code storage device modification information in the BIOS data storage device, the BIOS code storage device modification subsystem causes the computing device to perform a first reboot. During a first initialization of the computing device in response to the first reboot, a BIOS in the computing device identifies the BIOS code storage device modification information in the BIOS data storage device, and uses the BIOS code storage device modification information to modify the BIOS code storage device.Type: ApplicationFiled: October 17, 2023Publication date: April 17, 2025Inventors: Ching-Lung Chao, Yiping Zhou, David Keith Chalfant, Wei Liu, Parth Girishkumar Bera, Po-Yu Cheng, Yu-Hsuan Chou
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Publication number: 20250070830Abstract: Methods, systems, and devices for wireless communication are described. A user equipment (UE) transmits a signal in accordance with a shortened time domain precoding filter for multi-antenna precoding. In some examples, a UE may precode the signal in accordance with a subset of time domain precoding taps. The UE may select the subset of time domain precoding taps from a set of time domain precoding taps in accordance with an absolute value of each of the set of time domain precoding taps. The UE may transmit the signal in accordance with the precoding. In other examples, the UE may select a transmit channel shortener to apply to a channel. The UE may select the transmit channel shortener based on a channel energy of a shortened channel that is associated with the transmit channel shortener. The UE may transmit the signal via the shortened channel.Type: ApplicationFiled: August 22, 2023Publication date: February 27, 2025Inventors: Tzu-Hsuan CHOU, Jing JIANG, Jing SUN, Yu ZHANG
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Patent number: 12228598Abstract: The present disclosure provides a system of measuring capacitance of a device-under-test (DUT). The system includes first switch, second switch, and a capacitance measurement device. The first switch is configured to receive a supply voltage. The first and second switches are electrically connected to the DUT. The capacitance measurement device is configured to provide a first pair of non-overlapping periodic signals with a first frequency, and a second pair of non-overlapping periodic signals with a second frequency. The second frequency is ? times the first frequency. When the first switch and the second switch receive the first pair of non-overlapping periodic signals, a first current is transmitted through the first switch and the second switch. When the first switch and the second switch receive the second pair of non-overlapping periodic signals, a second current is transmitted through the first switch and the second switch.Type: GrantFiled: July 20, 2022Date of Patent: February 18, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Mao-Hsuan Chou, Ruey-Bin Sheen, Chih-Hsien Chang
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Patent number: 12230558Abstract: The present disclosure provides a package device and a manufacturing method thereof. The package device includes an electronic device, a conductive pad having a first bottom surface, and a redistribution layer disposed between the conductive pad and the electronic device. The redistribution layer has a second bottom surface, and the conductive pad is electrically connected to the electronic device through the redistribution layer. The first bottom surface is closer to the electronic device than the second bottom in a normal direction of the electronic device.Type: GrantFiled: October 5, 2022Date of Patent: February 18, 2025Assignee: InnoLux CorporationInventors: Hsueh-Hsuan Chou, Chia-Chieh Fan, Kuan-Jen Wang, Cheng-Chi Wang, Yi-Hung Lin, Li-Wei Sung
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Patent number: 12149264Abstract: A device includes a phase detector circuit, a charge pump circuit, a sample and hold circuit, a comparator, and a controller. The phase detector circuit detects a clock skew between a reference signal and an input signal. The charge pump circuit translates the clock skew into a voltage. A sample and hold circuit samples the voltage, at a first time, and maintain the sampled voltage until a second time. The comparator (i) detects a loop gain associated with the input signal based on the sampled voltage and the voltage at the second time and (ii) outputs a loop gain signal for adjustment of the input signal. The controller is coupled to the phase detector, the comparator, and the sample and hold circuit. The controller generates a plurality of control signals for automatically controlling operation of the phase detector, the comparator, and the sample and hold circuit.Type: GrantFiled: June 6, 2023Date of Patent: November 19, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Mao-Hsuan Chou, Ya-Tin Chang, Ruey-Bin Sheen, Chih-Hsien Chang
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Publication number: 20240264336Abstract: Described herein is a method of depositing a conformal, optically transparent coating onto a surface of one or more internal components that are enclosed within an assembled device including an optical encoder using a non-line-of-sight deposition process without altering a structure of the assembled device or impacting functionality of the assembled device. Also described is an assembled device including an optical encoder, where one or more internal components enclosed within the optical encoder and a coating deposited onto a surface of the internal components, where the coating is a conformal, optically transparent coating that is resistant to corrosion by at least one of fluorine-, chlorine-, sulfur-, hydrogen-, bromine-, or nitrogen-based acids and that does not negatively impact functionality of the internal components.Type: ApplicationFiled: March 14, 2024Publication date: August 8, 2024Inventors: Alexander Berger, Cheng-Hsuan Chou, David Knapp
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Patent number: 12023361Abstract: A method for promoting hair growth is disclosed. The method comprises a step of administering Lactobacillus paracasei GMNL-653 to a subject who needs to increase hair volume at a dose of 1.25×108 to 5×108 cells/ml/day, and the Lactobacillus paracasei GMNL-653 was deposited at the China Center for Type Culture Collection located at Wuhan University, Wuhan 430072 P.R. China on Apr. 25, 2016 under an accession number CCTCC NO. M 2016226.Type: GrantFiled: April 8, 2022Date of Patent: July 2, 2024Assignee: GENMONT BIOTECH INC.Inventors: Wan-hua Tsai, Chia-hsuan Chou, Tsuei yin Huang, Ying-ju Chiang, Ching-gong Lin
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Patent number: 11984901Abstract: A counter signal counting at a frequency of a clock signal is generated. Among a plurality of different numeric ranges corresponding to a plurality of different thresholds, a threshold corresponding to a numeric range containing a frequency ratio is selected. In response to the counter signal reaching the selected threshold, a logic level of an output signal is switched.Type: GrantFiled: May 31, 2022Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Mao-Hsuan Chou, Chih-Hsien Chang, Ruey-Bin Sheen
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Patent number: 11960899Abstract: An information handling system includes multiple dual in-line memory modules (DIMMs) and a basic input/output system (BIOS). The DIMMs form a memory system of the information handling system. The BIOS begins a system boot of the information handling system, and performs a first memory reference code training. Based on the first memory reference code training, the BIOS discovers a bad DIMM of the DIMMs, and stores information associated with the bad DIMM. The BIOS reboots the information handling system. During the reboot, the BIOS retrieves the information associated with the bad DIMM. The BIOS disables a slot associated with the bad DIMM. In response to the slot being disabled, the BIOS performs a second memory reference code training. Based on the second memory reference code training, the BIOS downgrades the memory system to a closest possible DIMM population.Type: GrantFiled: July 21, 2022Date of Patent: April 16, 2024Assignee: Dell Products L.P.Inventors: Ching-Lung Chao, Hsin-Chieh Wang, Wei G. Liu, Yu-Hsuan Chou
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Patent number: 11933942Abstract: Described herein is a method of depositing a conformal, optically transparent coating onto a surface of one or more internal components that are enclosed within an assembled device using a non-line-of-sight deposition process without altering a structure of the assembled device or impacting functionality of the assembled device. Also described is an assembled device including one or more internal components enclosed within the assembled device and a coating deposited onto a surface of the internal components enclosed within the assembled device, where the coating is a conformal, optically transparent coating that is resistant to corrosion by at least one of fluorine-, chlorine-, sulfur-, hydrogen-, bromine-, or nitrogen-based acids and that does not negatively impact functionality of the internal components.Type: GrantFiled: March 16, 2020Date of Patent: March 19, 2024Assignee: Applied Materials, Inc.Inventors: Alexander Berger, Cheng-Hsuan Chou, David Knapp
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Publication number: 20240027504Abstract: The present disclosure provides a system of measuring capacitance of a device-under-test (DUT). The system includes first switch, second switch, and a capacitance measurement device. The first switch is configured to receive a supply voltage. The first and second switches are electrically connected to the DUT. The capacitance measurement device is configured to provide a first pair of non-overlapping periodic signals with a first frequency, and a second pair of non-overlapping periodic signals with a second frequency. The second frequency is ? times the first frequency. When the first switch and the second switch receive the first pair of non-overlapping periodic signals, a first current is transmitted through the first switch and the second switch. When the first switch and the second switch receive the second pair of non-overlapping periodic signals, a second current is transmitted through the first switch and the second switch.Type: ApplicationFiled: July 20, 2022Publication date: January 25, 2024Inventors: MAO-HSUAN CHOU, RUEY-BIN SHEEN, CHIH-HSIEN CHANG
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Publication number: 20240028342Abstract: An information handling system includes multiple dual in-line memory modules (DIMMs) and a basic input/output system (BIOS). The DIMMs form a memory system of the information handling system. The BIOS begins a system boot of the information handling system, and performs a first memory reference code training. Based on the first memory reference code training, the BIOS discovers a bad DIMM of the DIMMs, and stores information associated with the bad DIMM. The BIOS reboots the information handling system. During the reboot, the BIOS retrieves the information associated with the bad DIMM. The BIOS disables a slot associated with the bad DIMM. In response to the slot being disabled, the BIOS performs a second memory reference code training. Based on the second memory reference code training, the BIOS downgrades the memory system to a closest possible DIMM population.Type: ApplicationFiled: July 21, 2022Publication date: January 25, 2024Inventors: Ching-Lung Chao, Hsin-Chieh Wang, Wei G. Liu, Yu-Hsuan Chou
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Publication number: 20230380071Abstract: An electronic device is disclosed. The electronic device includes a circuit structure. The circuit structure includes a metal member and an insulating layer. The insulating layer surrounds the metal member and includes at least one recess. The metal member corresponds to the recess, the recess exposes a surface of the metal member, and a width of the recess is greater than a width of the metal member in a cross-sectional view of the metal member and the insulating layer.Type: ApplicationFiled: July 25, 2023Publication date: November 23, 2023Applicant: InnoLux CorporationInventors: Hsueh-Hsuan Chou, Yi-Hung Lin
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Publication number: 20230318617Abstract: A device includes a phase detector circuit, a charge pump circuit, a sample and hold circuit, a comparator, and a controller. The phase detector circuit detects a clock skew between a reference signal and an input signal. The charge pump circuit translates the clock skew into a voltage. A sample and hold circuit samples the voltage, at a first time, and maintain the sampled voltage until a second time. The comparator (i) detects a loop gain associated with the input signal based on the sampled voltage and the voltage at the second time and (ii) outputs a loop gain signal for adjustment of the input signal. The controller is coupled to the phase detector, the comparator, and the sample and hold circuit. The controller generates a plurality of control signals for automatically controlling operation of the phase detector, the comparator, and the sample and hold circuit.Type: ApplicationFiled: June 6, 2023Publication date: October 5, 2023Inventors: Mao-Hsuan Chou, Ya-Tin Chang, Ruey-Bin Sheen, Chih-Hsien Chang
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Patent number: 11758666Abstract: A manufacturing method of a metal structure is disclosed, which includes the following steps: forming a seed layer on a substrate; forming a patterned metal layer on the seed layer, wherein the patterned metal layer includes a metal member; forming a first patterned photoresist layer on the seed layer, wherein a thickness of the first patterned photoresist layer is less than a thickness of the patterned metal layer; and performing a first patterning process to the seed layer through the first patterned photoresist layer to form a patterned seed layer, wherein after the first patterning process, the metal member includes a first part and a second part, the first part is disposed between the patterned seed layer and the second part, and a width of the first part is greater than a width of the second part.Type: GrantFiled: September 28, 2021Date of Patent: September 12, 2023Assignee: InnoLux CorporationInventors: Hsueh-Hsuan Chou, Yi-Hung Lin
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Publication number: 20230213697Abstract: A backlight module includes a light guide plate, a light source, multiple first optical microstructures, and multiple second optical microstructures. The first optical microstructures and the second optical microstructures are disposed on the bottom surface of the light guide plate. Each of the first optical microstructures has a first light receiving surface facing the light source. Each of the second optical microstructures has a second light receiving surface facing the light source. A first angle is included between the first light receiving surface and the bottom surface. A second angle is included between the second light receiving surface and the bottom surface. The second angle is different from the first angle. A display apparatus adopting the backlight module is also provided.Type: ApplicationFiled: December 20, 2022Publication date: July 6, 2023Applicant: Coretronic CorporationInventors: Tzeng-Ke Shiau, Hsuan Chou, Hung-Li Pan, Yi-Cheng Lin, Chia-Liang Kang, Shih-Wei Liu, Wei-Chun Yang, Cheng-Yi Tseng
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Publication number: 20230201279Abstract: The invention provides an extracellular vesicle and a nucleotide fragment isolated from Lactobacillus paracasei GM-080 with the deposition number BCRC 910220 and CCTCC M 204012 and use thereof. The invention also relates to a method for modulating immune function comprising administering a composition including the extracellular vesicle and the nucleotide fragment.Type: ApplicationFiled: March 11, 2022Publication date: June 29, 2023Inventors: Wan-Hua Tsai, Wen-Wei Chang, Chia-Hsuan Chou, I-Jen Wang, Wen-Ling Yeh, Jhih-Hua Jhong, Tzong-Yi Lee
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Patent number: 11689214Abstract: A device includes a phase detector circuit, a charge pump circuit, a sample and hold circuit, a comparator, and a controller. The phase detector circuit detects a clock skew between a reference signal and an input signal. The charge pump circuit translates the clock skew into a voltage. A sample and hold circuit samples the voltage, at a first time, and maintain the sampled voltage until a second time. The comparator (i) detects a loop gain associated with the input signal based on the sampled voltage and the voltage at the second time and (ii) outputs a loop gain signal for adjustment of the input signal. The controller is coupled to the phase detector, the comparator, and the sample and hold circuit. The controller generates a plurality of control signals for automatically controlling operation of the phase detector, the comparator, and the sample and hold circuit.Type: GrantFiled: May 24, 2022Date of Patent: June 27, 2023Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Mao-Hsuan Chou, Ya-Tin Chang, Ruey-Bin Sheen, Chih-Hsien Chang