Patents by Inventor HSUAN CHOU

HSUAN CHOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220087030
    Abstract: A manufacturing method of a metal structure is disclosed, which includes the following steps: forming a seed layer on a substrate; forming a patterned metal layer on the seed layer, wherein the patterned metal layer includes a metal member; forming a first patterned photoresist layer on the seed layer, wherein a thickness of the first patterned photoresist layer is less than a thickness of the patterned metal layer; and performing a first patterning process to the seed layer through the first patterned photoresist layer to form a patterned seed layer, wherein after the first patterning process, the metal member includes a first part and a second part, the first part is disposed between the patterned seed layer and the second part, and a width of the first part is greater than a width of the second part.
    Type: Application
    Filed: November 20, 2020
    Publication date: March 17, 2022
    Inventors: Hsueh-Hsuan CHOU, Yi-Hung LIN
  • Publication number: 20220087028
    Abstract: A manufacturing method of a metal structure is disclosed, which includes the following steps: forming a seed layer on a substrate; forming a patterned metal layer on the seed layer, wherein the patterned metal layer includes a metal member; forming a first patterned photoresist layer on the seed layer, wherein a thickness of the first patterned photoresist layer is less than a thickness of the patterned metal layer; and performing a first patterning process to the seed layer through the first patterned photoresist layer to form a patterned seed layer, wherein after the first patterning process, the metal member includes a first part and a second part, the first part is disposed between the patterned seed layer and the second part, and a width of the first part is greater than a width of the second part.
    Type: Application
    Filed: September 28, 2021
    Publication date: March 17, 2022
    Applicant: InnoLux Corporation
    Inventors: Hsueh-Hsuan CHOU, Yi-Hung LIN
  • Patent number: 11258825
    Abstract: A cybersecurity system includes sensors that detect and report computer security events. Collected reports of computer security events are formed into state sequences, which are used as training data to train and build a prediction model. A current computer security event is detected and used as an input to the prediction model, which provides a prediction of a next computer security event. A monitoring level of a cybersecurity sensor is adjusted in accordance with the predicted next computer security event.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: February 22, 2022
    Assignee: Trend Micro Incorporated
    Inventors: Chin-En Yang, Wen-Kwang Tsao, Yi-De Wu, Yu-Hsuan Chou, Jaime Yaneza, Jr.
  • Patent number: 11228304
    Abstract: A method and apparatus of generating precision phase skews is disclosed. In some embodiments, a phase skew generator includes: a charge pump having a first mode of operation and a second mode of operation, wherein the first mode of operation provides a first current path during a first time period, and the second mode of operation provides a second current path during a second time period following the first time period, a sample and hold circuit, coupled to a capacitor, and configured to sample a voltage level of the capacitor at predetermined times and provide an output voltage during a third time period following the second time period; and a voltage controlled delay line, coupled to the sample and hold circuit, and having M delay line stages each configured to output a signal having a phase skew offset with respect to preceding or succeeding signal.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: January 18, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Mao-Hsuan Chou, Ya-Tin Chang, Ruey-Bin Sheen, Chih-Hsien Chang
  • Publication number: 20210285028
    Abstract: Disclosed is a method and a device for determining whether a sample contains ampicillin-resistant (AMP-R) non-typhoid Salmonella (NTS). The method comprises detecting, in the sample, the presence of a combination of certain genes or their gene products, wherein the presence of said combination indicates the sample contains AMP-R NTS.
    Type: Application
    Filed: May 21, 2019
    Publication date: September 16, 2021
    Applicant: TAIPEI MEDICAL UNIVERSITY
    Inventors: Shiuh-Bin FANG, Wei-Chiao CHANG, Wan-Hsuan CHOU, Ke-Chuan WANG
  • Patent number: 11120249
    Abstract: The present disclosure is to provide a computer-aided cell segmentation method for determining cellular Nuclear-to-Cytoplasmic ratio, which comprises acts of obtaining a cytological image using non-invasive in vivo biopsy technique; performing a nuclei segmentation process to identify a position and a contour of each of identified nuclei in the cytological image; performing a cytoplasmic process with an improved active contour model to obtain a cytoplasmic region for each identified nucleus based; and determine a cellular Nuclear-to-Cytoplasmic ratio based on the obtained nucleus and cytoplasmic regions.
    Type: Grant
    Filed: December 22, 2019
    Date of Patent: September 14, 2021
    Assignee: National Cheng Kung University
    Inventors: Gwo Giun Lee, Yi-Hsuan Chou, Chen-Han Sung
  • Publication number: 20210250041
    Abstract: A device includes a phase detector circuit, a charge pump circuit, a sample and hold circuit, a comparator, and a controller. The phase detector circuit detects a clock skew between a reference signal and an input signal. The charge pump circuit translates the clock skew into a voltage. A sample and hold circuit samples the voltage, at a first time, and maintain the sampled voltage until a second time. The comparator (i) detects a loop gain associated with the input signal based on the sampled voltage and the voltage at the second time and (ii) outputs a loop gain signal for adjustment of the input signal. The controller is coupled to the phase detector, the comparator, and the sample and hold circuit. The controller generates a plurality of control signals for automatically controlling operation of the phase detector, the comparator, and the sample and hold circuit.
    Type: Application
    Filed: December 4, 2020
    Publication date: August 12, 2021
    Inventors: Mao-Hsuan Chou, Ya-Tin Chang, Ruey-Bin Sheen, Chih-Hsien Chang
  • Patent number: 11087462
    Abstract: A system for determining a colonoscopy image is disclosed. The system includes a bowel preparation evaluation unit, an image processing unit electrically or communicatively connected to the bowel evaluation unit, and a convolutional neural network unit electrically or communicatively connected to the image processing unit. The bowel preparation evaluation unit determines whether a bowel in the colonoscopy image is clean. The image processing unit receives the colonoscopy image determined to have a clean bowel and outputted by the bowel preparation evaluation unit, and performs an image process on the colonoscopy image with clean bowel to adjust a contrast thereof. The convolutional neural network unit comprises a convolutional neural network and in a working mode, receives and determines whether the processed colonoscopy image is a cecal image, a non-cecal image, or an indeterminable colonoscopy image.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: August 10, 2021
    Assignee: National Taiwan University
    Inventors: Han-Mo Chiu, Yi-Hsuan Chou, Shuo-Hong Hung, Li-Yang Chang, Chung-Ping Chen
  • Patent number: 11075155
    Abstract: A package structure includes a redistribution layer having a first surface, a second surface disposed opposite to the first surface, and at least one sidewall connected to the first surface and the second surface, at least one bonding electrode disposed on the first surface of the redistribution layer, and a mounting layer disposed on the second surface of the redistribution layer. The mounting layer includes a plurality of conductive pads that are spaced apart from each other. At least one of the conductive pads is exposed by the sidewall of the redistribution layer.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: July 27, 2021
    Assignee: InnoLux Corporation
    Inventors: Hsueh-Hsuan Chou, Chia-Chieh Fan, Cheng-Chi Wang, Kuan-Jen Wang
  • Patent number: 11040939
    Abstract: Provided are a novel N-transfer reagent and a method for preparing the same and its application. The N-transfer reagent is represented by the following Formula (I): The various novel N-transfer reagents of the present invention can be quickly prepared by employing different nitrobenzene precursors. The N-transfer reagents can directly convert a variety of amino compounds into diazo compounds under mild conditions. Particularly, the N-transfer reagents can facilitate the synthesis of the diazo compounds. The application of synthesizing diazo compounds of the present invention can greatly decrease the difficulty in operation, increase the safety during experiments, reduce the cost of production and the environmental pollution, and enhance the industrial value of diazo compounds.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: June 22, 2021
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Ho-Hsuan Chou, Guan-Han Lu, Hsiao-Chin Hsueh, Tzu-Chia Huang
  • Publication number: 20210182528
    Abstract: The present disclosure is to provide a computer-aided cell segmentation method for determining cellular Nuclear-to-Cytoplasmic ratio, which comprises acts of obtaining a cytological image using non-invasive in vivo biopsy technique; performing a nuclei segmentation process to identify a position and a contour of each of identified nuclei in the cytological image; performing a cytoplasmic process with an improved active contour model to obtain a cytoplasmic region for each identified nucleus based; and determine a cellular Nuclear-to-Cytoplasmic ratio based on the obtained nucleus and cytoplasmic regions.
    Type: Application
    Filed: December 22, 2019
    Publication date: June 17, 2021
    Inventors: Gwo Giun Lee, Yi-Hsuan Chou, Chen-Han Sung
  • Publication number: 20210173009
    Abstract: An apparatus and method for providing a phase noise built-in self test (BIST) circuit are disclosed herein. In some embodiments, a method and apparatus for forming a multi-stage noise shaping (MASH) type high-order delta sigma (??) time-to-digital converter (TDC) are disclosed. In some embodiments, an apparatus includes a plurality of first-order ?? TDCs formed in an integrated circuit (IC) chip, wherein each of the first-order ?? DCs are connected to one another in a MASH type configuration to provide the MASH type high-order ?? TDC, wherein the MASH type high-order ?? TDC is configured to measure the phase noise of a device under text (DUT).
    Type: Application
    Filed: February 19, 2021
    Publication date: June 10, 2021
    Inventors: Mao-Hsuan CHOU, Ya-Tin Chang, Ruey-Ben Sheen, Chih-Hsien Chang
  • Publication number: 20210167784
    Abstract: A frequency divider circuit includes a counter configured to generate a counter signal responsive to a frequency of a clock signal and a frequency ratio, and a compensation circuit coupled to the counter, and configured to generate an output signal. The output signal has a frequency equal to the frequency of the clock signal divided by a frequency ratio, and a duty cycle lower than 50% and greater than 1/r, where r is the frequency ratio.
    Type: Application
    Filed: February 9, 2021
    Publication date: June 3, 2021
    Inventors: Mao-Hsuan CHOU, Ruey-Bin SHEEN, Chih-Hsien CHANG
  • Patent number: 11007137
    Abstract: The present invention provides a use for probiotic preparing skin care composition, wherein the probiotic comprises Lactobacillus plantarum (GMNL-6) with preservation number of BCRC 910777 or CCTCC M 2017765. The composition may be externally-coating drug, pharmaceuticals for external use, care products for external use or cosmetics, and may achieve the effects of improving the skin conditions or aesthetic appearance by promoting secretion of collagen or expression of ceramide synthase.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: May 18, 2021
    Assignee: GENMONT BIOTECH INCORPORATION
    Inventors: Yi-Hsing Chen, Wan-Hua Tsai, Chia-Hsuan Chou, Ying-Ju Chiang
  • Publication number: 20210123143
    Abstract: Embodiments of the present disclosure relate to articles, coated articles, and methods of coating such articles with a corrosion resistant coating. The corrosion resistant coating can comprise hafnium aluminum oxide. The corrosion resistant coating may be deposited by a non-line of sight deposition, such as atomic layer deposition. Articles that may be coated may include chamber components, such as gas lines.
    Type: Application
    Filed: October 16, 2020
    Publication date: April 29, 2021
    Inventors: David Fenwick, Jennifer Y. Sun, Cheng-Hsuan Chou, Xiao-Ming He
  • Patent number: 10965293
    Abstract: A delay-locked loop includes a phase detector configured to detect a phase difference between a first clock and a second clock, a charge pump configured to increase a charge amount at a capacitive load in accordance with a first charge amount and decrease the charge amount at the capacitive load in accordance with a second charge amount based on a phase difference provided by the phase detector, a sample and hold circuit configured to receive the charge amount from the capacitive load and hold the charge amount, and a voltage control delay line configured to select a delay amount based on the charge amount received from the sample and hold circuit. At least one parameter of the delay-locked loop is configured such that a desired pump current ratio of a delay cell is achieved by adjusting a delay amount of the delay cell and/or an amount of current coupled to the delay cell.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: March 30, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ya-Tin Chang, Chih-Hsien Chang, Mao-Hsuan Chou, Ruey-Bin Sheen
  • Publication number: 20210075412
    Abstract: A method and apparatus of generating precision phase skews is disclosed. In some embodiments, a phase skew generator includes: a charge pump having a first mode of operation and a second mode of operation, wherein the first mode of operation provides a first current path during a first time period, and the second mode of operation provides a second current path during a second time period following the first time period, a sample and hold circuit, coupled to a capacitor, and configured to sample a voltage level of the capacitor at predetermined times and provide an output voltage during a third time period following the second time period; and a voltage controlled delay line, coupled to the sample and hold circuit, and having M delay line stages each configured to output a signal having a phase skew offset with respect to preceding or succeeding signal.
    Type: Application
    Filed: November 19, 2020
    Publication date: March 11, 2021
    Inventors: Mao-Hsuan CHOU, Ya-Tin CHANG, Ruey-Bin SHEEN, Chih-Hsien CHANG
  • Patent number: 10928447
    Abstract: An apparatus and method for providing a phase noise built-in self test (BIST) circuit are disclosed herein. In some embodiments, a method and apparatus for forming a multi-stage noise shaping (MASH) type high-order delta sigma (??) time-to-digital converter (TDC) are disclosed. In some embodiments, an apparatus includes a plurality of first-order ?? TDCs formed in an integrated circuit (IC) chip, wherein each of the first-order ?? TDCs are connected to one another in a MASH type configuration to provide the MASH type high-order ?? TDC, wherein the MASH type high-order ?? TDC is configured to measure the phase noise of a device under text (DUT).
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: February 23, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Mao-Hsuan Chou, Ya-Tin Chang, Ruey-Bin Sheen, Chih-Hsien Chang
  • Patent number: 10924125
    Abstract: A frequency divider circuit includes a counter configured to generate a counter signal responsive to a frequency of a clock signal and a frequency ratio, and a compensation circuit coupled to the counter, and configured to generate an output signal. The output signal has a frequency equal to the frequency of the clock signal divided by a frequency ratio, and a duty cycle greater than 1/r, where r is the frequency ratio.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: February 16, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Mao-Hsuan Chou, Chih-Hsien Chang, Ruey-Bin Sheen
  • Patent number: 10921876
    Abstract: Power and performance of a multi-core system is managed dynamically by adjusting power table indices at runtime. Runtime statistics is measured, when an application is executed on a first core of a first type at a first operating point (OPP) in a first time period, and on a second core of a second core type at a second OPP in a second time period. A controller estimates, based on the runtime statistics, a first pair of indices associated with a first OPP for the first core and a second pair of indices associated with a second OPP for the second core. During runtime, the controller incorporates the first pair of indices and the second pair of indices into power table indices; and determines, from the power table indices, selected indices associated with a selected OPP of a core of a selected core type for executing the application.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: February 16, 2021
    Assignee: MediaTek Inc.
    Inventors: Jih-Ming Hsu, Tai-Hua Lu, Pei-Yu Huang, Chien-Yuan Lai, Shu-Hsuan Chou, I-Cheng Cheng, Yun-Ching Li, Ming Hsien Lee