Patents by Inventor Hsuan Lin

Hsuan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bi-Layer Metal Deposition in Silicide Formation
    Publication number: 20180175159
    Abstract: A method includes performing a first sputtering to form a first metal film on a surface of a semiconductor region. The first sputtering is performed using a first ion energy. The method further includes performing a second sputtering to form a second metal film over and contacting the first metal film, wherein the first and the second metal films includes a same metal. The second sputtering is performed using a second ion energy lower than the first ion energy. An annealing is performed to react the first and the second metal films with the semiconductor region to form a metal silicide.
    Type: Application
    Filed: February 19, 2018
    Publication date: June 21, 2018
    Inventors: Sheng-Hsuan Lin, Chih-Wei Chang
  • Semiconductors structure having an RRAM structure and method for forming the same
    Patent number: 9997567
    Abstract: A semiconductor structure includes a memory structure. The memory structure includes a memory element, a first barrier layer and a second barrier layer. The memory element includes titanium oxynitride. The first barrier layer includes at least one of silicon and silicon oxide. The first barrier layer is disposed on the memory element. The second barrier layer includes at least one of titanium and titanium oxide. The second barrier layer is disposed on the first barrier layer.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: June 12, 2018
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Dai-Ying Lee, Chao-I Wu, Yu-Hsuan Lin
  • LENS DEVICE
    Publication number: 20180157059
    Abstract: A lens device comprises a connect assembly, a lens assembly and a drive assembly. The lens assembly is disposed on the connect assembly and has a central axis. The drive assembly comprises a first coil, a magnet and a second coil. The first coil is wound around the lens assembly. The magnet is disposed on the connect assembly and has a first magnetic pole, a second magnetic pole, a first direction of magnetic field and a second direction of magnetic field. The first direction of magnetic field and the second direction of magnetic field are not parallel to each other. The first direction of magnetic field points toward the first coil. The second coil is disposed on the connect assembly. The second direction of magnetic field points toward a part of the second coil.
    Type: Application
    Filed: December 22, 2016
    Publication date: June 7, 2018
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Shou-Cheng MA, Cheng-Hsuan LIN, Wen-Yang PENG, Chieh-Yi HUANG, Chau-Shin JANG
  • METHODS AND SYSTEMS FOR USING A CLOUD COMPUTING ENVIRONMENT TO SHARE BIOLOGICAL RELATED DATA
    Publication number: 20180158126
    Abstract: The present disclosure provides a novel approach for shifting or distributing various information (e.g., protocols, analysis methods, sample preparation data, sequencing data, etc.) to a cloud-based network. For example, the techniques relate to a cloud computing environment configured to receive this information from one or more individual sample preparation devices, sequencing devices, and/or computing systems. In turn, the cloud computing environment may generate information for use in the cloud computing environment and/or to provide the generated information to the devices to guide a genomic analysis workflow. Further, the cloud computing environment may be used to facilitate the sharing of sample preparation protocols for use with generic sample preparation cartridges and/or monitoring the popularity of the sample preparation protocols.
    Type: Application
    Filed: October 3, 2017
    Publication date: June 7, 2018
    Inventors: Min-Jui Richard Shen, Charles Hsuan Lin
  • Sounding method and wireless communication system
    Patent number: 9992789
    Abstract: A sounding method utilized for a wireless communication system is disclosed. The sounding method comprises classifying a plurality of stations of the wireless communication system into a plurality of groups, and determining a plurality of initial sounding instants and a plurality of sounding periods corresponding to the plurality of groups; and performing sounding to at least one or all of the plurality of groups in a group by group fashion according to the plurality of initial sounding instants and the plurality of sounding periods.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: June 5, 2018
    Assignee: MEDIATEK INC.
    Inventors: Ying-You Lin, Yu-Ju Lee, Chih-Kun Chang, Chih-Wei Kang, Hsi-Chang Yang, Pu-Hsuan Lin
  • Semiconductor device and formation thereof
    Patent number: 9984924
    Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a metal plug in a first opening over a substrate, the metal plug is over a silicide layer, and the silicide layer is over a metal oxide layer. The metal oxide layer has an oxygen gradient, such that a percentage of oxygen increases from a top surface of the metal oxide layer to a bottom surface of the metal oxide layer. The metal oxide layer unpins the Fermi level of the interface between the metal plug and the substrate, which is exhibited by a lowered Schottky barrier height (SBH) and increased oxygen vacancy states between the V.B. and the C.B. of the metal oxide layer, which decreases the intrinsic resistivity between the metal plug and the substrate as compared to a semiconductor device that lacks such a metal oxide layer.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: May 29, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Yu-Hung Lin, You-Hua Chou, Sheng-Hsuan Lin, Chih-Wei Chang
  • Method for Silicide Formation
    Publication number: 20180145140
    Abstract: Embodiments of the present disclosure include contact structures and methods of forming the same. An embodiment is a method of forming a semiconductor device, the method including forming a contact region over a substrate, forming a dielectric layer over the contact region and the substrate, and forming an opening through the dielectric layer to expose a portion of the contact region. The method further includes forming a metal-silicide layer on the exposed portion of the contact region and along sidewalls of the opening; and filling the opening with a conductive material to form a conductive plug in the dielectric layer, the conductive plug being electrically coupled to the contact region.
    Type: Application
    Filed: January 2, 2018
    Publication date: May 24, 2018
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou, Chia-Lin Hsu
  • WAFER SUSCEPTOR
    Publication number: 20180144962
    Abstract: A wafer susceptor includes a main plate, a plurality of minor plates, and a plurality of plugs. The main plate has a plurality of first notches. The minor plates are respectively disposed in the first notches, and each of the minor plates has a second notch carrying a wafer and an engaging surface of inclination engaged with a side surface of the first notch. A first angle of 20 degrees to 45 degrees is included between the engaging surface of inclination and a horizontal plane. The second notch has a flat side corresponding to a flat of the wafer. An eave portion is disposed on the flat side. The plugs are respectively located between the main plate and the minor plates and are configured to fix the minor plates.
    Type: Application
    Filed: October 22, 2017
    Publication date: May 24, 2018
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Tang-Chi Lin, Chun-I Fan, Man-Hsuan Lin, Wen-Ching Hsu
  • COMPOSITE CONTACT PLUG STRUCTURE AND METHOD OF MAKING SAME
    Publication number: 20180144978
    Abstract: An embodiment contact plug includes a bilayer structure and a diffusion barrier layer on a sidewall and a bottom surface of the bilayer structure. The bilayer structure includes a conductive core and a conductive liner on a sidewall and a bottom surface of the conductive core. In the embodiment contact plug, the conductive liner comprises cobalt or ruthenium.
    Type: Application
    Filed: January 2, 2018
    Publication date: May 24, 2018
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou, Chia-Lin Hsu
  • Salicide formation using a cap layer
    Patent number: 9978604
    Abstract: A method of forming a semiconductor device includes forming a gate stack over a first portion of a source and a first portion of a drain. The method includes depositing a first cap layer comprising silicon over a second portion of the source and depositing a second cap layer comprising silicon over a second portion of the drain. The method includes depositing a metal layer over the gate stack, the first cap layer and the second cap layer. The method includes annealing the semiconductor device until all of the silicon in the first and second cap layers reacts with metal from the metal layer, wherein the annealing causes metal from the metal layer to react with silicon in the first cap layer, the second cap layer, the source, and the drain. Annealing the semiconductor device includes forming a salicide layer having a germanium concentration less than 3% by weight.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: May 22, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Mei-Hsuan Lin, Chih-Hsun Lin, Ching-Hua Chu, Ling-Sung Wang
  • Method for managing memory and associated microcontroller
    Patent number: 9971510
    Abstract: A microcontroller includes a processor, a memory, a working space management unit and a memory monitor. The memory has at least a working space, wherein the working space includes a plurality of blocks . The working space management unit is implemented by software, and is arranged for managing the working space of the first memory. The memory monitor is implemented by hardware circuit, and is arranged for monitoring the blocks, and recording monitoring results corresponding to the blocks of the first memory, wherein the recorded monitoring results comprise information about whether data of the blocks is modified or not.
    Type: Grant
    Filed: October 16, 2016
    Date of Patent: May 15, 2018
    Assignee: MEDIATEK INC.
    Inventors: Chih-Hsiang Hsiao, Chi-Hsuan Lin, Chieh-Lin Chuang
  • Barrier structure for copper interconnect
    Patent number: 9966339
    Abstract: A method for forming an interconnect structure includes forming a dielectric layer overlying a substrate, forming an opening in the dielectric layer, forming a metal-containing layer overlying the opening in the dielectric layer, forming a conformal protective layer overlying the metal-containing layer, filling a conductive layer in the opening, and performing a thermal process to form a metal oxide layer barrier layer underlying the metal-containing layer.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: May 8, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yu-Hung Lin, Ching-Fu Yeh, Yu-Min Chang, You-Hua Chou, Chih-Wei Chang, Sheng-Hsuan Lin
  • Electronic device and method for assembling electronic device
    Patent number: 9952459
    Abstract: An electronic device including a transparent cover, a transparent film, a display module, a side frame, and a base frame is provided. The transparent film is adhered to the transparent cover. The display module is adhered to the transparent film, such that the transparent film is disposed between the transparent cover and the display module. The transparent film extends to the side frame and is bonded with the side frame. The base frame is connected to the side frame. By extending the transparent film to the side frame and bonding the transparent film with the side frame, the transparent film is capable of stopping liquid, thereby archiving a waterproofing effect. A method for assembling an electronic device is also provided.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: April 24, 2018
    Assignee: HTC Corporation
    Inventors: Shih-Po Chien, Chia-Huan Chang, Po-Chin Huang, Yi-Ting Liu, Yu-Jing Liao, I-Hsuan Lin
  • METHOD FOR MANAGING MEMORY AND ASSOCIATED MICROCONTROLLER
    Publication number: 20180107399
    Abstract: A microcontroller includes a processor, a memory, a working space management unit and a memory monitor. The memory has at least a working space, wherein the working space includes a plurality of blocks. The working space management unit is implemented by software, and is arranged for managing the working space of the first memory. The memory monitor is implemented by hardware circuit, and is arranged for monitoring the blocks, and recording monitoring results corresponding to the blocks of the first memory, wherein the recorded monitoring results comprise information about whether data of the blocks is modified or not.
    Type: Application
    Filed: October 16, 2016
    Publication date: April 19, 2018
    Inventors: Chih-Hsiang Hsiao, Chi-Hsuan Lin, Chieh-Lin Chuang
  • Semiconductor memory device and operation method thereof
    Patent number: 9947398
    Abstract: A semiconductor memory device includes: a memory array including a plurality of memory cells, the memory cells being in any of a high resistance state (HRS) and a low resistance state (LRS); a reference array including a plurality of reference cells, the memory cells and the reference cells having the same impedance-temperature relationship, the reference cells being in a middle resistance state between HRS and LRS; an average circuit configured for averaging respective reference currents from the reference cells of the reference array into an average reference current; and a comparator configured for comparing a plurality of respective memory currents from the memory cells of the memory array with the average reference current to obtain a plurality of output data of the memory cells of the memory array and to determine respective impedance states of the memory cells of the memory array.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: April 17, 2018
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Hsuan Lin, Kai-Chieh Hsu, Yu-Yu Lin, Feng-Min Lee
  • INTERFACE CIRCUITS TO MONITOR AND PREVENT OVERSTRESS DAMAGE
    Publication number: 20180102639
    Abstract: An interface circuit of an electronic device includes one or more pins, an internal circuit, an over-voltage protection circuit and a monitoring circuit. The pins are selectively connected to an external circuit. The over-voltage protection circuit is coupled between the internal circuit and at least one pin to prevent the internal circuit from being damaged by a voltage spike or a current surge received at the pin. The monitoring circuit is configured to monitor one or more electrical characteristics of at least one critical component in the internal circuit or the over-voltage protection circuit by monitoring the value of at least one parameter related to the electrical characteristics of the critical component. When the value of the parameter is outside of a safety range, the monitoring circuit outputs a warning signal.
    Type: Application
    Filed: October 2, 2017
    Publication date: April 12, 2018
    Inventors: Shou-En LIU, Hsien-Sheng HUANG, Yu-Hsuan LIN, Ming-Tsung LIN
  • Photosensitive resin composition for color filter and application of the same
    Patent number: 9939568
    Abstract: The present invention relates to a photosensitive resin composition for a color filter and an application of the same. The photosensitive resin composition includes an alkali-soluble resin (A), a compound (B) having an ethylenically unsaturated group, a photoinitiator (C), an organic solvent (D) and a pigment (E). The alkali-soluble resin (A) includes a first alkali-soluble resin (A-1) having the structure represented by formula (1). The aforementioned photosensitive resin composition is advantageously applied for the color filer with better contrast.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: April 10, 2018
    Assignee: Chi Mei Corporation
    Inventors: Jung-Pin Hsu, Bo-Hsuan Lin
  • Voice coil motor
    Patent number: 9939608
    Abstract: This disclosure provides a voice coil motor, including a magnet holder, a magnet set, a lens holder, a lens set, an upper and lower elastic piece and a circuit board. The magnet set has four magnets mounted on four sides of the magnet holder, each of the magnets having opposing N/S and S/N magnetic poles. The lens set is disposed in the lens holder. The upper and lower elastic pieces are mounted above and below the lens holder, respectively. Four focusing coil loops are disposed between the lens holder and magnet set, and correspond to the four magnets of the magnet set. Four optical image stabilization coil loops are disposed on the circuit board and correspond to the four magnets of the magnet set, respectively. The focusing coil loops and optical image stabilization coil loops share the magnet set. Therefore, the voice coil motor has a size reduced.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: April 10, 2018
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wen-Yang Peng, Cheng-Hsuan Lin, Chien-Sheng Liu, Yu-Hau Chang
  • Contact Structure and Method of Forming
    Publication number: 20180076144
    Abstract: Contact structures and methods of forming contacts structures are contemplated by this disclosure. A structure includes a dielectric layer over a substrate, an adhesion layer, a silicide, a barrier layer, and a conductive material. The dielectric layer has an opening to a surface of the substrate. The adhesion layer is along sidewalls of the opening. The silicide is on the surface of the substrate. The barrier layer is on the adhesion layer and the silicide, and the barrier layer directly adjoins the silicide. The conductive material is on the barrier layer in the opening.
    Type: Application
    Filed: November 3, 2017
    Publication date: March 15, 2018
    Inventors: Yu-Hung Lin, Mei-Hui Fu, Sheng-Hsuan Lin
  • QUANTITATIVE DIFFERENTIATION OF INFLAMMATION FROM SOLID TUMORS, HEART AND NERVE INJURY
    Publication number: 20180055408
    Abstract: D-Histo, a non-invasive diagnostic method, renovated from diffusion basis spectrum imaging (DBSI) is provided for quantitatively detecting and distinguishing inflammation from solid tumors, heart and nerve injury. For example, the D-Histo methods disclosed herein provide an accurate diagnosis of prostate cancer, distinguishing it from prostatitis and BPH that missed by currently available methods of diagnosing prostate cancer (multiparameter MRI, needle biopsy). The disclosed D-Histo method also provides metrics to reflect reversible vs. irreversible damages in heart and central/peripheral nerves. For central and peripheral nerves, D-Histo also provides metrics to assess nerve functionality. The at least one D-Histo biomarker obtained using diffusion weighted MRI has excellent test-retest stability, high sensitivity to disease progression and close correlation with currently available techniques.
    Type: Application
    Filed: August 30, 2017
    Publication date: March 1, 2018
    Inventors: Sheng-Kwei Song, Zezhong Ye, William Spees, Tsen-Hsuan Lin