Patents by Inventor Hsuan Lin

Hsuan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170075203
    Abstract: An illumination system includes a light source assembly including a first excitation light source, a second excitation light source, a dichroic element, a wavelength conversion element, a first collimating element and a second collimating element. The first and second excitation light sources provide first and second excitation beams, respectively. The dichroic element is disposed between the first excitation light source and the second excitation light source. The second excitation beam is transmitted toward the first excitation light source through the dichroic element. The wavelength conversion element is disposed between the first excitation light source and the dichroic element. The wavelength conversion element converts the first and second excitation beams into a wavelength conversion beam and transmits it toward the dichroic element.
    Type: Application
    Filed: June 7, 2016
    Publication date: March 16, 2017
    Inventors: Chuan-Te Cheng, Meng-Hsuan Lin
  • Publication number: 20170069965
    Abstract: An antenna structure with reconfigurable patterns includes a grounded plane, at least one active antenna, and at least one current dragger. The active antenna is disposed adjacent to a side of the grounded plane, while the current dragger is disposed adjacent to another side of the grounded plane. The current dragger includes at least one switch. The at least one switch is configured to selectively conduct a current at the grounded plane to the current dragger or electrically insulate a current at the grounded plane from the current dragger.
    Type: Application
    Filed: September 12, 2013
    Publication date: March 9, 2017
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: TA CHUN PU, JUI HUNG CHEN, HUNG HSUAN LIN, CHUN YIH WU
  • Patent number: 9588811
    Abstract: A method for analysis of thread latency includes: determining a thread of interest; computing a summation of time periods in which the thread of interest stays in a run queue to determine a thread in-run-queue time; computing a summation of time periods in which the thread of interest is preempted by other threads to determine a thread preempted time; and evaluating thread latency of the thread of interest according to the thread preempted time to the thread in-run-queue time.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: March 7, 2017
    Assignee: MEDIATEK INC.
    Inventors: Yi-Hsuan Lin, Hsin-Hsien Huang
  • Publication number: 20170064285
    Abstract: A method for creating 3D image is provided. First, capture device, subject to be captured, and lenticular array are provided. Lenticular array comprises strip-shaped lenticular lenses, subject is disposed between capture device and lenticular array, length of a bottom of each lenticular lens is 2 L, and center of the bottom is set as 0. Lens of the capture device is aimed at a top of one of lenticular lenses and ?xL of bottom coordinate of lenticular lens, and the value of x is smaller than 1 but greater than 0. Capture device is turned with top of lenticular lens as center to capture the subject until lens of capture device is aimed at xL of bottom coordinate of lenticular lens. Pixel from ?L to ?xL and from L to xL of bottom coordinate is mapped with pixel from ?xL to 0 and from xL to 0 captured by capture device.
    Type: Application
    Filed: August 31, 2016
    Publication date: March 2, 2017
    Applicant: Theia Limited
    Inventors: Yu-Hsuan Lin, Tang-Hung Po
  • Patent number: 9583536
    Abstract: A memory device having an array area and a periphery area is provided. The memory device includes a substrate, an isolation layer formed in the substrate, a first doped region formed on the isolation layer in the array area, a second doped region formed on the first doped region, a metal silicide layer formed on the second doped region, and a metal silicide oxide layer formed on the metal silicide layer.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: February 28, 2017
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Erh-Kun Lai, Chao-I Wu, Yu-Hsuan Lin, Dai-Ying Lee
  • Publication number: 20170045799
    Abstract: An optical imaging apparatus is provided. The optical imaging apparatus includes at least one imaging source and a light deflecting control device placed on the imaging source, wherein a plurality of light emitted from the imaging source is deflected by the light deflecting control device and concentrates on a plurality of imaging forming points which located in at least one plane so as to form a two-dimensional/three-dimensional (2D/3D) image.
    Type: Application
    Filed: August 13, 2015
    Publication date: February 16, 2017
    Inventor: Yu-Hsuan Lin
  • Publication number: 20170043199
    Abstract: An assembly-type balance training device includes a first block and a second block. The first block has a first front end and a first back end. The first front end has a first front groove and a first front protrusion protrudes outwardly as well as being adjacent to the first front groove in a predetermined distance. The second block has a second front end and second back end. The second back end has a second back groove and a second back protrusion protrudes outwardly as well as being adjacent to the second back groove in a predetermined distance. The first front protrusion of the first block is detachably pressed into the second back groove of the second block; the second back protrusion of the second block is detachably pressed into the first front groove of the first block so that the first block and the second block are assembled.
    Type: Application
    Filed: August 13, 2015
    Publication date: February 16, 2017
    Inventor: Yu Hsuan Lin
  • Patent number: 9570843
    Abstract: A conductive structure, including a holder, a first magnetic element, and a conductive terminal, is provided. The holder has a receiving space. The first magnetic element is disposed in the holder. The conductive terminal is disposed in the receiving space corresponding to the first magnetic element. The conductive terminal is attracted to the first magnetic element and is hidden in the receiving space of the holder. When the conductive terminal is moved close to a conductive contact provided with a second magnetic element, the conductive terminal is attracted to the second magnetic element and moves from the receiving space to be in contact with and electrically connected with the conductive contact. An electronic assembly, including a housing and the conductive structure, is also provided.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: February 14, 2017
    Assignee: HTC Corporation
    Inventors: I-Hsuan Lin, Chih-Kai Hu, Yi-Ting Liu, Yu-Jing Liao
  • Patent number: 9557831
    Abstract: An optical navigation method includes: detecting inertia of an image of a feature point; and determining an effective sensing region of an image sensing array according to the detected inertia for reducing power consumption. Besides, an optical navigation apparatus includes a detecting circuit and a determining unit. The detecting circuit is arranged for detecting a moving inertia of a feature point. The determining circuit is coupled to the detecting circuit, and arranged for determining an effective sensing region of an image sensing array according to the detected moving inertia for reducing power consumption.
    Type: Grant
    Filed: May 8, 2013
    Date of Patent: January 31, 2017
    Assignee: PixArt Imaging Inc.
    Inventors: Ching-Chih Chen, Ming-Tsan Kao, Chih-Yen Wu, Chien-Jung Huang, Yao-Hsuan Lin, Tzu-Yu Chen
  • Publication number: 20170025473
    Abstract: A memory device having an array area and a periphery area is provided. The memory device includes a substrate, an isolation layer formed in the substrate, a first doped region formed on the isolation layer in the array area, a second doped region formed on the first doped region, a metal silicide layer formed on the second doped region, and a metal silicide oxide layer formed on the metal silicide layer.
    Type: Application
    Filed: July 23, 2015
    Publication date: January 26, 2017
    Inventors: Erh-Kun Lai, Chao-I Wu, Yu-Hsuan Lin, Dai-Ying Lee
  • Patent number: 9547363
    Abstract: A power-saving method and associated electronic device are provided. The electronic device is connected with a first external electronic device and a second external electronic device, and a first sensor and a second sensor are deployed on the first external electronic device and the second electronic device, respectively. The electronic device includes: a third sensor, and a processor, wherein the first, second, and third sensors have the same type. The processor gathers information from the first pedometer sensor, the second pedometer sensor, the first external electronic device, and the second external electronic device, and determines whether to turn off at least one of the first, second, and third pedometer sensors according to the information gathered.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: January 17, 2017
    Assignee: MEDIATEK INC.
    Inventors: Chih-Hsiang Hsiao, Chi-Hsuan Lin, Po-Yu Chen
  • Publication number: 20170010498
    Abstract: An electronic device including a transparent cover, a transparent film, a display module, a side frame, and a base frame is provided. The transparent film is adhered to the transparent cover. The display module is adhered to the transparent film, such that the transparent film is disposed between the transparent cover and the display module. The transparent film extends to the side frame and is bonded with the side frame. The base frame is connected to the side frame. By extending the transparent film to the side frame and bonding the transparent film with the side frame, the transparent film is capable of stopping liquid, thereby archiving a waterproofing effect. A method for assembling an electronic device is also provided.
    Type: Application
    Filed: July 9, 2015
    Publication date: January 12, 2017
    Inventors: Shih-Po Chien, Chia-Huan Chang, Po-Chin Huang, Yi-Ting Liu, Yu-Jing Liao, I-Hsuan Lin
  • Publication number: 20170004994
    Abstract: Disclosed herein is a method of forming a metal-to-semiconductor contact with a doped metal oxide interlayer. An insulating layer is formed on a top surface of a semiconductor substrate with target region at the top surface of the semiconductor substrate. An opening is etched through the insulating layer with the opening exposing a top surface of a portion of the target region. A doped metal oxide interlayer is formed in the opening and contacts the top surface of the target region. The remainder of the opening is filled with a metal plug, the doped metal oxide interlayer disposed between the metal plug and the substrate. The doped metal oxide interlayer is formed from one of tin oxide, titanium oxide or zinc oxide and is doped with fluorine.
    Type: Application
    Filed: September 14, 2016
    Publication date: January 5, 2017
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou
  • Patent number: 9530736
    Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a metal plug in a first opening over a substrate, the metal plug is over a silicide layer, and the silicide layer is over a metal oxide layer. The metal oxide layer has an oxygen gradient, such that a percentage of oxygen increases from a top surface of the metal oxide layer to a bottom surface of the metal oxide layer. The metal oxide layer unpins the Fermi level of the interface between the metal plug and the substrate, which is exhibited by a lowered Schottky barrier height (SBH) and increased oxygen vacancy states between the V.B. and the C.B. of the metal oxide layer, which decreases the intrinsic resistivity between the metal plug and the substrate as compared to a semiconductor device that lacks such a metal oxide layer.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: December 27, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou
  • Patent number: 9527962
    Abstract: A series of novel phosphorus-containing compounds having the following formula is provided: in which: R1-R4, A, Q and m are as defined in the specification. A process for the preparation of the compound of formula (I) is also provided. A polymer of formula (PA), and preparation process and use thereof are further provided. A polymer of formula (PI), and preparation process and use thereof are also provided.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: December 27, 2016
    Assignees: Chang Chun Plastics Co., Ltd., National Chung Hsing University
    Inventors: Ching-Hsuan Lin, Tsung Li Lin, Yu-Ting Fang, Kuen-Yuan Hwang, An-Pang Tu
  • Patent number: 9529116
    Abstract: A photosensitive resin composition and application of the same are provided. The photosensitive resin composition comprises an alkali-soluble resin (A), a compound (B) containing vinyl unsaturated group(s), a photo initiator (C), an organic solvent (D), a pigment (E) and a metal chelating agent (F). During a pixel process with an omission of a prebake step, the photosensitive resin composition, which is added with the metal chelating agent (F), can be formed to pixels that is adhered tightly to a substrate.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: December 27, 2016
    Assignee: CHI MEI CORPORATION
    Inventors: Bo-Hsuan Lin, Jung-Pin Hsu, Duan-Chih Wang
  • Publication number: 20160365343
    Abstract: A semiconductor structure and a method for forming the same are provided. The method for manufacturing a semiconductor structure includes forming a gate structure over a substrate and forming a spacer on a sidewall of the gate structure. The method for manufacturing a semiconductor structure further includes forming a hard mask structure on a top surface of the gate structure and on an upper portion of the spacer but not on a bottom portion of the spacer.
    Type: Application
    Filed: June 15, 2015
    Publication date: December 15, 2016
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Yu-Hung LIN, Hon-Lin HUANG, Rueijer LIN, Shih-Chi LIN, Sheng-Hsuan LIN
  • Publication number: 20160364855
    Abstract: A method and system for qualifying a surgical clip applier with surgical clips are proposed. After successive firing operations of the surgical clip applier, an image capture unit captures sampling images associated respectively with angularly equidistant radial recesses in a rotatable clip-receiving disk for receiving anything fired from the surgical clip applier. Upon determining that each sampling image contains an individual target image portion showing a single fired surgical clip, a processing unit verifies the qualification of the surgical clip applier based on a predetermined specification and characteristic parameters obtained respectively from the individual target image portions and associated respectively with the surgical clips, which are received respectively in the radial recesses.
    Type: Application
    Filed: October 12, 2015
    Publication date: December 15, 2016
    Inventors: Han-Chao CHANG, Min-Wei HUNG, Yu-Hsuan LIN, Cheng-Ru LI
  • Patent number: 9521475
    Abstract: An electronic device includes a housing having a top wall, and a microphone module mounted in the housing. The microphone module includes a mounting seat having two oppositely spaced-apart upright suspension surfaces extending transversely from the top wall. A buffer member includes a main body disposed between and spaced apart from the suspension surfaces, and two suspension bumps protruding from the main body toward and abutting respectively and tightly against the suspension surfaces. The main body has an inner portion defining an accommodating space. A microphone body is disposed in the accommodating space.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: December 13, 2016
    Assignee: Wistron Corporation
    Inventors: Cheng-Hsuan Lin, Kai-Hsiang Chang
  • Publication number: 20160352848
    Abstract: A method for evaluating usage of an application by a user includes: obtaining screen information regarding use of the portable device during a predetermined time period; determining a number of times of usage of an application for each day within the predetermined time period; calculating a usage duration for each time of execution of the application; calculating a daily usage duration for each day; selecting at least one usage duration for each day; calculating an evaluation value based on one of the at least one usage duration, the number of times of usage of the application for each day, and the daily usage duration; and generating an evaluation result based on the evaluation value and a preset standard.
    Type: Application
    Filed: May 24, 2016
    Publication date: December 1, 2016
    Inventor: Yu-Hsuan Lin