Patents by Inventor Hsuan Wang
Hsuan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11968838Abstract: A device includes a semiconductor substrate; a word line extending over the semiconductor substrate; a memory film extending along the word line, wherein the memory film contacts the word line; a channel layer extending along the memory film, wherein the memory film is between the channel layer and the word line; source lines extending along the memory film, wherein the memory film is between the source lines and the word line; bit lines extending along the memory film, wherein the memory film is between the bit lines and the word line; and isolation regions, wherein each isolation region is between a source line and a bit line, wherein each of the isolation regions includes an air gap and a seal extending over the air gap.Type: GrantFiled: August 30, 2021Date of Patent: April 23, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sheng-Chen Wang, Kai-Hsuan Lee, Sai-Hooi Yeong, Chi On Chui
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Patent number: 11968830Abstract: Provided is a method of manufacturing a memory device and a patterning method. The patterning method includes following steps. A control structure including stop layers and oxide layers stacked alternately, a hard mask layer, and a mask pattern are sequentially formed on a target layer. A photoresist layer is formed in the mask pattern on the hard mask layer. A portion of the hard mask layer and a portion of the control structure are removed to form first openings by using the photoresist layer and the mask pattern as a mask. The photoresist layer and the hard mask layer are removed to form a second opening having a bottom surface higher than that of the first openings. At least one etching process is performed so that the first and second openings extend into and divide the control structure and the target layer into stack structures.Type: GrantFiled: March 5, 2023Date of Patent: April 23, 2024Assignee: Winbond Electronics Corp.Inventor: Chung-Hsuan Wang
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Patent number: 11967717Abstract: Disclosed is a tungsten-doped lithium manganese iron phosphate-based particulate for a cathode of a lithium-ion battery. The particulates include a composition represented by a formula of LixMn0.998-y-zFeyMzW0.002PaO4a±p/C, wherein x, y, z, a, p, and M are as defined herein. Also disclosed is a powdery material including the particulates, and a method for preparing the powdery material.Type: GrantFiled: July 16, 2021Date of Patent: April 23, 2024Assignee: HCM CO., LTD.Inventors: Chien-Wen Jen, Hsin-Ta Huang, Chih-Tsung Hsu, Yi-Hsuan Wang
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Publication number: 20240129325Abstract: A network intrusion detecting system includes a network card configured to receive network traffic and a processor. The processor is configured to analyze the network traffic and extract traffic characteristics of the network traffic and confirm whether the network traffic is network traffic to be detected based on the traffic characteristics; input the network traffic to be detected into an automatic coding module to obtain a reconstructed sample and calculate a reconstruction error between the network traffic to be detected and the reconstructed sample; input the network traffic to be detected and the reconstructed sample respectively into at least one classification module and calculate a distribution similarity when the reconstruction error is less than a reconstruction error threshold; and input the network traffic to be detected into an intrusion anomaly classification model for network intrusion classification when the distribution similarity is less than a confidence distribution similarity threshold.Type: ApplicationFiled: November 15, 2022Publication date: April 18, 2024Applicant: Industrial Technology Research InstituteInventors: Pei-Hsuan Lu, Pang-Chieh Wang
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Patent number: 11962308Abstract: A successive-approximation register (SAR) analog-to-digital converter (ADC) circuit includes a comparator circuit and a plurality of latch circuits. The comparator circuit is configured to compare an analog signal with a plurality of reference levels. The latch circuits, coupled to the comparator circuit and connected in series, are triggered sequentially in response to a plurality of trigger signals, respectively, to store a comparator output of the comparator circuit and accordingly generate a digital signal. A first latch circuit and a second latch circuit of the latch circuits are triggered in response to a first trigger signal and a second trigger signal of the trigger signals, respectively. The first latch circuit is configured to generate the second trigger signal according to the comparator output stored in the first latch circuit.Type: GrantFiled: June 22, 2023Date of Patent: April 16, 2024Assignee: M31 TECHNOLOGY CORPORATIONInventors: Hui Huan Wang, Meng Hsuan Wu
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Patent number: 11960899Abstract: An information handling system includes multiple dual in-line memory modules (DIMMs) and a basic input/output system (BIOS). The DIMMs form a memory system of the information handling system. The BIOS begins a system boot of the information handling system, and performs a first memory reference code training. Based on the first memory reference code training, the BIOS discovers a bad DIMM of the DIMMs, and stores information associated with the bad DIMM. The BIOS reboots the information handling system. During the reboot, the BIOS retrieves the information associated with the bad DIMM. The BIOS disables a slot associated with the bad DIMM. In response to the slot being disabled, the BIOS performs a second memory reference code training. Based on the second memory reference code training, the BIOS downgrades the memory system to a closest possible DIMM population.Type: GrantFiled: July 21, 2022Date of Patent: April 16, 2024Assignee: Dell Products L.P.Inventors: Ching-Lung Chao, Hsin-Chieh Wang, Wei G. Liu, Yu-Hsuan Chou
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Publication number: 20240119857Abstract: System, methods, and other embodiments described herein relate to training a scene simulator for rendering 2D scenes using data from real and simulated agents. In one embodiment, a method includes acquiring trajectories and three-dimensional (3D) views for multiple agents from observations of real vehicles. The method also includes generating a 3D scene having the multiple agents using the 3D views and information from simulated agents. The method also includes training a scene simulator to render scene projections using the 3D scene. The method also includes outputting a 2D scene having simulated observations for a driving scene using the scene simulator.Type: ApplicationFiled: September 27, 2022Publication date: April 11, 2024Applicants: Toyota Research Institute, Inc., Toyota Jidosha Kabushiki Kaisha, Massachusetts Institute of TechnologyInventors: Tsun-Hsuan Wang, Alexander Amini, Wilko Schwarting, Igor Gilitschenski, Sertac Karaman, Daniela Rus
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Patent number: 11955245Abstract: A method and a system for mental index prediction are provided. The method includes the following steps. A plurality of images of a subject person are obtained. A plurality of emotion tags of the subject person in the images are analyzed. A plurality of integrated emotion tags in a plurality of predetermined time periods are calculated according to the emotion tags respectively corresponding to the images. A plurality of preferred features are determined according to the integrated emotion tags. A mental index prediction model is established according to the preferred features to predict a mental index according to the emotional index prediction model.Type: GrantFiled: July 2, 2021Date of Patent: April 9, 2024Assignees: Acer Incorporated, National Yang Ming Chiao Tung UniversityInventors: Chun-Hsien Li, Szu-Chieh Wang, Andy Ho, Liang-Kung Chen, Jun-Hong Chen, Li-Ning Peng, Tsung-Han Yang, Yun-Hsuan Chan, Tsung-Hsien Tsai
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Patent number: 11955881Abstract: A secondary-side protection and sense circuit for a power converter has a sensing component, an adder amplifying circuit, an electronic switch, and a charge/discharge circuit. The sensing component is connected to an output connecting terminal of the power converter. The adder amplifying circuit has an operational amplifier, a first resistor, and a second resistor. The operational amplifier has an input terminal connected to the sensing component, an output terminal connected to a primary-side control component, and a power terminal. The first resistor and the second resistor are connected in series and between the input terminal and the power terminal of the operational amplifier. The electronic switch is connected between a ground terminal and a connection node between the first resistor and the second resistor. The charge/discharge circuit is connected to the electronic switch and the power terminal of the operational amplifier.Type: GrantFiled: March 10, 2022Date of Patent: April 9, 2024Assignee: MINMAX TECHNOLOGY CO., LTDInventors: Ching-Hung Wang, Yu-Hsuan Chen
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Publication number: 20240113034Abstract: A method for forming a semiconductor package is provided. The method includes forming a first alignment mark in a first substrate of a first wafer and forming a first bonding structure over the first substrate. The method also includes forming a second bonding structure over a second substrate of a second wafer and trimming the second substrate, so that a first width of the first substrate is greater than a second width of the second substrate. The method further includes attaching the second wafer to the first wafer via the first bonding structure and the second bonding structure, thinning the second wafer until a through-substrate via in the second substrate is exposed, and performing a photolithography process on the second wafer using the first alignment mark.Type: ApplicationFiled: February 8, 2023Publication date: April 4, 2024Inventors: Yu-Hung LIN, Wei-Ming WANG, Chih-Hao YU, PaoTai HUANG, Pei-Hsuan LO, Shih-Peng TAI
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Publication number: 20240103350Abstract: A light source assembly includes a first annular reflector, a second annular reflector and a plurality of first light source modules. The first annular reflector has a first reflective surface. The second annular reflector is coaxial with the first annular reflector. A radius of the first annular reflector is greater than that of the second annular reflector. The second annular reflector has a second reflective surface facing the first reflective surface. The first light source modules take a central axis of the first annular reflector as a center and annularly arranged around the center. The first light source modules provide first beams to the first reflective surface, which reflects the first beams to the second reflective surface. The second reflective surface reflects the first beams and makes the first beams emit along a direction parallel to a central axis of the second annular reflector. A projection device is also provided.Type: ApplicationFiled: September 25, 2023Publication date: March 28, 2024Inventors: KAI-JIUN WANG, CHANG-HSUAN CHEN, KUAN-LUN CHEN, SHANG-WEI CHEN
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Publication number: 20240096718Abstract: A testkey structure includes a substrate, a control gate, a metal gate, a dielectric structure, a source line, and a drain line. The control gate is disposed over the substrate and includes a first region and a second region. The second region is adjacent to the first region. The first region has a first conductivity type, and the second region has a second conductivity type. The second conductivity type is different from the first conductivity type. The metal gate is disposed over the control gate. The dielectric structure is embedded in the metal gate and divides the metal gate into a first part and a second part. The dielectric structure is adjacent to the junction between the first region and the second region. The dielectric structure is in contact with the control gate. The source line and the drain line are disposed on opposite sides of the control gate.Type: ApplicationFiled: September 15, 2022Publication date: March 21, 2024Inventor: Chung-Hsuan WANG
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Publication number: 20240098959Abstract: A method includes etching a first semiconductor fin and a second semiconductor fin to form first recesses. The first and the second semiconductor fins have a first distance. A third semiconductor fin and a fourth semiconductor fin are etched to form second recesses. The third and the fourth semiconductor fins have a second distance equal to or smaller than the first distance. An epitaxy is performed to simultaneously grow first epitaxy semiconductor regions from the first recesses and second epitaxy semiconductor regions from the second recesses. The first epitaxy semiconductor regions are merged with each other, and the second epitaxy semiconductor regions are separated from each other.Type: ApplicationFiled: November 22, 2023Publication date: March 21, 2024Inventors: Kai-Hsuan Lee, Chia-Ta Yu, Cheng-Yu Yang, Sheng-Chen Wang, Sai-Hooi Yeong, Feng-Cheng Yang, Yen-Ming Chen
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Patent number: 11937366Abstract: A method of a circuit signal enhancement of a circuit board comprises the following steps: forming a first substrate body with a first signal transmission circuit layer and a second substrate body with a second signal transmission circuit layer; forming a first signal enhancement circuit layer and a second signal enhancement circuit layer on the first substrate body and the second substrate body; forming a third substrate body with a third signal transmission circuit layer and a fourth substrate body with a fourth signal transmission circuit layer on the carrier; separating the third substrate body and the fourth substrate body from the carrier; combining the first signal transmission circuit layer and the third signal transmission circuit layer through the first signal enhancement circuit layer; and combining the second signal transmission circuit layer and the fourth signal transmission circuit layer through the second signal enhancement circuit layer.Type: GrantFiled: March 23, 2022Date of Patent: March 19, 2024Assignee: UNIMICRON TECHNOLOGY CORP.Inventors: Tzu Hsuan Wang, Yu Cheng Lin
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Publication number: 20240085664Abstract: An imaging system lens assembly includes, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof. The second lens element with positive refractive power has an image-side surface being convex in a paraxial region thereof. The third lens element has an object-side surface being concave in a paraxial region thereof and an image-side surface being convex in a paraxial region thereof. The fifth lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof and having at least one inflection point.Type: ApplicationFiled: October 5, 2022Publication date: March 14, 2024Applicant: LARGAN PRECISION CO., LTD.Inventors: Wei-Xiang FU, Jin Sen WANG, I-Hsuan CHEN, Hsin-Hsuan HUANG
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Publication number: 20240086633Abstract: A method for generating and outputting a message is implemented using an electronic device the stores a computer program product and a text database. The text database includes a main message template, a template text that includes a placeholder, and a word group that includes a plurality of preset words for replacing the placeholder. The method includes: in response to receipt of a command for execution of the computer program product, displaying an editing interface including the main message template; in response to receipt of user operation of a selection of the main message template, displaying the template text; in response to receipt of user operation of a selection of one of the preset words via the user interface, generating an edited text by replacing the placeholder with the one of the preset words in the template text; and outputting the edited text as a message.Type: ApplicationFiled: April 25, 2023Publication date: March 14, 2024Inventors: Yi-Ru CHIU, Ting-Yi LI, Hong-Xun WANG, Jin-Lin CHEN, Chih-Hsuan YEH, Chia-Chi YIN, Wei-Ting LI, Po-Lun CHANG
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Patent number: 11925457Abstract: A device for encouraging and guiding a spirometer user includes a housing, a main valve, a visual assembly, and a sound making assembly. The housing has a guiding channel, a first outlet channel, a second outlet channel, and an inlet channel. The main valve is disposed in a housing communicating with the guiding channel, the first outlet channel, the second outlet channel or the inlet channel and configured to regulate or control fluid flowing paths. The visual assembly includes a check valve in the second outlet channel, and at least one movable member. The sound making assembly includes a check valve and a sound maker. So, it can generate the visual and sound encouraging effects for learning how to use a spirometer correctly.Type: GrantFiled: February 17, 2021Date of Patent: March 12, 2024Assignees: TAICHUNG VETERANS GENERAL HOSPITAL, CENTRAL TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Ming-Feng Wu, Yu-Hsuan Chen, Kuo-Chih Su, Chun-Hsiang Wang
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Patent number: 11921474Abstract: A virtual metrology method using a convolutional neural network (CNN) is provided. In this method, a dynamic time warping (DTW) algorithm is used to delete unsimilar sets of process data, and adjust the sets of process data to be of the same length, thereby enabling the CNN to be used for virtual metrology. A virtual metrology model of the embodiments of the present invention includes several CNN models and a conjecture model, in which plural inputs of the CNN model are sets of time sequence data of respective parameters, and plural outputs of the CNN models are inputs to the conjecture model.Type: GrantFiled: May 25, 2021Date of Patent: March 5, 2024Assignee: NATIONAL CHENG KUNG UNIVERSITYInventors: Fan-Tien Cheng, Yu-Ming Hsieh, Tan-Ju Wang, Li-Hsuan Peng, Chin-Yi Lin
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Patent number: 11920055Abstract: A process for producing a barrier composition includes subjecting a siloxane compound having 1 to 3 amino groups and an aqueous solution including water and an alcohol to hydrolysis and first-stage condensation under required conditions, subjecting a first colloidal mixture obtained and an additional alcohol to second-stage condensation, subjecting a second colloidal mixture obtained, which has a particular solid content, to heating under required conditions, and subjecting a cured product obtained to aging under required conditions. A barrier composition produced by the process is also disclosed.Type: GrantFiled: October 26, 2021Date of Patent: March 5, 2024Assignee: NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGYInventors: Chung-Kuang Yang, Yi-Hsuan Lai, Sheng-Tung Huang, Kun-Li Wang
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Publication number: 20240072210Abstract: A micro light emitting diode structure including an epitaxial structure, a first insulating layer and a second insulating layer is provided. The epitaxial structure includes a first type semiconductor layer, a light emitting layer and a second type semiconductor layer. The first type semiconductor layer, the light emitting layer and a first portion of the second type semiconductor layer form a mesa. A second portion of the second type semiconductor layer is recessed relative the mesa to form a mesa surface. The first insulating layer covers from a top surface of the mesa to the mesa surface along a first side surface of the mesa, and exposes the second side surface. The second insulating layer directly covers a second side surface of the second portion, wherein a thickness ratio of the first insulating layer to the second insulating layer is between 10 and 50.Type: ApplicationFiled: October 21, 2022Publication date: February 29, 2024Applicant: PlayNitride Display Co., Ltd.Inventors: Chee-Yun Low, Yun-Syuan Chou, Hung-Hsuan Wang, Pai-Yang Tsai, Fei-Hong Chen, Tzu-Yang Lin