Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.

Abstract: An antenna module includes a first metal plate and a frame body. The frame body surrounds the first metal plate. The frame body includes a first antenna radiator, a second antenna radiator, a third antenna radiator, a first breakpoint and a second breakpoint. The first antenna radiator includes a first feeding end and excites a first frequency band. The second antenna radiator includes a second feeding end and excites a second frequency band. The third antenna radiator includes a third feeding end and excites a third frequency band. The first breakpoint is located between the first antenna radiator and the second antenna radiator. The second breakpoint is located between the second antenna radiator and the third antenna radiator. An electronic device including the above-mentioned antenna module is also provided.

Abstract: A semiconductor chip includes a first intellectual property block. There are a second intellectual property block and a third intellectual property block around the first intellectual property block. There is a multiple metal layer stack over the first intellectual property block, the second intellectual property block, and the third intellectual property block. An interconnect structure is situated in the upper portion of the multiple metal layer stack. The interconnect structure is configured for connecting the first intellectual property block and the second intellectual property block. In addition, at least a part of the interconnect structure extends across and over the third intellectual property block.

Abstract: A battery protection charging method and a charging system thereof are provided. The battery protection charging method includes obtaining an operation parameter of a battery. When a first protection condition is satisfied, a charging voltage of the battery is reduced to a first voltage. When a second protection condition is satisfied, the charging voltage of the battery is reduced to a second voltage. The second voltage is lower than the first voltage. The first (second) protection condition includes the cycle-life count is higher than a first (second) cycle-life threshold, the high voltage cumulative time is higher than a first (second) high voltage time threshold, and the high voltage-temperature cumulative time is higher than a first (second) high voltage-temperature time threshold.

Abstract: A connector assembly includes a shielding cage, a partitioning assembly and a plurality of supporting members. The shielding cage has a plurality of walls and an internal space defined by the plurality of walls, the plurality of walls includes two side walls. The partitioning assembly is assembled to the two side walls of the shielding cage and partitions the internal space into two inserting chambers arranged up and down, the partitioning assembly includes two partitioning plates which are arranged up and down and two grounding elastic pieces which are respectively assembled to front ends of the two partitioning plates, the two partitioning plates are spaced apart from with each other by a preset interval to together constitute an air flow passageway and a front end opening positioned to a front end of the air flow passageway. The plurality of supporting members are supported between the two partitioning plates.

Abstract: A method of reducing gray energy consumption and achieving optimal gray energy saving for carbon neutralization is proposed. In a cellular network, each cell or BS (group of cells) has renewable (green) and non-renewable (gray, on-grid power) energy sources. The renewable (green) energy is highly variable and unpredictable, while non-renewable (gray, on-grid power) is stable but is not renewable and thus has more carbon impact. Each cell or BS (group of cells) services is associated UEs when it is on. In one novel aspect, a cell or BS (group of cells) that consumes more non-renewable energy can give some or all of its served UEs to another cell or BS (group of cells) that consumes less non-renewable energy.

Abstract: An apparatus is provided. The apparatus includes a laser generation device configured to emit a laser signal to a semiconductor fabrication component. The apparatus includes a reflection detection device configured to receive a reflection signal comprising light, of the laser signal, reflected by a surface of the semiconductor fabrication component. The reflection detection device includes an optical filter. The optical filter is configured to block light, of the reflection signal, that has a wavelength outside a defined range of wavelengths. The optical filter is configured to provide filtered light, from the reflection signal, that has a wavelength within the defined range of wavelengths. The reflection detection device includes a light sensor configured to generate an electrical signal based upon the filtered light. The apparatus includes a computer configured to determine, based upon the electrical signal, measures of electrostatic field strength at the surface of the semiconductor fabrication component.

Abstract: A method and a system for mental index prediction are provided. The method includes the following steps. A plurality of images of a subject person are obtained. A plurality of emotion tags of the subject person in the images are analyzed. A plurality of integrated emotion tags in a plurality of predetermined time periods are calculated according to the emotion tags respectively corresponding to the images. A plurality of preferred features are determined according to the integrated emotion tags. A mental index prediction model is established according to the preferred features to predict a mental index according to the emotional index prediction model.

Abstract: An image capturing lens system includes, in order from an object side to an image side, a first lens element with positive refractive power having an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof, a second lens element with negative refractive power having an object-side surface being concave in a paraxial region thereof and an image-side surface being convex in a paraxial region thereof, a third lens element with positive refractive power having an object-side surface being concave in a paraxial region thereof and an image-side surface being convex in a paraxial region thereof, and a fourth lens element with negative refractive power having an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof.

Abstract: Methods of cutting gate structures, and structures formed, are described. In an embodiment, a structure includes first and second gate structures over an active area, and a gate cut-fill structure. The first and second gate structures extend parallel. The active area includes a source/drain region disposed laterally between the first and second gate structures. The gate cut-fill structure has first and second primary portions and an intermediate portion. The first and second primary portions abut the first and second gate structures, respectively. The intermediate portion extends laterally between the first and second primary portions. First and second widths of the first and second primary portions along longitudinal midlines of the first and second gate structures, respectively, are each greater than a third width of the intermediate portion midway between the first and second gate structures and parallel to the longitudinal midline of the first gate structure.

Abstract: A coherent Raman spectro-microscopy system is configured for generating a spectro-microscopic image of a sample and includes a light source, a supercontinuum spectrum generator, a color filter assembly, and a spectro-microscopic assembly. The light source is for emitting at least one pulsed laser beam. The supercontinuum spectrum generator is for broadening the bandwidth of at least one pulsed laser beam. The color filter assembly is for filtering the bandwidth of at least one pulsed laser beam according to a predetermined bandwidth and converting at least one pulsed laser beam into a coherent spectro-microscopic laser beam. The sample is disposed in the spectro-microscopic assembly, and the spectro-microscopic assembly receives the coherent spectro-microscopic laser beam so that the coherent spectro-microscopic laser beam passes through the sample to generate the spectro-microscopic image of the sample.

Abstract: A method of fabricating a device includes providing a fin element in a device region and forming a dummy gate over the fin element. In some embodiments, the method further includes forming a source/drain feature within a source/drain region adjacent to the dummy gate. In some cases, the source/drain feature includes a bottom region and a top region contacting the bottom region at an interface interposing the top and bottom regions. In some embodiments, the method further includes performing a plurality of dopant implants into the source/drain feature. In some examples, the plurality of dopant implants includes implantation of a first dopant within the bottom region and implantation of a second dopant within the top region. In some embodiments, the first dopant has a first graded doping profile within the bottom region, and the second dopant has a second graded doping profile within the top region.

Abstract: A computer implemented method for managing the scope of permissions granted by users to application that includes collecting a set of permissions for an application from an application provider publication; and collecting a process flow for functional steps of the application from a review of the application that is published on a product review type publication. The computer implemented method further includes dividing the functional steps of the application into a plurality of journeys, each of said plurality of journeys having a function associated with a stage of a functional step from a perspective of a user; and matching permissions from the set of permissions for each journey of said plurality of journeys to provide matched permissible permissions to journeys stored in a customer journey store.

Abstract: A method includes fabricating a semiconductor device, wherein the method includes depositing a coating layer on a first region and a second region under a loading condition such that a height of the coating layer in the first region is greater than a height of the coating layer in the second region. The method also includes applying processing gas to the coating layer to remove an upper portion of the coating layer such that a height of the coating layer in the first region is a same as a height of the coating layer in the second region.

Abstract: A method includes etching a first semiconductor fin and a second semiconductor fin to form first recesses. The first and the second semiconductor fins have a first distance. A third semiconductor fin and a fourth semiconductor fin are etched to form second recesses. The third and the fourth semiconductor fins have a second distance equal to or smaller than the first distance. An epitaxy is performed to simultaneously grow first epitaxy semiconductor regions from the first recesses and second epitaxy semiconductor regions from the second recesses. The first epitaxy semiconductor regions are merged with each other, and the second epitaxy semiconductor regions are separated from each other.

Abstract: A machine learning method includes: distinguishing foregrounds and backgrounds of a first image to generate a first mask image; cropping the first image to generate second and third images; cropping the first mask image to generate second and third mask images, wherein a position of the second mask image and a position of the third mask image correspond to a position of the second image and a position of the third image, respectively; generating a first feature vector group of the second image and a second feature vector group of the third image by a model; generating a first matrix according to the first and second feature vector groups; generating a second matrix according to the second and third mask images; generating a function according to the first and second matrices; and adjusting the model according to the function.

Abstract: A conversion control circuit is configured to generate a PWM (pulse width modulation) signal to control a power switch for switching an inductor to convert an input voltage to an output voltage. The steps of generating the PWM signal includes: enabling the PWM signal at a rising edge of a clock signal to turn on the power switch; disabling the PWM signal to turn off the power switch when an on-time exceeds a predetermined minimum on-time and the output voltage has reached an output level; triggering a next rising edge of the clock signal when the off-time exceeds a predetermined minimum off-time, the output voltage has not reached the output level, and a present cycle period of the clock signal has reached a predetermined cycle period.

Abstract: A semiconductor device may include a substrate and spaced apart first and second doped regions in the substrate. The first doped region may be larger than the second doped region to define an asymmetric channel therebetween. The semiconductor device may further include a superlattice extending between the first and second doped regions to constrain dopant therein. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. A gate may overly the asymmetric channel.

Abstract: A system and method are disclosed for ignoring a wakeword received at a speech-enabled listening device when it is determined the wakeword is reproduced audio from an audio-playing device. Determination can be by detecting audio distortions, by an ignore flag sent locally between an audio-playing device and speech-enabled device, by and ignore flag sent from a server, by comparison of received audio played audio to a wakeword within an audio-playing device or a speech-enabled device, and other means.

Abstract: A process for producing a barrier composition includes subjecting a siloxane compound having 1 to 3 amino groups and an aqueous solution including water and an alcohol to hydrolysis and first-stage condensation under required conditions, subjecting a first colloidal mixture obtained and an additional alcohol to second-stage condensation, subjecting a second colloidal mixture obtained, which has a particular solid content, to heating under required conditions, and subjecting a cured product obtained to aging under required conditions. A barrier composition produced by the process is also disclosed.