Patents by Inventor Hsuan Yang

Hsuan Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250120967
    Abstract: The present disclosure generally relates to novel multiple target inhibitor of tyrosine kinases (TKs) which can suppress angiogenesis, metastasis, oncogenesis, and/or immune regulation activities by inhibiting TKs and have very potent immunomodulatory activity. The present disclosure also relates to a method of using the tyrosine kinase inhibitors, alone or in combination with HDAC inhibitor, for the treatment of cancers, in particular in cancer immunotherapy, by regulating the tumor microenvironment, including reducing tumor hypoxia, reducing lactic acid accumulation, activating CTL, inhibiting the number and activity of immunosuppressive cells, finally obtaining superior anti-cancer benefits and/or producing lasting immune memory.
    Type: Application
    Filed: October 15, 2024
    Publication date: April 17, 2025
    Inventors: Jia-Shiong CHEN, Mu-Hsuan YANG, Cheng-Han CHOU, Yi-Hong WU, Sz-Hao CHU, Ye-Su CHAO, Chia-Nan CHEN
  • Patent number: 12277227
    Abstract: A BIOS module provisioning sequence verification system includes a BIOS subsystem coupled to a TPM and a BIOS storage system including a plurality of firmware volumes. The BIOS subsystem provides a plurality of BIOS modules in a BIOS module provisioning sequence using the plurality of firmware volumes and, for each of the plurality of BIOS modules when that BIOS module is provided during the BIOS module provisioning sequence: retrieves a BIOS module identifier associated with that BIOS module, and updates BIOS module provisioning sequence information using that BIOS module identifier. Following the provisioning of the BIOS modules in the BIOS module provisioning sequence, the BIOS subsystem provides the BIOS module provisioning sequence information to the TPM, with the BIOS module provisioning sequence information configured to be compared to BIOS module provisioning sequence verification information to verify the BIOS module provisioning sequence.
    Type: Grant
    Filed: April 6, 2023
    Date of Patent: April 15, 2025
    Assignee: Dell Products L.P.
    Inventors: Po-Yu Cheng, Wei Liu, Yu Hsuan Yang, Yu Cheng Sheng
  • Publication number: 20250107139
    Abstract: A semiconductor device may include a substrate and spaced apart first and second doped regions in the substrate. The first doped region may be larger than the second doped region to define an asymmetric channel therebetween. The semiconductor device may further include a superlattice extending between the first and second doped regions to constrain dopant therein. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. A gate may overly the asymmetric channel.
    Type: Application
    Filed: December 10, 2024
    Publication date: March 27, 2025
    Inventors: HIDEKI TAKEUCHI, RICHARD BURTON, YUNG-HSUAN YANG
  • Patent number: 12258048
    Abstract: This application is directed to predicting vehicle actions according to a hierarchy of interconnected vehicle actions. The hierarchy of interconnected vehicle actions includes a plurality of predefined vehicle actions that are organized to define a plurality of vehicle action sequences. A first vehicle obtains one or more images of a road and a second vehicle, and predicts a sequence of vehicle actions of the second vehicle through the hierarchy of interconnected vehicle actions using the one or more images. The first vehicle is controlled to drive at least partially autonomously based on the predicted sequence of vehicle actions of the second vehicle. In some embodiments, the hierarchy of interconnected vehicle actions includes a first action level that is defined according to a stage of a trip and corresponds to three predefined vehicle actions of: “start a trip,” “move in a trip,” and “complete a trip.
    Type: Grant
    Filed: May 25, 2023
    Date of Patent: March 25, 2025
    Assignee: PlusAI, Inc.
    Inventors: I-Hsuan Yang, Yu Wang
  • Patent number: 12249910
    Abstract: A switching power converter includes: a power stage circuit, including at least one transistor which is configured to operably switch an inductor to convert an input power to an output power; and an active EMI filter circuit, including at least one amplifier, wherein the at least one amplifier is configured to operably sense a noise input signal which is related to a switching noise caused by the switching of the power stage circuit, and amplify the noise input signal to generate a noise cancelling signal, wherein the noise cancelling signal is injected into an input node of the switching power converter, so as to suppress the switching noise and thus reducing EMI, wherein the input power is provided through the input node to the power stage circuit.
    Type: Grant
    Filed: June 7, 2024
    Date of Patent: March 11, 2025
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Chen-Pin Huang, Chia-Chun Li, Chen-Lin Hsu, Hung-Yu Cheng, Wan-Hsuan Yang
  • Publication number: 20250074776
    Abstract: The present invention provides a method for preparing an activated carbon, which includes impregnating a carbonaceous material with carbonated water; and exposing the carbonaceous material to microwave radiation to produce the activated carbon.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 6, 2025
    Inventors: Feng-Huei LIN, Chih-Chieh CHEN, Chih-Wei LIN, Chi-Hsien CHEN, Yue-Liang GUO, Ching-Yun CHEN, Chia-Ting CHANG, Che-Yung KUAN, Zhi-Yu CHEN, I-Hsuan YANG
  • Patent number: 12223300
    Abstract: A method of compiling a deep learning model includes reading metadata from a compiled result, the metadata indicating a structure of the deep learning model corresponding to a low-level IR, receiving shape information of an input tensor of the deep learning model, determining a shape of an output tensor of a first computation operation of the computation operations based on the shape information of the input tensor of the deep learning model and the structure of the deep learning model, tiling the output tensor of the first computation operation into one or more tiles according to the shape of the output tensor of the first computation operation and hardware limitations of a processor executing the deep learning model, and patching one or more copies of a templated hardware command into executable hardware commands.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: February 11, 2025
    Assignee: MEDIATEK INC.
    Inventors: Meng-Hsuan Yang, Po-hua Huang, Hsing-Chang Chou, Ting Chen Tsan, Yu-Lung Lu
  • Patent number: 12220022
    Abstract: A hard-shell boot comprises a boot liner and an outer shell having an accommodation space for accommodating and positioning the boot liner. Two sides of a top portion of the outer shell respectively have a first flank portion vertically penetrated by a first-through-hole and a second flank portion vertically penetrated by a second-through-hole. A connecting member comprises an inner-blocking-piece located in an inner side of the top portion of the outer shell and an outer-blocking-piece. One end and the other end of the inner-blocking-piece respectively have a first-engaging-portion connected to one end of the outer-blocking-piece by passing upward through the first-through-hole and a second-engaging-portion connected to the other end of the outer-blocking-piece by passing upward through the second-through-hole. Thus, the width and size of the hard-shell boot can be adjusted simultaneously to facilitate the use of users with different foot widths and sizes.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: February 11, 2025
    Assignee: SOLEX (XIAMEN) INTERNATIONAL TRADE CO., LTD.
    Inventor: Tze-Hsuan Yang
  • Publication number: 20250048765
    Abstract: A display panel including a circuit substrate, a plurality of light-emitting elements, a plurality of microlenses, and a plurality of dummy microlenses is provided. The circuit substrate is provided with a plurality of pixel areas. Each of the pixel areas is provided with the light-emitting elements. The plurality of microlenses are disposed on the circuit substrate and respectively overlapped with the light-emitting elements. The plurality of dummy microlenses are disposed between the microlenses and not overlapped with the light-emitting elements.
    Type: Application
    Filed: December 12, 2023
    Publication date: February 6, 2025
    Applicant: AUO Corporation
    Inventors: Shih-Hua Lu, Tzu-Hsuan Yang, Chao-Chien Chiu
  • Patent number: 12213971
    Abstract: The present disclosure generally relates to compounds class I HDAC inhibitors, their production and applications. The compounds possess epigenetic immunomodulatory activities in the tumor microenvironment (TME) and thus inhibit growth of tumor cells.
    Type: Grant
    Filed: May 1, 2023
    Date of Patent: February 4, 2025
    Assignee: GREAT NOVEL THERAPEUTICS BIOTECH & MEDICALS CORPORATION
    Inventors: Jia-Shiong Chen, Mu-Hsuan Yang, Yi-Hong Wu, Sz-Hao Chu, Cheng-Han Chou, Ye-Su Chao, Chia-Nan Chen
  • Patent number: 12216494
    Abstract: A portable electronic device including a first body, a second body, a stand, and a hinge structure is provided. The stand has a first pivot part and a second pivot part opposite to the first pivot part, wherein the first pivot part is pivotally connected to the first body, and the second body is pivotally connected to the second pivot part. The hinge structure includes a first bracket secured to the second body, a second bracket secured to the second pivot part of the stand, a first movable base, a first shaft secured to the first bracket and pivoted to the first movable base, a second movable base, a second shaft secured to the first movable base and pivoted to the second movable base, and a sliding shaft fixed to the second movable base and slidably connected to the second bracket.
    Type: Grant
    Filed: November 3, 2023
    Date of Patent: February 4, 2025
    Assignee: Acer Incorporated
    Inventors: Chia-Bo Chen, Yi-Hsuan Yang, Hung-Chi Chen, Wu-Chen Lee
  • Patent number: 12213561
    Abstract: A hard-shell boot comprises a boot-liner and an outer-shell having an accommodation-space for accommodating and positioning the boot-liner, the boot-liner has a sole which comprises a first-elastic-sheet and a rear-bottom-sheet on the same level, the rear-bottom-sheet is jointed to a rear side of the first-elastic-sheet; an outer periphery of the sole is extended upward to form an upright-portion which comprises a second-elastic-sheet and a rear-upright-sheet, two ends of a rear side of the second-elastic-sheet are jointed to two ends of a front side of the rear-upright-sheet respectively, an outer periphery of a top portion of the upright-portion is extended upward to form a sleeve-portion, a front end of the sleeve-portion has a third-elastic-sheet; thus, it is capable of being adjusted according to the width and size of the user's foot simultaneously, so as to facilitate the use of users with different foot lengths and sizes.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: February 4, 2025
    Assignee: SOLEX (XIAMEN) INTERNATIONAL TRADE CO., LTD.
    Inventor: Tze-Hsuan Yang
  • Publication number: 20250028560
    Abstract: The disclosure provides an approach for automatically scheduling resource-aware software-defined data center (SDDC) upgrades. Embodiments include receiving, via a user interface (UI), user input indicating one or more constraints related to automatically scheduling a plurality of upgrade phases for upgrading components of a plurality of computing devices across a plurality of SDDCs. Embodiments include receiving, via the UI, a user selection of a first UI control that, when selected, initiates an automatic assignment of the plurality of upgrade phases to particular time slots based on the one or more constraints. Embodiments include displaying, via the UI, a depiction of a schedule for the plurality of upgrade phases based on the automatic assignment. Embodiments include displaying, via the UI, a second UI control that, when selected, causes the automatic assignment to be finalized and a third UI control that, when selected, initiates a new automatic assignment.
    Type: Application
    Filed: July 19, 2023
    Publication date: January 23, 2025
    Inventors: Marc UMENO, Deepa RAO, Vijayakumar KAMABATHULA, Hsuan YANG, Ruman HASSAN, Vaibhav KOHLI
  • Patent number: 12199180
    Abstract: A semiconductor device may include a substrate and spaced apart first and second doped regions in the substrate. The first doped region may be larger than the second doped region to define an asymmetric channel therebetween. The semiconductor device may further include a superlattice extending between the first and second doped regions to constrain dopant therein. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. A gate may overly the asymmetric channel.
    Type: Grant
    Filed: November 21, 2023
    Date of Patent: January 14, 2025
    Assignee: ATOMERA INCORPORATED
    Inventors: Hideki Takeuchi, Richard Burton, Yung-Hsuan Yang
  • Patent number: 12193846
    Abstract: An ambient light cancellation circuit functions as a Kth-order filter to filter out an ambient light signal of the detection signal, wherein the K is not fewer than two. The circuit includes a capacitive transimpedance amplifying circuit including an amplifier, a capacitor circuit, and a switch circuit. The capacitor circuit includes one or more capacitive paths coupled in parallel. The switch circuit couples the amplifier with the capacitor circuit in a non-cross manner or a cross manner. The non-cross manner is applied N times to let the capacitor circuit sample the detection signal N times while the detection signal includes a controllable-light signal and the ambient light signal; and the cross manner is applied M times to let the capacitor circuit sample the inversion of the detection signal M times while the detection signal includes the ambient light signal without the controllable-light signal, wherein (N+M) equals (K+1).
    Type: Grant
    Filed: May 12, 2023
    Date of Patent: January 14, 2025
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Tzu-Hsuan Yang, Ming-Chih Kuan
  • Publication number: 20250006875
    Abstract: The present disclosure provides a light emitting diode structure. The light emitting diode structure includes a substrate, a first light emitting structure on the substrate, a second light emitting structure on the substrate, and a third light emitting structure on the substrate. The first light emitting structure includes a first light emitting diode and a first focusing optic on the first light emitting diode. The second light emitting structure includes a second light emitting diode and a second focusing optic on the second light emitting diode. The third light emitting structure includes a third light emitting diode and a third focusing optic on the third light emitting diode. The first light emitting structure, the second light emitting structure and the third light emitting structure are arranged along a first direction and are dislocated in a second direction perpendicular to the first direction.
    Type: Application
    Filed: December 18, 2023
    Publication date: January 2, 2025
    Inventors: Yang-En WU, Tzu-Hsuan Yang, Chun-Hung Kuo, Chao-Chien Chiu, Teng-Wei Huang
  • Publication number: 20240412458
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for editing images based on decoder-based accumulative score sampling (DASS) losses.
    Type: Application
    Filed: June 12, 2024
    Publication date: December 12, 2024
    Inventors: Varun Jampani, Chun-Han Yao, Amit Raj, Wei-Chih Hung, Ming-Hsuan Yang, Michael Rubinstein, Yuanzhen Li
  • Publication number: 20240402765
    Abstract: A laptop computer with a detachable touchpad module includes a housing, a locking hook, and a touchpad module. The housing has a first surface and a second surface opposite to each other. The first surface is an external surface of the housing, and the second surface is an internal surface of the housing. The locking hook is freely pivoted to the housing and located at the second surface. The touchpad module has a locking hole. When the touchpad module is assembled to the first surface, the locking hole penetrates the housing and is protruded out of the second surface, and the locking hook is locked with the locking hole.
    Type: Application
    Filed: January 4, 2024
    Publication date: December 5, 2024
    Applicant: Acer Incorporated
    Inventors: Yi-Hsuan Yang, Cheng-Mao Chang, Pao-Min Huang, Chi-Hung Lai
  • Publication number: 20240361999
    Abstract: A method of compiling a deep learning model includes reading metadata from a compiled result, the metadata indicating a structure of the deep learning model corresponding to a low-level IR, receiving shape information of an input tensor of the deep learning model, determining a shape of an output tensor of a first computation operation of the computation operations based on the shape information of the input tensor of the deep learning model and the structure of the deep learning model, tiling the output tensor of the first computation operation into one or more tiles according to the shape of the output tensor of the first computation operation and hardware limitations of a processor executing the deep learning model, and patching one or more copies of a templated hardware command into executable hardware commands.
    Type: Application
    Filed: April 28, 2023
    Publication date: October 31, 2024
    Applicant: MEDIATEK INC.
    Inventors: Meng-Hsuan YANG, Po-hua HUANG, Hsing-Chang CHOU, Ting Chen TSAN, Yu-Lung LU
  • Publication number: 20240350029
    Abstract: A non-invasive carbon dioxide sensor includes a conductive substrate, a electrical transmission layer, and a gas sensing layer. The conductive substrate includes a base and at least two electrode disposed on the base and spaced apart from each other. The electrical transmission layer is disposed on the conductive substrate, and includes a plurality of carbon nanotubes crossing one another and a plurality of metal oxide nanorods attached to the carbon nanotubes. The carbon nanotubes and the metal oxide nanorods together form a composite material having a hierarchical three-dimensional structure. The gas sensing layer is disposed on the electrical transmission layer and includes a polymer material that contains at least one amino functional group capable of reacting with carbon dioxide. A method for manufacturing a non-invasive carbon dioxide sensor is also provided.
    Type: Application
    Filed: April 19, 2024
    Publication date: October 24, 2024
    Inventors: Nyan-Hwa TAI, Ya-Hsuan YANG, Ching CHANG, Chi-Young LEE, Diahn-Warng PERNG