Patents by Inventor Hua Guo
Hua Guo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11316160Abstract: A supercapacity lithium ion battery cathode material, a preparation method therefor and an application thereof. The supercapacity lithium ion battery cathode material consists of a transition metal-containing lithium ion cathode material and carbon which is coated on the surface of the lithium ion cathode material. The transition metal on the surface of the lithium ion cathode material is coordinated with carbon by means of X—C bonds to form transition metal-X—C chemical bonds, such that carbon stably coats the surface of the cathode material, wherein C is SP3 hybridization and/or SP2 hybridization, and X is at least one selected from among N, O and S.Type: GrantFiled: April 24, 2017Date of Patent: April 26, 2022Assignee: PEKING UNIVERSITY SHENZHEN GRADUATE SCHOOLInventors: Feng Pan, Yandong Duan, Bingkai Zhang, Jiaxin Zheng, Jiangtao Hu, Tongchao Liu, Hua Guo, Yuan Lin, Wen Li, Xiaohe Song, Zengqing Zhuo, Yidong Liu
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Publication number: 20210366914Abstract: A method includes forming a first semiconductor fin over a p-well region of a substrate; forming a second semiconductor fin over an n-well region of a substrate; forming a gate structure crossing the first semiconductor fin and the second semiconductor fin; performing an implantation process to form a source/drain doped region in the first semiconductor fin; etching the second semiconductor fin to form a recess therein; performing a first epitaxy process to grow a first epitaxy layer in the recess; performing a second epitaxy process to grow a second epitaxy layer over the first epitaxy process; etching the second epitaxy layer to round a corner of the second epitaxy layer; forming an interlayer dielectric (ILD) layer covering the first semiconductor fin and the second epitaxy layer, wherein no etching is performed to the first semiconductor fin after forming the gate structure and prior to forming the ILD layer.Type: ApplicationFiled: August 5, 2021Publication date: November 25, 2021Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-I SHIH, Ren-Hua GUO
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Patent number: 11088150Abstract: A method includes forming a semiconductor fin over a substrate; forming a plurality of isolation structures adjacent to the semiconductor fin; etching the semiconductor fin to form a recess between the isolation structures; forming a first epitaxy layer in the recess; forming a second epitaxy layer over the first epitaxy layer; forming a third epitaxy layer over the second epitaxy layer, in which the first epitaxy layer has a higher germanium (Ge) concentration than the second and third epitaxy layers; etching the third epitaxy layer; and forming a dielectric layer in contact with the third epitaxy layer after etching the third epitaxy layer.Type: GrantFiled: January 28, 2019Date of Patent: August 10, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-I Shih, Ren-Hua Guo
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Publication number: 20210210350Abstract: A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.Type: ApplicationFiled: March 18, 2021Publication date: July 8, 2021Inventors: Wen-Chin Chen, Cheng-Yi Wu, Yu-Hung Cheng, Ren-Hua Guo, Hsiang Liu, Chin-Szu Lee
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Publication number: 20210180078Abstract: The present disclosure provides a transgenic plant, seed or progeny genetically engineered to overexpress one or more exogenous Oryza sativa acyl-CoA-binding protein 2 (OsACBP2) in an amount effective to enhance grain size and/or weight relative to a vector-transformed control plant. Also provided are methods of enhancing grain size and/or weight by genetically engineering a plant to overexpress one or more exogenous OsACBP2 in an amount effective to enhance grain size and/or weight relative to a vector-transformed control plant. In certain embodiments the plant belongs to the Poaceae family.Type: ApplicationFiled: November 29, 2017Publication date: June 17, 2021Inventors: Mee Len Chye, Ze Hua Guo
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Patent number: 10957540Abstract: A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.Type: GrantFiled: December 18, 2019Date of Patent: March 23, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Wen-Chin Chen, Cheng-Yi Wu, Yu-Hung Cheng, Ren-Hua Guo, Hsiang Liu, Chin-Szu Lee
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Patent number: 10901061Abstract: Systems and methods for accelerated diffusion-weighted magnetic resonance imaging using a tilted reconstruction kernel to synthesize unsampled k-space data in phase encoded and point spread function (“PSF”) encoded k-space data are provided. Images reconstructed from the data have reduced B0-related distortions and reduced T2* blurring. In general, data are acquired with systematically optimized undersampling of the PSF and phase encoding subspace. Parallel imaging reconstruction is implemented with a B0 inhomogeneity informed approach to achieve greater than twenty-fold acceleration of the PSF encoding dimension. A tilted reconstruction kernel is used to exploit the correlations in the phase encoding-PSF encoding subspace. Self-navigated phase corrections are computed from the acquired data and used to synthesize the unsampled k-space data.Type: GrantFiled: June 3, 2019Date of Patent: January 26, 2021Assignee: The General Hospital CorporationInventors: Kawin Setsompop, Lawrence L. Wald, Zijing Dong, Hua Guo, Fuyixue Wang, Timothy G. Reese
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Patent number: 10871534Abstract: Systems and methods for accelerated magnetic resonance imaging using a tilted reconstruction kernel to synthesize unsampled k-space data in phase encoded and point spread function (“PSF”) encoded k-space data are provided. Images reconstructed from the data have reduced B0-related distortions and reduced T2* blurring. In general, data are acquired with systematically optimized undersampling of the PSF and phase encoding subspace. Parallel imaging reconstruction is implemented with a B0 inhomogeneity informed approach to achieve greater than twenty-fold acceleration of the PSF encoding dimension. A tilted reconstruction kernel is used to exploit the correlations in the phase encoding-PSF encoding subspace.Type: GrantFiled: June 3, 2019Date of Patent: December 22, 2020Assignee: The General Hospital CorporationInventors: Kawin Setsompop, Lawrence L. Wald, Zijing Dong, Hua Guo, Fuyixue Wang, Timothy G. Reese
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Patent number: 10850315Abstract: Provided is a manufacturing method for high-toughness and plasticity hypereutectoid rail, including: a. hot rolling the steel billet into rail; b. blowing a cooling medium to the top surface of railhead, wherein, the two sides of railhead and the lower jaws on the two sides of railhead after the center of top surface of rail is air-cooled to 800-850° C., and cooling the rail until the center temperature of the top surface is 520-550° C.; c. stop blowing the cooling medium to the lower jaws on the two sides of railhead, continue blowing the cooling medium to the top surface of railhead and the two sides of railhead, and air cool the rail to room temperature after the surface temperature of railhead is cooled to 430-480° C. The resulting hypereutectoid rail has higher toughness and plasticity than existing products, which is suitable for heavy-haul railway, especially for small radius curve sections.Type: GrantFiled: October 9, 2018Date of Patent: December 1, 2020Assignee: Pangang Group Research Institute Co., Ltd.Inventors: Zhenyu Han, Ming Zou, Hua Guo, Jun Yuan
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Publication number: 20200328420Abstract: A supercapacity lithium ion battery cathode material, a preparation method therefor and an application thereof. The supercapacity lithium ion battery cathode material consists of a transition metal-containing lithium ion cathode material and carbon which is coated on the surface of the lithium ion cathode material. The transition metal on the surface of the lithium ion cathode material is coordinated with carbon by means of X—C bonds to form transition metal-X—C chemical bonds, such that carbon stably coats the surface of the cathode material, wherein C is SP3 hybridization and/or SP2 hybridization, and X is at least one selected from among N, O and S.Type: ApplicationFiled: April 24, 2017Publication date: October 15, 2020Applicant: Peking University Shenzhen Graduate SchoolInventors: Feng PAN, Yandong DUAN, Bingkai ZHANG, Jiaxin ZHENG, Jiangtao HU, Tongchao LIU, Hua GUO, Yuan LIN, Wen LI, Xiaohe SONG, Zengqing ZHUO, Yidong LIU
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Patent number: 10758753Abstract: The present invention relates to a ducting system (100) for conveying a flow of a gaseous feed (110) comprising a combustible component from an inlet to at least one combustion module (12), the ducting system (100) utilising a combination of a sensor (C0) for measuring the concentration of the combustible component in the gaseous feed (110), a flame detector (F0, F1, F2, F3, . . . , Fn) a shut-off valve (6) and a flame arrestor (5) located in a flow path of the gaseous feed upstream of the shut-off valve (6) such that a measurement of a concentration of combustible material in the gaseous feed over a specified concentration by the sensor (CO) causes the shut-off valve (6) to be configured to the closed position for preventing flow of a gaseous feed comprising a combustible mixture of the combustible component from reaching an ignition source and/or detection of flame by the flame detector (F0, F1, F2, F3, . . .Type: GrantFiled: October 27, 2016Date of Patent: September 1, 2020Assignee: Commonwealth Scientific and Industrial Research OrganisationInventors: Shi Su, Hua Guo, Xinxiang Yu
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Publication number: 20200243544Abstract: A method includes forming a semiconductor fin over a substrate; forming a plurality of isolation structures adjacent to the semiconductor fin; etching the semiconductor fin to form a recess between the isolation structures; forming a first epitaxy layer in the recess; forming a second epitaxy layer over the first epitaxy layer; forming a third epitaxy layer over the second epitaxy layer, in which the first epitaxy layer has a higher germanium (Ge) concentration than the second and third epitaxy layers; etching the third epitaxy layer; and forming a dielectric layer in contact with the third epitaxy layer after etching the third epitaxy layer.Type: ApplicationFiled: January 28, 2019Publication date: July 30, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-I SHIH, Ren-Hua GUO
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Publication number: 20200126793Abstract: A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.Type: ApplicationFiled: December 18, 2019Publication date: April 23, 2020Inventors: Wen-Chin Chen, Cheng-Yi Wu, Yu-Hung Cheng, Ren-Hua Guo, Hsiang Liu, Chin-Szu Lee
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Patent number: 10522353Abstract: A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.Type: GrantFiled: July 24, 2018Date of Patent: December 31, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Wen-Chin Chen, Cheng-Yi Wu, Yu-Hung Cheng, Ren-Hua Guo, Hsiang Liu, Chin-Szu Lee
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Patent number: 10512627Abstract: The invention disclose a compound of formula (I), wherein, R1 is selected from —H or C1-C6 hydrocarbon group, —NH2, —OH, —O(CH2)nCH3 (n=0, 1 or 2), —N(CH3)2, or —CH2N(CH3)2, R2 is selected from an amino acid or an hydroxy acid or —OH (R1, R2 are not —CH3 and —OH at the same time), wherein X, Y are —H, —CH3, —CH2OH, —CH(OH)CH3, —CH2SH, —CH(CH3)2, —CH2CH(CH3)2, —CH(CH3)CH2CH3, —CH2CH2SCH3, —CH2COOH, —CH2CONH2, —CH2CH2COOH, —CH2CH2CH2CH2NH2, or —CH2CH2CONH2, R3-R5 are H or C1-C6 hydrocarbon group. The compound has a low toxicity, can significantly inhibit the migration and invasion of tumor cells in vitro, and can inhibit tumor metastasis in vivo in mice at low concentration, while showing notable sensitizing effect on cytotoxic anti-tumor drugs such as Paclitaxel etc.Type: GrantFiled: September 2, 2015Date of Patent: December 24, 2019Assignee: Tianjin Medical University Cancer Institute and HospitalInventors: Ning Zhang, Yinsong Wang, Ping Zhou, Hua Guo, Yi Luo, Xishan Hao, Hua Geng
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Publication number: 20190369186Abstract: Systems and methods for accelerated magnetic resonance imaging using a tilted reconstruction kernel to synthesize unsampled k-space data in phase encoded and point spread function (“PSF”) encoded k-space data are provided. Images reconstructed from the data have reduced B0-related distortions and reduced T2* blurring. In general, data are acquired with systematically optimized undersampling of the PSF and phase encoding subspace. Parallel imaging reconstruction is implemented with a B0 inhomogeneity informed approach to achieve greater than twenty-fold acceleration of the PSF encoding dimension. A tilted reconstruction kernel is used to exploit the correlations in the phase encoding-PSF encoding subspace.Type: ApplicationFiled: June 3, 2019Publication date: December 5, 2019Inventors: Kawin Setsompop, Lawrence L. Wald, Zijing Dong, Hua Guo, Fuyixue Wang, Timothy G. Reese
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Publication number: 20190369199Abstract: Systems and methods for accelerated diffusion-weighted magnetic resonance imaging using a tilted reconstruction kernel to synthesize unsampled k-space data in phase encoded and point spread function (“PSF”) encoded k-space data are provided. Images reconstructed from the data have reduced B0-related distortions and reduced T2* blurring. In general, data are acquired with systematically optimized undersampling of the PSF and phase encoding subspace. Parallel imaging reconstruction is implemented with a B0 inhomogeneity informed approach to achieve greater than twenty-fold acceleration of the PSF encoding dimension. A tilted reconstruction kernel is used to exploit the correlations in the phase encoding-PSF encoding subspace. Self-navigated phase corrections are computed from the acquired data and used to synthesize the unsampled k-space data.Type: ApplicationFiled: June 3, 2019Publication date: December 5, 2019Inventors: Kawin Setsompop, Lawrence L. Wald, Zijing Dong, Hua Guo, Fuyixue Wang, Timothy G. Reese
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Patent number: 10475643Abstract: A method for manufacturing a semiconductor device includes introducing a gas into a chamber from a showerhead. The chamber has a sidewall surrounding a pedestal. The temperature of the showerhead is increased. The showerhead is thermally connected to the sidewall of the chamber, and a temperature of the sidewall of the chamber is increased by increasing the temperature of the showerhead.Type: GrantFiled: January 22, 2018Date of Patent: November 12, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ren-Hua Guo, Ju-Ru Hsieh, Jen-Hao Yang
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Patent number: 10366177Abstract: A method of designing a cutting drum for earth moving equipment is disclosed. The cutting drum has two or more ring segments, each ring segment comprising a plurality of cutting tools, and the rotational position of at least one ring segment is adjustable relative to one or more other ring segment and fixable in the new rotational position. The method involves inputting a plurality of design parameters of a cutting drum into a computer program, performing a computer simulated analysis of the cutting drum using the computer program to determine at least one operational value associated with at least one design objective, using the computer simulated analysis to determine the relative locations of the ring segments that correspond to the at least one design objective, and rotating the or each adjustable ring segment relative to at least one other ring segment so that the relative locations of the ring segments correspond to the at least one design objective.Type: GrantFiled: September 26, 2012Date of Patent: July 30, 2019Assignee: COMMONWEALTH SCIENTIFIC AND INDUSTRIAL RESEARCH ORGANISATIONInventors: Xing Sheng Li, Yong Sun, Hua Guo
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Publication number: 20190226040Abstract: The invention relates to the field of railway, and discloses a hypereutectoid rail and a manufacturing method thereof, which includes rolling a steel billet containing V and Ti, wherein, based on its total weight, the steel billet contains C of 0.85-0.94 wt %, and the relation between the start rolling temperature Tstart/final rolling temperature Tfinal and the content of V and the content of Ti satisfies the following formulas: Tstart=1100+a([V]+5[Ti]), Tfinal=750+b([V]+5[Ti]), wherein, 500?a?800, 300?b?500; based on its total weight, the steel billet contains V of 0.03-0.08 wt %, Ti of 0.011-0.02 wt %, and [V]+5[Ti]: 0.12-0.14 wt %. The hypereutectoid rail manufactured with the method has excellent comprehensive performance of strength and toughness.Type: ApplicationFiled: May 24, 2017Publication date: July 25, 2019Applicant: PANGANG GROUP PANZHIHUA IRON & STEEL RESEARCH INSTITUTE CO., LTD.Inventors: Zhenyu HAN, Ming ZOU, Hua GUO, Gongming TAO, Yuan WANG, Chunjian WANG, Jihai JIA