Abstract: A top-gate transistor array substrate includes a transparent substrate with a plane, an ion release layer, a pixel array, and a first insulating layer. The ion release layer is disposed on the transparent substrate and completely covers the plane. The pixel array is disposed on the ion release layer and includes a plurality of transistors and a plurality of pixel electrodes. Each of the transistors includes a source, a drain, a gate and a MOS (metal oxide semiconductor) layer. The drain, the source and the MOS layer are disposed on the ion release layer. The pixel electrodes are electrically connected to the drains respectively. The gate is disposed above the MOS layer. The first insulating layer is disposed between the MOS layers and the gates. The MOS layer contacts the ion release layer. The ion release layer can release a plurality of ions into the MOS layers.

Abstract: A vertical transistor structure includes a substrate, a source, a first gate, a first insulating layer, a second gate, a gate insulating layer, a drain, a second insulating layer, and a semiconductor channel layer. The source is configured on the substrate. The first gate is configured on the source and has at least one first through hole. The first insulating layer is between the first gate and the source. The second gate is configured on the first gate and has at least one second through hole. The gate insulating layer is between the first and second gates and has at least one third through hole. The first, second, and third through holes are communicated with one another. The drain is configured on the second gate. The second insulating layer is configured between the second gate and the drain. The semiconductor channel layer fills the first, second, and third through holes.

Abstract: A touch device includes a touch panel, a sensing unit, and an operation unit is provided. The sensing unit is coupled to the touch panel, for scanning a scan area of the touch panel to output a touch signal. The operation unit is coupled to the sensing unit, for determining the scan area according to the touch signal. When the touch signal corresponds to a first close path, the operation unit defines a close area formed by the first close path as the first sub touch area. When the first sub touch area is undefined, the operation unit chooses a whole touch area of the touch panel as the scan area. When the first sub touch area is defined, the operation chooses the first sub touch area as the scan area.

Abstract: A method of manufacturing a mold includes following steps. Providing a solution, which includes a solvent, a solute and a plurality of nanoparticles. Providing a first substrate. Spin coating the solution on the first substrate, and then vaporizing the solvent to form a first mold on the first substrate. Thus, an upper surface of the first mold has a plurality of first porous structures. The present invention further includes forming an optical film having protrusion patterns with the aforementioned mold.

Abstract: A blue phase liquid crystal composition includes a chiral dopant, a positive liquid crystal component and a negative liquid crystal component. The positive liquid crystal component includes at least one positive liquid crystal material, has a positive dielectric anisotropy and has no blue phase properties with respect to the chiral dopant. In addition, the negative liquid crystal component includes at least one negative liquid crystal material, has a negative dielectric anisotropy and has no blue phase properties with respect to the chiral dopant, so that the blue phase liquid crystal composition has a dielectric anisotropy between 0.5 and 14 and a blue phase temperature range larger than 3° C.

Abstract: A capacitance sensing circuit for a touch panel includes an analog capacitance-detecting circuit, a PWM-to-digital circuit and a self-calibration circuit. The analog capacitance-detecting circuit detects the capacitance of the touch panel based on a charging current, and converts the detected capacitance into a PWM control signal. The PWM-to-digital circuit converts the PWM control signal into a sensing count value based on a clock signal. The self-calibration circuit adjusts the value of the charging current or the frequency of the clock signal according to the difference between the range of the sensing count value and a predetermined detecting range. The predetermined detecting range can thus be adjusted for matching the range of the sensing count value.

Abstract: A top-gate transistor array substrate includes a transparent substrate with a plane, an ion release layer, a pixel array, and a first insulating layer. The ion release layer is disposed on the transparent substrate and completely covers the plane. The pixel array is disposed on the ion release layer and includes a plurality of transistors and a plurality of pixel electrodes. Each of the transistors includes a source, a drain, a gate and a MOS (metal oxide semiconductor) layer. The drain, the source and the MOS layer are disposed on the ion release layer. The pixel electrodes are electrically connected to the drains respectively. The gate is disposed above the MOS layer. The first insulating layer is disposed between the MOS layers and the gates. The MOS layer contacts the ion release layer. The ion release layer can release a plurality of ions into the MOS layers.

Abstract: A method of electrophoretic deposition includes: providing an electrophoresis tank, an anode substrate, and a cathode substrate; disposing the anode substrate and the cathode substrate oppositely in the electrophoresis tank; adjusting relative positions of the cathode substrate and the anode substrate for varying each of the distances between corresponding regions on the cathode substrate and the anode substrate; and inputting cathode voltage and anode voltage respectively to a cathode electrode of the cathode substrate and a anode electrode of the anode substrate for performing the electrophoretic deposition.

Abstract: A fluorescence material and a white light illumination element are provided. The white light illumination element includes a light emitting diode (LED) chip, a first fluorescence material, and a second fluorescence material. The LED chip is configured on a substrate and emits an exciting light. The first fluorescence material and the second fluorescence material are configured on the LED chip. A composition of the first fluorescence material includes an aluminum nitride oxide doped with at least one of europium (Eu) and manganese (Mn). A first emitted light emitted by the first fluorescence material after the first fluorescence material absorbs the exciting light emitted from the LED chip and a second emitted light emitted by the second fluorescence material after the second fluorescence material absorbs the exciting light emitted from the LED chip are mixed to generate a white light.

Abstract: A blue phase liquid crystal composition includes a chiral dopant, a positive liquid crystal component and a negative liquid crystal component. The positive liquid crystal component includes at least one positive liquid crystal material, has a positive dielectric anisotropy and has no blue phase properties with respect to the chiral dopant. In addition, the negative liquid crystal component includes at least one negative liquid crystal material, has a negative dielectric anisotropy and has no blue phase properties with respect to the chiral dopant, so that the blue phase liquid crystal composition has a dielectric anisotropy between 0.5 and 14 and a blue phase temperature range larger than 3° C.

Abstract: A reflective liquid crystal display device includes a first substrate, a second substrate, a liquid crystal layer, a first alignment layer, and a second alignment layer. The first substrate and the second substrate are disposed oppositely to each other. The liquid crystal layer is disposed between the first substrate and the second substrate. The liquid crystal layer includes a plurality of liquid crystal molecules for reflecting light within a wavelength range and allowing light beyond the wavelength range to pass through. The second alignment layer is disposed on an inner side of the first substrate facing the second substrate, and the second alignment layer is employed to absorb the light passing through the liquid crystal layer and align the liquid crystal molecules.

Abstract: A thin film transistor (TFT) array substrate includes a substrate and a pixel array. The pixel array is disposed on the substrate and includes a plurality of transistors and a plurality of reflective electrodes. Each transistor includes a gate, a drain, a source, and a channel layer. In each transistor, the channel layer is located between the gate and the drain, and between the gate and the source. The channel layer is partially overlapped with the gate, the drain and the source. The reflective electrodes are electrically connected to the drains respectively. Each reflective electrode includes a plurality of dyeing particles and a conductive layer. The dyeing particles are distributed in the conductive layer.

Abstract: A manufacturing method of thin film transistors is provided. The manufacturing method includes: providing a substrate; forming a gate electrode; forming a gate insulating layer; forming a patterned oxide semiconductor layer; forming a source electrode and a drain electrode; and executing a localized laser treatment. A laser beam is used to irradiate at least a part of the patterned oxide semiconductor layer in the localized laser treatment. An electrical resistitivity of the patterned oxide semiconductor layer irradiated by the laser beam is lower than an electrical resistitivity of the patterned oxide semiconductor layer without being irradiated by the laser beam.

Abstract: In a capacitance sensing analog circuit of a touch panel sensing circuit, by raising a magnitude of a current flowing through a sensing capacitor to form an amplified sensing capacitance, while sensing the amplified sensing capacitance with the aid of pulse width modulation signals, higher resolution of the original sensing capacitance may thus be achieved. Besides, by using a self-calibrating capacitance sensing circuit on the touch panel sensing circuit, linear errors and DC errors of an output signal of the capacitance sensing analog circuit may be filtered off, and thereby resolution of a capacitance amplifying ratio may be effectively raised so as to relieve errors within the capacitance amplifying ratio caused by noises.

Abstract: A method of manufacturing a mold includes following steps. Providing a solution, which includes a solvent, a solute and a plurality of nanoparticles. Providing a first substrate. Spin coating the solution on the first substrate, and then vaporizing the solvent to form a first mold on the first substrate. Thus, an upper surface of the first mold has a plurality of first porous structures. The present invention further includes forming an optical film having protrusion patterns with the aforementioned mold.

Abstract: A reflective liquid crystal display device includes a first substrate, a second substrate, a liquid crystal layer, a first alignment layer, and a second alignment layer. The first substrate and the second substrate are disposed oppositely to each other. The liquid crystal layer is disposed between the first substrate and the second substrate. The liquid crystal layer includes a plurality of liquid crystal molecules for reflecting light within a wavelength range and allowing light beyond the wavelength range to pass through. The second alignment layer is disposed on an inner side of the first substrate facing the second substrate, and the second alignment layer is employed to absorb the light passing through the liquid crystal layer and align the liquid crystal molecules.

Abstract: A package structure including a first substrate, a second substrate and a light emitting diode is provided. The first substrate has at least a first annular engaged portion. The second substrate is disposed above the first substrate and has at least a second annular engaged portion. The light emitting diode is disposed on the first substrate. The second annular engaged portion is infixed to the first annular engaged portion so as to form an airtight space. The light emitting diode is located in the airtight space.

Abstract: A vertical transistor structure includes a substrate, a source, a first gate, a first insulating layer, a second gate, a gate insulating layer, a drain, a second insulating layer, and a semiconductor channel layer. The source is configured on the substrate. The first gate is configured on the source and has at least one first through hole. The first insulating layer is between the first gate and the source. The second gate is configured on the first gate and has at least one second through hole. The gate insulating layer is between the first and second gates and has at least one third through hole. The first, second, and third through holes are communicated with one another. The drain is configured on the second gate. The second insulating layer is configured between the second gate and the drain. The semiconductor channel layer fills the first, second, and third through holes.

Abstract: A fluorescence material and a white light illumination element are provided. The white light illumination element includes a light emitting diode (LED) chip, a first fluorescence material, and a second fluorescence material. The LED chip is configured on a substrate and emits an exciting light. The first fluorescence material and the second fluorescence material are configured on the LED chip. A composition of the first fluorescence material includes an aluminum nitride oxide doped with at least one of europium (Eu) and manganese (Mn). A first emitted light emitted by the first fluorescence material after the first fluorescence material absorbs the exciting light emitted from the LED chip and a second emitted light emitted by the second fluorescence material after the second fluorescence material absorbs the exciting light emitted from the LED chip are mixed to generate a white light.

Abstract: A driving method for a photosensor array panel including a plurality of photosensor strips, a plurality of scan lines, at least a dummy photosensor strip, and at least a dummy scan line is provided. The photosensor strips are arranged side by side and located beside the dummy photosensor strip. The scan lines are electrically connected to the photosensor strips, and the dummy scan line is electrically connected to the dummy photosensor strip. The driving method includes the following steps. First, the photosensor strips are turned on in sequence through the scan lines. When none of the photosensor strips is turned on, the dummy photosensor strip will be turned on through the dummy scan line.