Patents by Inventor Huan-Neng CHEN

Huan-Neng CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10658975
    Abstract: A circuit includes a first digital controlled oscillator and a second digital controlled oscillator coupled to the first digital controlled oscillator. A skew detector is connected to determine a skew between outputs of the first digital controlled oscillator and the second digital controlled oscillator, and a decoder is utilized to output a control signal, based on the skew, to modify a frequency of the first digital controlled oscillator using a switched capacitor array to reduce or eliminate the skew.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: May 19, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Lan-Chou Cho, Huan-Neng Chen, Chewn-Pu Jou, Feng Wei Kuo
  • Patent number: 10659092
    Abstract: A receiver circuit includes a plurality of receivers, each of the receivers being associated with a carrier of a plurality of carriers, and a decoupler configured to receive a transmission signal from a transmission channel and output a plurality of divided transmission signals to the plurality of receivers. An equalizer is configured to modify either the transmission signal or one of the divided transmission signals.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: May 19, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Lan-Chou Cho, Chewn-Pu Jou, Feng Wei Kuo, Huan-Neng Chen, William Wu Shen
  • Publication number: 20200132542
    Abstract: A device includes a scattering structure and a collection structure. The scattering structure is arranged to concurrently scatter incident electromagnetic radiation along a first scattering axis and along a second scattering axis. The first scattering axis and the second scattering axis are non-orthogonal. The collection structure includes a first input port aligned with the first scattering axis and a second input port aligned with the second scattering axis. A method includes scattering electromagnetic radiation along a first scattering axis to create first scattered electromagnetic radiation and along a second scattering axis to create second scattered electromagnetic radiation. The first scattering axis and the second scattering axis are non-orthogonal. The first scattered electromagnetic radiation is detected to yield first detected radiation and the second scattered electromagnetic radiation is detected to yield second detected radiation.
    Type: Application
    Filed: December 3, 2018
    Publication date: April 30, 2020
    Inventors: Chewn-Pu Jou, Fen Wei Kuo, Huan-Neng Chen, Lan-Chou Cho
  • Publication number: 20200135840
    Abstract: A semiconductor arrangement is provided. The semiconductor arrangement includes a molding layer and a first capacitor. The first capacitor includes a first vertical conductive structure within the molding layer, a second vertical conductive structure within the molding layer, and a first high-k dielectric material between the first vertical conductive structure and the second vertical conductive structure.
    Type: Application
    Filed: January 22, 2019
    Publication date: April 30, 2020
    Inventors: Huan-Neng CHEN, Wen-Shiang LIAO
  • Publication number: 20200083318
    Abstract: A capacitor includes a first graphene structure having a first plurality of graphene layers. The capacitor further includes a dielectric layer over the first graphene structure. The capacitor further includes a second graphene structure over the dielectric layer, wherein the second graphene structure has a second plurality of graphene layers.
    Type: Application
    Filed: November 13, 2019
    Publication date: March 12, 2020
    Inventors: Chewn-Pu Jou, Chih-Hsin Ko, Po-Wen Chiu, Chao-Ching Cheng, Chun-Chieh Lu, Chi-Feng Huang, Huan-Neng Chen, Fu-Lung Hsueh, Clement Hsingjen Wann
  • Publication number: 20200057351
    Abstract: In an embodiment, a phase shifter includes: a light input end; a light output end; a p-type semiconductor material, and an n-type semiconductor material contacting the p-type semiconductor material along a boundary area, wherein the boundary area is greater than a length from the light input end to the light output end multiplied by a core width of the phase shifter.
    Type: Application
    Filed: August 5, 2019
    Publication date: February 20, 2020
    Inventors: Huan-Neng CHEN, Chewn-Pu JOU, Lan-Chou CHO, Feng-Wei KUO, Yutong WU
  • Publication number: 20200044680
    Abstract: A transceiver disposed on a first die in a bidirectional differential die-to-die communication system is disclosed. The transceiver includes a transmission section configured to modulate a first data onto a carrier signal having a first frequency for transmission via a bidirectional differential transmission line; and a reception section configured to receive signals from the bidirectional differential transmission line, the reception section including a filter configured to pass frequencies within a first passband that includes a second frequency, the first frequency being outside of the first passband. According to some embodiments, the reception section is configured to receive, via the bidirectional differential transmission line, modulated data at the second frequency at a same time that the transmission section transmits the modulated data at the first frequency.
    Type: Application
    Filed: October 14, 2019
    Publication date: February 6, 2020
    Inventors: Huan-Neng Chen, Chewn-Pu Jou, Feng-Wei Kuo, Lan-Chou Cho, William Wu Shen
  • Patent number: 10554255
    Abstract: A communication system includes a demodulator configured to demodulate an amplified modulated signal responsive to a first carrier signal. The demodulator includes a filter and a gain adjusting circuit. The filter is configured to generate a filtered first signal based on a first signal. The first signal is based on the first carrier signal and the amplified modulated signal. The filter has a gain adjusted based on a set of control signals. The gain adjusting circuit is coupled to the filter, and configured to generate the set of control signals based on at least a voltage of the filtered first signal or a voltage of a second signal. The gain adjusting circuit includes a first peak detector configured to output a peak value of the voltage of the second signal. The voltage of the second signal includes a voltage of the first signal or a voltage of a reference signal.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: February 4, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Feng Wei Kuo, William Wu Shen, Chewn-Pu Jou, Huan-Neng Chen, Lan-Chou Cho
  • Publication number: 20200018898
    Abstract: An optical device includes a waveguide configured to guide light, a taper integrated with the waveguide on a substrate configured for optical coupling, and an attenuator to degrade unwanted optical signal from the taper. The attenuator extends along one side of the taper, and includes one of a conductive structure, a doped structure and a refractive structure.
    Type: Application
    Filed: January 3, 2019
    Publication date: January 16, 2020
    Inventors: CHEWN-PU JOU, HUAN-NENG CHEN, LAN-CHOU CHO, FENG WEI KUO
  • Publication number: 20200003956
    Abstract: Disclosed is a system and method for communication using an efficient fiber-to-chip grating coupler with a high coupling efficiency.
    Type: Application
    Filed: May 20, 2019
    Publication date: January 2, 2020
    Inventors: Feng-Wei KUO, Lan-Chou CHO, Huan-Neng CHEN, Chewn-Pu JOU
  • Publication number: 20190393171
    Abstract: A semiconductor structure includes a first dielectric waveguide, a second dielectric waveguide, a first inter-level dielectric (ILD) material, a first transmitter coupling structure and a second transmitter coupling structure. The first and second dielectric waveguides are disposed one over the other. The first dielectric waveguide is configured to guide a first electromagnetic signal. The second dielectric waveguide is configured to guide a second electromagnetic signal. The first and second electromagnetic signals have different frequencies. The first ILD material is disposed between the first and second dielectric waveguides. The first transmitter coupling structure is configured to couple a first driver signal generated by a transmitter die to the first dielectric waveguide, and accordingly produce the first electromagnetic signal.
    Type: Application
    Filed: June 25, 2018
    Publication date: December 26, 2019
    Inventors: WEN-SHIANG LIAO, HUAN-NENG CHEN
  • Patent number: 10510827
    Abstract: A capacitor includes a first graphene structure having a first plurality of graphene layers. The capacitor further includes a dielectric layer over the first graphene structure. The capacitor further includes a second graphene structure over the dielectric layer, wherein the second graphene structure has a second plurality of graphene layers.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chewn-Pu Jou, Chih-Hsin Ko, Po-Wen Chiu, Chao-Ching Cheng, Chun-Chieh Lu, Chi-Feng Huang, Huan-Neng Chen, Fu-Lung Hsueh, Clement Hsingjen Wann
  • Publication number: 20190333875
    Abstract: A semiconductor device includes a semiconductor substrate and an interconnect structure over the semiconductor substrate. The interconnect structure includes a magnetic core and a conductive coil winding around the magnetic core and electrically insulated from the magnetic core. The conductive coil includes horizontally-extending conductive lines and vertically-extending conductive vias electrically connecting the conductive lines.
    Type: Application
    Filed: April 27, 2018
    Publication date: October 31, 2019
    Inventors: Wen-Shiang LIAO, Huan-Neng CHEN
  • Publication number: 20190326235
    Abstract: A semiconductor arrangement in fan out packaging has a molding compound adjacent a side of a semiconductor die. A magnetic structure is disposed above the molding compound, above the semiconductor die, and around a transmission line coupled to an integrated circuit of the semiconductor die. The magnetic structure has a top magnetic portion, a bottom magnetic portion, a first side magnetic portion, and a second side magnetic portion. The first side magnetic portion and the second side magnetic portion are coupled to the top magnetic portion and to the bottom magnetic portion. The first side magnetic portion and the second side magnetic portion have tapered sidewalls.
    Type: Application
    Filed: April 29, 2019
    Publication date: October 24, 2019
    Inventors: Wen-Shiang LIAO, Huan-Neng Chen
  • Patent number: 10447328
    Abstract: Systems and methods for die-to-die communication are provided. A first transceiver disposed on a first die includes a transmission section configured to modulate first data onto a carrier signal having a first frequency. The first transceiver includes a reception section configured to receive signals from a transmission line. The reception section includes a filter configured to pass frequencies within a first passband that includes a second frequency. The first frequency is outside of the first passband. A second transceiver is disposed on a second die and is configured to communicate with the first transceiver via the transmission line. The second transceiver includes a transmission section configured to modulate second data onto a carrier signal having the second frequency. The second transceiver includes a reception section including a filter configured to pass frequencies within a second passband that includes the first frequency. The second frequency is outside of the second passband.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: October 15, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Huan-Neng Chen, Chewn-Pu Jou, Feng-Wei Kuo, Lan-Chou Cho, William Wu Shen
  • Publication number: 20190288692
    Abstract: An all-digital phase locked loop (ADPLL) receives an analog input supply voltage which is utilized to operate analog circuitry within the ADPLL. The ADPLL of the present disclosure scales this analog input supply voltage to provide a digital input supply voltage which is utilized to operate digital circuitry within the ADPLL. The analog circuitry includes a time-to-digital converter (TDC) to measure phase errors within the ADPLL. The TDC can be characterized as having a resolution of the TDC which is dependent, at least in part, upon the digital input supply voltage. In some situations, process, voltage, and/or temperature (PVT) variations within the ADPLL can cause the digital input supply voltage to fluctuate, which in turn, can cause fluctuations in the resolution of the TDC. These fluctuations in the resolution of the TDC can cause in-band phase noise of the ADPLL to vary across the PVT variations.
    Type: Application
    Filed: June 3, 2019
    Publication date: September 19, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Feng Wei KUO, Chewn-Pu JOU, Huan-Neng CHEN, Lan-Chou CHO, Robert Bogdan STASZEWSKI, Seyednaser POURMOUSAVIAN
  • Publication number: 20190260407
    Abstract: A receiver circuit includes a plurality of receivers, each of the receivers being associated with a carrier of a plurality of carriers, and a decoupler configured to receive a transmission signal from a transmission channel and output a plurality of divided transmission signals to the plurality of receivers. An equalizer is configured to modify either the transmission signal or one of the divided transmission signals.
    Type: Application
    Filed: April 30, 2019
    Publication date: August 22, 2019
    Inventors: Lan-Chou CHO, Chewn-Pu JOU, Feng Wei KUO, Huan-Neng CHEN, William Wu SHEN
  • Publication number: 20190237534
    Abstract: In an embodiment, a circuit includes: a transformer defining an inductive footprint within a first layer; a grounded shield bounded by the inductive footprint within a second layer separate from the first layer; and a circuit component bounded by the inductive footprint within a third layer separate from the second layer, wherein: the circuit component is coupled with the transformer through the second layer, and the third layer is separated from the first layer by the second layer.
    Type: Application
    Filed: April 27, 2018
    Publication date: August 1, 2019
    Inventors: Feng Wei KUO, Chewn-Pu JOU, Huan-Neng CHEN, Lan-Chou CHO, Robert Bogdan STASZEWSKI
  • Publication number: 20190229677
    Abstract: A circuit includes a first digital controlled oscillator and a second digital controlled oscillator coupled to the first digital controlled oscillator. A skew detector is connected to determine a skew between outputs of the first digital controlled oscillator and the second digital controlled oscillator, and a decoder is utilized to output a control signal, based on the skew, to modify a frequency of the first digital controlled oscillator using a switched capacitor array to reduce or eliminate the skew.
    Type: Application
    Filed: April 5, 2019
    Publication date: July 25, 2019
    Inventors: Lan-Chou Cho, Huan-Neng Chen, Chewn-Pu Jou, Feng Wei Kuo
  • Publication number: 20190228898
    Abstract: A device includes a substrate, and a vertical inductor over the substrate. The vertical inductor includes a plurality of parts formed of metal, wherein each of the parts extends in one of a plurality of planes perpendicular to a major surface of the substrate. Metal lines interconnect neighboring ones of the plurality of parts of the vertical inductor.
    Type: Application
    Filed: April 2, 2019
    Publication date: July 25, 2019
    Inventors: Hsiao-Tsung Yen, Huan-Neng Chen, Yu-Ling Lin, Chin-Wei Kuo, Mei-Show Chen, Ho-Hsiang Chen, Min-Chie Jeng