Abstract: An all-digital phase locked loop (ADPLL) receives an analog input supply voltage which is utilized to operate analog circuitry within the ADPLL. The ADPLL of the present disclosure scales this analog input supply voltage to provide a digital input supply voltage which is utilized to operate digital circuitry within the ADPLL. The analog circuitry includes a time-to-digital converter (TDC) to measure phase errors within the ADPLL. The TDC can be characterized as having a resolution of the TDC which is dependent, at least in part, upon the digital input supply voltage. In some situations, process, voltage, and/or temperature (PVT) variations within the ADPLL can cause the digital input supply voltage to fluctuate, which in turn, can cause fluctuations in the resolution of the TDC. These fluctuations in the resolution of the TDC can cause in-band phase noise of the ADPLL to vary across the PVT variations.

Abstract: A device, a circuit and a method are disclosed herein. The device includes a data receiving circuit and an oscillating signal generator. The data receiving circuit is configured to output a first output signal, a second output signal, and a phase error signal according to an oscillating signal and a modulated signal, in which the phase error signal indicates a phase difference between the oscillating signal and the modulated signal. The oscillating signal generator is configured to delay a phase of a first reference signal according to the phase error signal, to generate the oscillating signal.

Abstract: A transceiving device includes: a signal port, arranged to relay an RF input signal during a first mode, and to relay an RF output signal during a second mode different from the first mode; a receiver, coupled to the signal port; a transmitter, coupled to the signal port; and a first adjustable capacitor, coupled to the signal port. The second adjustable capacitor is arranged to have a first capacitance during the first mode such that the RF input signal is received by the receiver, and the second adjustable capacitor is arranged to have a second capacitance during the second mode such that the RF output signal is transmitted to the signal port.

Abstract: A circuit includes a transmitter associated with a carrier of a radio frequency interconnect, a transmission channel communicatively coupled with the transmitter, and a receiver communicatively coupled with the transmission channel, the receiver also being associated with the carrier of the radio frequency interconnect. A combiner on a transmitter-side of the transmission channel is coupled between the transmitter and the transmission channel, and a decoupler on a receiver-side of the transmission channel is coupled between the receiver and the transmission channel. A channel loss compensation circuit is communicatively coupled between the transmitter and the receiver.

Abstract: A communication system includes a first amplifier configured to output an amplified modulated signal, and a demodulator coupled to the first amplifier. The demodulator is configured to demodulate the amplified modulated signal responsive to a first carrier signal. The demodulator includes a filter and a bandwidth adjusting circuit. The filter is configured to generate a filtered first signal based on a first signal and a set of control signals. The filter has a bandwidth adjusted based on the set of control signals. The bandwidth adjusting circuit is coupled to the filter, and is configured to generate the set of control signals based on a frequency of the filtered first signal and a frequency of the first signal. The bandwidth adjusting circuit includes a frequency detector configured to generate a second signal based on the frequency of the filtered first signal and the frequency of the first signal.

Abstract: An integrated circuit (IC) includes a first circuit layer that includes a first wireless power transfer (WPT) device, a first chip electrically connected to the first circuit layer, and a first tracking circuit disposed in the first chip. The first WPT device may be configured to extract energy from an electromagnetic signal and provide an output voltage. The first tracking circuit may be powered by the output voltage of the first WPT device and may output tracking data in response to an instruction extracted from the electromagnetic signal.

Abstract: A radio frequency interconnect (RFI) includes a transmitter side connected to a first end of a channel, a receiver side connected to a second end of the channel opposite the first end and a calibration system. The receiver side includes at least one of the following configurations: (a) at least one gain control amplifier (GCA) or at least one analog to digital converter (ADC). The calibration system is configured to transmit a predetermined data set through the channel, receive an output from the at least one ADC or the at least one GCA, and calibrate the at least one ADC or the at least one GCA based on a measured data set. The output includes the measured data set based on the predetermined data set transmitted through channel.

Abstract: A semiconductor device is disclosed. The semiconductor device includes a first die on a first substrate, a second die on a second substrate separate from the first substrate, a transmission line in a redistribution layer on a wafer, and a magnetic structure surrounds the transmission line. The first transmission line electrically connects the first die and the second die. The magnetic structure is configured to increase the characteristic impedance of the transmission line, which can save the current and power consumption of a current mirror and amplifier in a 3D IC chip-on-wafer-on-substrate (CoWoS) semiconductor package.

Abstract: A semiconductor arrangement in fan out packaging has a molding compound adjacent a side of a semiconductor die. A magnetic structure is disposed above the molding compound, above the semiconductor die, and around a transmission line coupled to an integrated circuit of the semiconductor die. The magnetic structure has a top magnetic portion, a bottom magnetic portion, a first side magnetic portion, and a second side magnetic portion. The first side magnetic portion and the second side magnetic portion are coupled to the top magnetic portion and to the bottom magnetic portion. The first side magnetic portion and the second side magnetic portion have tapered sidewalls.

Abstract: A device includes a substrate, and a vertical inductor over the substrate. The vertical inductor includes a plurality of parts formed of metal, wherein each of the parts extends in one of a plurality of planes perpendicular to a major surface of the substrate. Metal lines interconnect neighboring ones of the plurality of parts of the vertical inductor.

Abstract: A circuit includes a first digital controlled oscillator and a second digital controlled oscillator coupled to the first digital controlled oscillator. A skew detector is connected to determine a skew between outputs of the first digital controlled oscillator and the second digital controlled oscillator, and a decoder is utilized to output a control signal, based on the skew, to modify a frequency of the first digital controlled oscillator using a switched capacitor array to reduce or eliminate the skew.

Abstract: An ultra-low-power receiver includes a low-noise amplifier configured to receive an input analog signal and generate an amplified signal and a mixer electrically coupled to the low-noise amplifier. The mixer is configured to convert said amplified signal into an intermediate frequency signal. A progressively reduced intermediate frequency filter is configured to process the intermediate frequency signal from the mixer in discrete time.

Abstract: Interposer and semiconductor package embodiments provide for the isolation and suppression of electronic noise such as EM emissions in the semiconductor package. The interposer includes shield structures in various embodiments, the shield structures blocking the electrical noise from the noise source, from other electrical signals or devices. The shields include solid structures and some embodiments and decoupling capacitors in other embodiments. The coupling structures includes multiple rows of solder balls included in strips that couple the components and surround and contain the source of electrical noise.

Abstract: An ultra-low-power receiver includes a low-noise amplifier configured to receive an input analog signal and generate an amplified signal and a mixer electrically coupled to the low-noise amplifier. The mixer is configured to convert said amplified signal into an intermediate frequency signal. A progressively reduced intermediate frequency filter is configured to process the intermediate frequency signal from the mixer in discrete time.

Abstract: An ADPLL circuit includes a time-to-digital converter (TDC) configured to generate a signal indicative of a phase difference between a first signal and a reference signal and a doubler electrically coupled to the TDC. The doubler is configured to receive a first voltage signal and generate a second voltage signal. The second voltage signal is provided to a voltage input of the TDC. The TDC is configured to generate one or more control signals for the doubler to adjust the second voltage signal.

Abstract: A circuit includes a coupling structure and a first inductive device. The coupling structure includes two or more conductive loops and a set of conductive paths electrically connecting the two or more conductive loops. The first inductive device is magnetically coupled with a first conductive loop of the two or more conductive loops.

Abstract: An integrated circuit (IC) includes a first circuit layer that includes a first wireless power transfer (WPT) device, a first chip electrically connected to the first circuit layer, and a first tracking circuit disposed in the first chip. The first WPT device may be configured to extract energy from an electromagnetic signal and provide an output voltage. The first tracking circuit may be powered by the output voltage of the first WPT device and may output tracking data in response to an instruction extracted from the electromagnetic signal.

Abstract: An electro-optic (EO) phase modulator is disclosed. The EO phase modulator includes: an insulating layer; a central optical waveguide over the insulating layer; a first region having a first type doping adjacent to a first sidewall of the central optical waveguide; a second region having a second type doping opposite to the first type doping adjacent to a second sidewall of the central optical waveguide opposite to the first sidewall; and a first dielectric layer passing through the central optical waveguide from a top surface of the central optical waveguide to a bottom surface of the central optical waveguide. A method of manufacturing the same is disclosed as well.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a substrate having a first side and a second side opposite to the first side; an interconnect structure disposed on the first side, the interconnect structure including a dielectric layer, and a first conductive member and a second conductive member within the dielectric layer; a waveguide disposed between the first conductive member and the second conductive member within the dielectric layer, the waveguide including a first waveguide layer, a second waveguide layer and an adhesive layer between the first waveguide layer and the second waveguide layer; a first die disposed at the first side and over the interconnect structure and electrically connected to the first conductive member; and a second die disposed at the first side and over the interconnect structure and electrically connected to the second conductive member. An associated method for fabricating the same is also disclosed.

Abstract: An electro-optic (EO) phase modulator is disclosed. The EO phase modulator includes: an insulating layer; a central optical waveguide over the insulating layer; a first region having a first type doping adjacent to a first sidewall of the central optical waveguide; a second region having a second type doping opposite to the first type doping adjacent to a second sidewall of the central optical waveguide opposite to the first sidewall; and a first dielectric layer passing through the central optical waveguide from a top surface of the central optical waveguide to a bottom surface of the central optical waveguide. A method of manufacturing the same is disclosed as well.