Patents by Inventor Huan Yu

Huan Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230055668
    Abstract: A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first nitride semiconductor layer between the active region and the electron blocking structure, and including indium and aluminum elements; and a second nitride semiconductor layer between the electron blocking structure and the second semiconductor layer, including indium element and devoid of gallium element; wherein the first nitride semiconductor layer has a first indium content, the second nitride semiconductor layer has a second indium content, and the first indium content is greater than the second indium content.
    Type: Application
    Filed: November 3, 2022
    Publication date: February 23, 2023
    Applicant: EPISTAR CORPORATION
    Inventors: Huan-Yu LAI, Li-Chi PENG
  • Patent number: 11522102
    Abstract: A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first Group III-V semiconductor layer between the active region and the electron blocking structure; and a second Group III-V semiconductor layer between the electron blocking structure and the second semiconductor layer; wherein the first Group III-V semiconductor layer and the second Group III-V semiconductor layer each includes indium, aluminum and gallium, the first Group III-V semiconductor layer has a first indium content, the second Group III-V semiconductor layer has a second indium content, and the second indium content is less than the first indium content.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: December 6, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Huan-Yu Lai, Li-Chi Peng
  • Publication number: 20220367376
    Abstract: A method includes forming an insulating layer over a conductive feature; etching the insulating layer to expose a first surface of the conductive feature; covering the first surface of the conductive feature with a sacrificial material, wherein the sidewalls of the insulating layer are free of the sacrificial material; covering the sidewalls of the insulating layer with a barrier material, wherein the first surface of the conductive feature is free of the barrier material, wherein the barrier material includes tantalum nitride (TaN) doped with a transition metal; removing the sacrificial material; and covering the barrier material and the first surface of the conductive feature with a conductive material.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 17, 2022
    Inventors: Chia-Pang Kuo, Huan-Yu Shih, Wen-Hsuan Chen, Cheng-Lun Tsai, Ya-Lien Lee, Cheng-Hui Weng, Chun-Chieh Lin, Hung-Wen Su, Yao-Min Liu
  • Patent number: 11469602
    Abstract: A control circuit module and a control method thereof are provided. The method includes enabling a first discharge circuit by a controller, instructing a first battery cell of a battery module to operate in a ship mode, and disabling the first discharge circuit.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: October 11, 2022
    Assignee: GETAC TECHNOLOGY CORPORATION
    Inventor: Wen-huan Yu
  • Patent number: 11349045
    Abstract: A light emitting diode device with flip-chip structure includes a transparent protective substrate, a transparent conductor layer, a glue layer, a group III-V stack layer, a first conductivity metal electrode, a second conductivity metal electrode and an insulating layer. The transparent conductor layer is formed on the transparent protective substrate. The glue layer bonds the transparent protective substrate and the transparent conductor layer. The group III-V stack layer and the first conductivity metal electrode are respectively formed on a first portion and a second portion of the transparent conductor layer. The second conductivity metal electrode is formed on a portion of the group III-V stack layer. The insulating layer covers exposed portions of the transparent conductor layer and the group III-V stack layer, and the insulating layer further covers portions of the first and second conductivity metal electrodes, so as to expose the first and second conductivity metal electrodes.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: May 31, 2022
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Ray-Hua Horng, Ken-Yen Chen, Huan-Yu Chien
  • Publication number: 20220050374
    Abstract: A protective film with high hardness and low friction coefficient includes an interface layer, a buffer layer, and a high-hardness passivation layer. The protective film has good wear resistance and low friction coefficient and can be applied to a mask package box for photolithography such as a deep ultraviolet (DUV) lithography, an extreme ultraviolet (EUV) lithography, an immersion lithography and a multiple patterning lithography of the photovoltaic and semiconductor industries. The protective film is used to protect the mask package box applied for photolithographic exposure and ensure the yield of the photolithographic process.
    Type: Application
    Filed: November 26, 2020
    Publication date: February 17, 2022
    Applicant: Feedback Technology Corp.
    Inventors: Tsung Feng Wu, Yu Yen Tsai, Wen-Lian Lee, Hui Huan Yu, Kuan Ting Chou
  • Publication number: 20210391275
    Abstract: A method includes forming an insulating layer over a conductive feature; etching the insulating layer to expose a first surface of the conductive feature; covering the first surface of the conductive feature with a sacrificial material, wherein the sidewalls of the insulating layer are free of the sacrificial material; covering the sidewalls of the insulating layer with a barrier material, wherein the first surface of the conductive feature is free of the barrier material, wherein the barrier material includes tantalum nitride (TaN) doped with a transition metal; removing the sacrificial material; and covering the barrier material and the first surface of the conductive feature with a conductive material.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 16, 2021
    Inventors: Chia-Pang Kuo, Huan-Yu Shih, Wen-Hsuan Chen, Cheng-Lun Tsai, Ya-Lien Lee, Cheng-Hui Weng, Chun-Chieh Lin, Hung-Wen Su, Yao-Min Liu
  • Publication number: 20210359158
    Abstract: A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first Group III-V semiconductor layer between the active region and the electron blocking structure; and a second Group III-V semiconductor layer between the electron blocking structure and the second semiconductor layer; wherein the first Group III-V semiconductor layer and the second Group III-V semiconductor layer each includes indium, aluminum and gallium, the first Group III-V semiconductor layer has a first indium content, the second Group III-V semiconductor layer has a second indium content, and the second indium content is less than the first indium content.
    Type: Application
    Filed: January 15, 2021
    Publication date: November 18, 2021
    Inventors: Huan-Yu LAI, Li-Chi PENG
  • Publication number: 20210118393
    Abstract: Particular embodiments described herein provide for an electronic device that includes a display and is configured to enable a low power display refresh during a semi-active workload. The electronic device can include a display engine and a display panel and a frame is used by the display panel to generate an image on a display backplane. The display panel includes the display backplane, a plurality of row drivers, a plurality of column drivers, and a timing controller. The timing controller can receive a partial update to a frame being displayed as an image on the display backplane and update the image displayed on the display backplane by activating row drivers and a subset of the plurality of available column drivers, wherein the subset is based on the update.
    Type: Application
    Filed: December 26, 2020
    Publication date: April 22, 2021
    Applicant: Intel Corporation
    Inventors: Seh Kwa, Huan Yu, Partha Robert Choudhury
  • Patent number: 10910518
    Abstract: A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first In-containing layer between the active region and the electron blocking structure; and a second In-containing layer between the electron blocking structure and the second semiconductor layer; wherein the first In-containing layer and the second In-containing layer each includes indium, aluminum and gallium, the first In-containing layer has a first aluminum content, the second In-containing layer has a second aluminum content, and the second aluminum content is less than the first aluminum content.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: February 2, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Huan-Yu Lai, Li-Chi Peng
  • Publication number: 20200409372
    Abstract: This application discloses a data fusion method and a related device. The method includes: obtaining vehicle sensing data, where the vehicle sensing data is obtained by a vehicle sensing apparatus by sensing a road environment in a sensing range by using a vehicle sensor; obtaining roadside sensing data, where the roadside sensing data is obtained by a roadside sensing apparatus by sensing a road environment in a sensing range by using a roadside sensor; and fusing the vehicle sensing data and the roadside sensing data by using a fusion formula, to obtain a first fusion result. According to the foregoing solution, overlapping can be implemented between the sensing range of the roadside sensing apparatus and the sensing range of the vehicle sensing apparatus can be implemented, so that the sensing range is effectively extended.
    Type: Application
    Filed: September 15, 2020
    Publication date: December 31, 2020
    Inventors: Huan YU, Xiao YANG, Yonggang SONG
  • Patent number: 10865909
    Abstract: A vacuum-keeping multistage vacuum-generating and vacuum-destructing valve includes a main body, which includes an introduction port, a vacuum port, a discharge port, and a vacuum-generating valve, in combination with a vacuum-destructing valve. The vacuum-destructing valve is arranged in combination with a flow conducting passage formed in the main body and connected to the vacuum port to allow a pressure fluid received through the introduction port to partly flow through the vacuum-destructing valve, and a vacuum-destructing two-port two-position valve is arranged in the flow conducting passage to increase flow rate of the pressure fluid passing therethrough to make a response of the vacuum port more sensitive in switching to a vacuum-destructing state. The ports of the main body are arranged in a detachable manner to increase service efficiency and ease part replacement. Two side seats are arranged to couple multiple such main bodies together to cope with complicated automatic processing operations.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: December 15, 2020
    Assignee: TAIWAN CHELIC CO., LTD.
    Inventors: Ping-Cheng Yu, Wei-Huan Yu
  • Publication number: 20200350463
    Abstract: A light emitting diode device with flip-chip structure includes a transparent protective substrate, a transparent conductor layer, a glue layer, a group III-V stack layer, a first conductivity metal electrode, a second conductivity metal electrode and an insulating layer. The transparent conductor layer is formed on the transparent protective substrate. The glue layer bonds the transparent protective substrate and the transparent conductor layer. The group III-V stack layer and the first conductivity metal electrode are respectively formed on a first portion and a second portion of the transparent conductor layer. The second conductivity metal electrode is formed on a portion of the group III-V stack layer. The insulating layer covers exposed portions of the transparent conductor layer and the group III-V stack layer, and the insulating layer further covers portions of the first and second conductivity metal electrodes, so as to expose the first and second conductivity metal electrodes.
    Type: Application
    Filed: July 22, 2020
    Publication date: November 5, 2020
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Ray-Hua HORNG, Ken-Yen CHEN, Huan-Yu CHIEN
  • Patent number: 10770617
    Abstract: A light emitting diode device with flip-chip structure includes a transparent protective substrate, a transparent conductor layer, a glue layer, a group III-V stack layer, a first conductivity metal electrode, a second conductivity metal electrode and an insulating layer. The transparent conductor layer is formed on the transparent protective substrate. The glue layer bonds the transparent protective substrate and the transparent conductor layer. The group III-V stack layer and the first conductivity metal electrode are respectively formed on a first portion and a second portion of the transparent conductor layer. The second conductivity metal electrode is formed on a portion of the group III-V stack layer. The insulating layer covers exposed portions of the transparent conductor layer and the group III-V stack layer, and the insulating layer further covers portions of the first and second conductivity metal electrodes, so as to expose the first and second conductivity metal electrodes.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: September 8, 2020
    Assignee: National Chiao Tung University
    Inventors: Ray-Hua Horng, Ken-Yen Chen, Huan-Yu Chien
  • Publication number: 20200274028
    Abstract: A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first In-containing layer between the active region and the electron blocking structure; and a second In-containing layer between the electron blocking structure and the second semiconductor layer; wherein the first In-containing layer and the second In-containing layer each includes indium, aluminum and gallium, the first In-containing layer has a first aluminum content, the second In-containing layer has a second aluminum content, and the second aluminum content is less than the first aluminum content.
    Type: Application
    Filed: May 13, 2020
    Publication date: August 27, 2020
    Inventors: Huan-Yu LAI, Li-Chi PENG
  • Patent number: D892334
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: August 4, 2020
    Assignee: SHENZHEN XPECTVISION TECHNOLOGY CO., LTD.
    Inventors: Zhuoting Ye, Huan Yu
  • Patent number: D893726
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: August 18, 2020
    Assignee: SHENZHEN XPECTVISION TECHNOLOGY CO., LTD.
    Inventors: Zhuoting Ye, Huan Yu
  • Patent number: D924492
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: July 6, 2021
    Inventor: Huan Yu
  • Patent number: D924493
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: July 6, 2021
    Assignee: Shanghai Dijie Industrial Co., Ltd.
    Inventor: Huan Yu
  • Patent number: D945558
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: March 8, 2022
    Inventor: Huan Yu