Patents by Inventor Hugh E. Stroupe

Hugh E. Stroupe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6518172
    Abstract: A method of manufacturing semiconductor devices using an improved planarization processes for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer using a fixed resilient flexible material member contacting the wafer.
    Type: Grant
    Filed: August 29, 2000
    Date of Patent: February 11, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Guy T. Blalock, Hugh E. Stroupe, Lynn J. Carroll
  • Patent number: 6506679
    Abstract: A method of manufacturing semiconductor devices using an improved planarization process for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer using a fixed flexible planar interface material contacting the deformable material.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: January 14, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Guy T. Blalock, Hugh E. Stroupe, Brian F. Gordon
  • Publication number: 20030008508
    Abstract: A method of manufacturing semiconductor devices using an improved planarization process for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer using a fixed flexible planar interface material contacting the deformable material.
    Type: Application
    Filed: August 27, 2002
    Publication date: January 9, 2003
    Inventors: Guy T. Blalock, Hugh E. Stroupe, Brian F. Gordon
  • Publication number: 20020187650
    Abstract: In connection with wafer planarization, an apparatus for forming a layer of material having a substantially uniform thickness and substantially parallel first and second major surfaces includes a pair of pressing elements and a stop. Each of the pair of pressing elements has a flat pressing surface. The pressing surfaces are opposed to one another and operable to compress a quantity of the material therebetween. The stop is positioned at least partially between the pressing surfaces and has a thickness substantially equal to the desired uniform thickness of the layer. The stop is positioned to establish a spacing between the flat pressing surfaces that is substantially equal to the thickness of the stop and thereby to the desired uniform thickness of the layer when the pressing elements engage the stop.
    Type: Application
    Filed: May 28, 2002
    Publication date: December 12, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Guy T. Blalock, Hugh E. Stroupe, Brian F. Gordon
  • Publication number: 20020180009
    Abstract: A semiconductor die assembly comprising a semiconductor die with bond pads, a plurality of leads which extend across the semiconductor die and terminate over their respective bond pads, and an alpha barrier preferably positioned between the leads and the semiconductor die. Electrical connection is made between the leads and their respective bond pads by a strip of anisotropically conductive elastomeric material, preferably a multi-layer laminate consisting of alternating parallel sheets of a conductive foil and an insulating elastomer wherein the laminate layers are oriented perpendicular to both the bond pad and the lead, positioned between the leads and the bond pads. A burn-in die according to the present invention is also disclosed.
    Type: Application
    Filed: July 25, 2002
    Publication date: December 5, 2002
    Inventor: Hugh E. Stroupe
  • Patent number: 6472725
    Abstract: A semiconductor die assembly comprising a semiconductor die with bond pads, a plurality of leads which extend across the semiconductor die and terminate over their respective bond pads, and an alpha barrier preferably positioned between the leads and the semiconductor die. Electrical connection is made between the leads and their respective bond pads by a strip of anisotropically conductive elastomeric material, preferably a multilayer laminate consisting of alternating parallel sheets of a conductive foil and an insulating elastomer wherein the laminate layers are oriented perpendicular to both the bond pad and the lead, positioned between the leads and the bond pads. A burn-in die according to the present invention is also disclosed.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: October 29, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Hugh E. Stroupe
  • Publication number: 20020144720
    Abstract: A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon.
    Type: Application
    Filed: May 24, 2002
    Publication date: October 10, 2002
    Inventors: Russell C. Zahorik, Guy F. Hudson, Hugh E. Stroupe, Todd A. Dobson, Brian F. Gordon, Renee Zahorik
  • Publication number: 20020106899
    Abstract: A method of manufacturing semiconductor devices using an improved planarization process for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer using a fixed resilient flexible material member contacting the wafer.
    Type: Application
    Filed: March 12, 2002
    Publication date: August 8, 2002
    Inventors: Guy T. Blalock, Hugh E. Stroupe, Lynn J. Carroll
  • Patent number: 6429146
    Abstract: In connection with wafer planarization, an apparatus for forming a layer of material having a substantially uniform thickness and substantially parallel first and second major surfaces includes a pair of pressing elements and a stop. Each of the pair of pressing elements has a flat pressing surface. The pressing surfaces are opposed to one another and operable to compress a quantity of the material therebetween. The stop is positioned at least partially between the pressing surfaces and has a thickness substantially equal to the desired uniform thickness of the layer. The stop is positioned to establish a spacing between the flat pressing surfaces that is substantially equal to the thickness of the stop and thereby to the desired uniform thickness of the layer when the pressing elements engage the stop.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: August 6, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Guy T. Blalock, Hugh E. Stroupe, Brian F. Gordon
  • Patent number: 6410459
    Abstract: In connection with wafer planarization, an apparatus for forming a layer of material having a substantially uniform thickness and substantially parallel first and second major surfaces includes a pair of pressing elements and a stop. Each of the pair of pressing elements has a flat pressing surface. The pressing surfaces are opposed to one another and operable to compress a quantity of the material therebetween. The stop is positioned at least partially between the pressing surfaces and has a thickness substantially equal to the desired uniform thickness of the layer. The stop is positioned to establish a spacing between the flat pressing surfaces that is substantially equal to the thickness of the stop and thereby to the desired uniform thickness of the layer when the pressing elements engage the stop.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: June 25, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Guy T. Blalock, Hugh E. Stroupe, Brian F. Gordon
  • Publication number: 20020047117
    Abstract: A semiconductor die assembly comprising a semiconductor die with bond pads, a plurality of leads which extend across the semiconductor die and terminate over their respective bond pads, and an alpha barrier preferably positioned between the leads and the semiconductor die. Electrical connection is made between the leads and their respective bond pads by a strip of anisotropically conductive elastomeric material, preferably a multi-layer laminate consisting of alternating parallel sheets of a conductive foil and an insulating elastomer wherein the laminate layers are oriented perpendicular to both the bond pad and the lead, positioned between the leads and the bond pads. A burn-in die according to the present invention is also disclosed.
    Type: Application
    Filed: August 30, 2001
    Publication date: April 25, 2002
    Inventor: Hugh E. Stroupe
  • Publication number: 20020025687
    Abstract: A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon.
    Type: Application
    Filed: August 30, 2001
    Publication date: February 28, 2002
    Inventors: Russell C. Zahorik, Guy F. Hudson, Hugh E. Stroupe, Todd A. Dobson, Brian F. Gordon
  • Publication number: 20020015753
    Abstract: In connection with wafer planarization, an apparatus for forming a layer of material having a substantially uniform thickness and substantially parallel first and second major surfaces includes a pair of pressing elements and a stop. Each of the pair of pressing elements has a flat pressing surface. The pressing surfaces are opposed to one another and operable to compress a quantity of the material therebetween. The stop is positioned at least partially between the pressing surfaces and has a thickness substantially equal to the desired uniform thickness of the layer. The stop is positioned to establish a spacing between the flat pressing surfaces that is substantially equal to the thickness of the stop and thereby to the desired uniform thickness of the layer when the pressing elements engage the stop.
    Type: Application
    Filed: August 14, 2001
    Publication date: February 7, 2002
    Applicant: Micron Technology Inc.
    Inventors: Guy T. Blalock, Hugh E. Stroupe, Brian F. Gordon
  • Publication number: 20020009825
    Abstract: A method of manufacturing semiconductor devices using an improved planarization process for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer using a fixed flexible planar interface material contacting the deformable material.
    Type: Application
    Filed: August 29, 2001
    Publication date: January 24, 2002
    Inventors: Guy T. Blalock, Hugh E. Stroupe, Brian F. Gordon
  • Publication number: 20020005260
    Abstract: In connection with wafer planarization, an apparatus for forming a layer of material having a substantially uniform thickness and substantially parallel first and second major surfaces includes a pair of pressing elements and a stop. Each of the pair of pressing elements has a flat pressing surface. The pressing surfaces are opposed to one another and operable to compress a quantity of the material therebetween. The stop is positioned at least partially between the pressing surfaces and has a thickness substantially equal to the desired uniform thickness of the layer. The stop is positioned to establish a spacing between the flat pressing surfaces that is substantially equal to the thickness of the stop and thereby to the desired uniform thickness of the layer when the pressing elements engage the stop.
    Type: Application
    Filed: August 14, 2001
    Publication date: January 17, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Guy T. Blalock, Hugh E. Stroupe, Brian F. Gordon
  • Publication number: 20010055686
    Abstract: In connection with wafer planarization, an apparatus for forming a layer of material having a substantially uniform thickness and substantially parallel first and second major surfaces includes a pair of pressing elements and a stop. Each of the pair of pressing elements has a flat pressing surface. The pressing surfaces are opposed to one another and operable to compress a quantity of the material therebetween. The stop is positioned at least partially between the pressing surfaces and has a thickness substantially equal to the desired uniform thickness of the layer. The stop is positioned to establish a spacing between the flat pressing surfaces that is substantially equal to the thickness of the stop and thereby to the desired uniform thickness of the layer when the pressing elements engage the stop.
    Type: Application
    Filed: August 14, 2001
    Publication date: December 27, 2001
    Applicant: Micron Technology, Inc.
    Inventors: Guy T. Blalock, Hugh E. Stroupe, Brian F. Gordon
  • Publication number: 20010053446
    Abstract: In connection with wafer planarization, an apparatus for forming a layer of material having a substantially uniform thickness and substantially parallel first and second major surfaces includes a pair of pressing elements and a stop. Each of the pair of pressing elements has a flat pressing surface. The pressing surfaces are opposed to one another and operable to compress a quantity of the material therebetween. The stop is positioned at least partially between the pressing surfaces and has a thickness substantially equal to the desired uniform thickness of the layer. The stop is positioned to establish a spacing between the flat pressing surfaces that is substantially equal to the thickness of the stop and thereby to the desired uniform thickness of the layer when the pressing elements engage the stop.
    Type: Application
    Filed: August 14, 2001
    Publication date: December 20, 2001
    Applicant: Micron Technology, Inc.
    Inventors: Guy T. Blalock, Hugh E. Stroupe, Brian F. Gordon
  • Patent number: 6329301
    Abstract: A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon. The process comprising the steps of aligning said area of said wafer, such as an alignment mark on the wafer, to an etchant dispensing apparatus, placing the surface of the wafer adjacent at least a portion of an annular portion of the etchant dispensing apparatus, dispensing at least one etchant onto said area of said wafer, such as an alignment mark, and removing the at least one etching from the wafer.
    Type: Grant
    Filed: August 14, 2000
    Date of Patent: December 11, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Russell C. Zahorik, Guy F. Hudson, Hugh E. Stroupe, Todd A. Dobson, Brian F. Gordon
  • Patent number: 6316363
    Abstract: A method of manufacturing semiconductor devices using an improved planarization processes for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer using a fixed flexible planar interface material contacting the deformable coating.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: November 13, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Guy T. Blalock, Hugh E. Stroupe, Brian F. Gordon
  • Patent number: 6309913
    Abstract: A semiconductor die assembly comprising a semiconductor die with bond pads, a plurality of leads which extends across the semiconductor die and terminates over its respective bond pads, and an alpha barrier preferably positioned between the leads and the semiconductor die. Electrical connection is made between the leads and their respective bond pads by a strip of anisotropically conductive elastomeric material, preferably a multi-layer laminate consisting of alternating parallel sheets of a conductive foil and an insulating elastomer wherein the laminate layers are oriented perpendicular to both the bond pad and the lead, positioned between the leads and the bond pads. A burn-in die according to the present invention is also disclosed.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: October 30, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Hugh E. Stroupe