Patents by Inventor Hui-Chi Huang

Hui-Chi Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9305851
    Abstract: Systems and methods are provided for performing chemical-mechanical planarization on an article. An example system for performing chemical-mechanical planarization on an article includes a polishing head configured to perform a chemical-mechanical planarization (CMP) on an article, a polishing pad configured to support the article, a light source configured to emit an incident light, a polishing fluid including a plurality of emitter particles capable of emitting a fluorescent light in response to the incident light, a fluorescence light detector configured to detect the fluorescent light, and at least one processor configured to control the polishing head based on the detected fluorescent light.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: April 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: I-Shuo Liu, Hui-Chi Huang, Jung-Tsan Tsai, Chien-Ping Lee
  • Publication number: 20150147883
    Abstract: A method of performing a post Chemical Mechanical Polish (CMP) cleaning includes picking up the wafer, spinning a cleaning solution contained in a cleaning tank, and submerging the wafer into the cleaning solution, with the cleaning solution being spun when the wafer is in the cleaning solution. After the submerging the wafer into the cleaning solution, the wafer is retrieved out of the cleaning solution.
    Type: Application
    Filed: November 22, 2013
    Publication date: May 28, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Hui-Chi Huang
  • Publication number: 20150140691
    Abstract: Systems and methods are provided for performing chemical-mechanical planarization on an article. An example system for performing chemical-mechanical planarization on an article includes a polishing head configured to perform a chemical-mechanical planarization (CMP) on an article, a polishing pad configured to support the article, a light source configured to emit an incident light, a polishing fluid including a plurality of emitter particles capable of emitting a fluorescent light in response to the incident light, a fluorescence light detector configured to detect the fluorescent light, and at least one processor configured to control the polishing head based on the detected fluorescent light.
    Type: Application
    Filed: November 19, 2013
    Publication date: May 21, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: I-SHUO LIU, HUI-CHI HUANG, JUNG-TSAN TSAI, CHIEN-PING LEE
  • Publication number: 20150140818
    Abstract: The present disclosure provides a cleaning unit for a chemical mechanical polishing (CMP) process. The cleaning unit comprises a cleaning solution; a brush configured to scrub a wafer during the CMP process; and a spray nozzle configured to apply the cleaning solution to the wafer when the brush scrubs the wafer during the CMP process. In some embodiments, the spray nozzle includes an inlet where the cleaning solution enters the spray nozzle and an outlet where the cleaning solution exits the spray nozzle. In some embodiments, an inlet area (A0) is different from an outlet area (A1).
    Type: Application
    Filed: November 15, 2013
    Publication date: May 21, 2015
    Inventors: Chien-Ping Lee, Hui-Chi Huang
  • Patent number: 8969922
    Abstract: A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a semiconductor substrate including a first device disposed in a first device region, the first device including a first gate structure, first gate spacers formed on the sidewalls of the first gate structure, and first source and drain features and a second device disposed in a second device region, the second device including a second gate structure, second gate spacers formed on the sidewalls of the second gate structure, and second source and drain features. The semiconductor device further includes a contact etch stop layer (CESL) disposed on the first and second gate spacers and interconnect structures disposed on the first and second source and drain features. The interconnect structures are in electrical contact with the first and second source and drain features and in contact with the CESL.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: March 3, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chu Liu, Kuei Shun Chen, Mu-Chi Chiang, Yao-Kwang Wu, Bi-Fen Wu, Huan-Just Lin, Hsiao-Tzu Lu, Hui-Chi Huang
  • Publication number: 20130200461
    Abstract: A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a semiconductor substrate including a first device disposed in a first device region, the first device including a first gate structure, first gate spacers formed on the sidewalls of the first gate structure, and first source and drain features and a second device disposed in a second device region, the second device including a second gate structure, second gate spacers formed on the sidewalls of the second gate structure, and second source and drain features. The semiconductor device further includes a contact etch stop layer (CESL) disposed on the first and second gate spacers and interconnect structures disposed on the first and second source and drain features. The interconnect structures are in electrical contact with the first and second source and drain features and in contact with the CESL.
    Type: Application
    Filed: February 8, 2012
    Publication date: August 8, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Chu Liu, Kuei Shun Chen, Mu-Chi Chiang, Yao-Kwang Wu, Bi-Fen Wu, Huan-Just Lin, Hsiao-Tzu Lu, Hui-Chi Huang
  • Patent number: 8367429
    Abstract: The present disclosure provides a semiconductor manufacturing method. The method includes defining a plurality of time regions of pad life for a polishing pad in a chemical mechanical polishing (CMP) system; assigning a ladder coefficient to the polishing pad according to the plurality of time regions of pad life; defining a plurality of endpoint windows to the plurality of time regions, respectively, according to pad life effect; applying a CMP process to a wafer positioned on the polishing pad; determining a time region of a polishing signal of the wafer based on the ladder coefficient; associating one of the endpoint windows to the polishing signal according to the time region; and ending the CMP process at an endpoint determined by the endpoint window.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: February 5, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chu-An Lee, Hui-Chi Huang, Peng-Chung Jangjian
  • Publication number: 20120231555
    Abstract: The present disclosure provides a semiconductor manufacturing method. The method includes defining a plurality of time regions of pad life for a polishing pad in a chemical mechanical polishing (CMP) system; assigning a ladder coefficient to the polishing pad according to the plurality of time regions of pad life; defining a plurality of endpoint windows to the plurality of time regions, respectively, according to pad life effect; applying a CMP process to a wafer positioned on the polishing pad; determining a time region of a polishing signal of the wafer based on the ladder coefficient; associating one of the endpoint windows to the polishing signal according to the time region; and ending the CMP process at an endpoint determined by the endpoint window.
    Type: Application
    Filed: March 10, 2011
    Publication date: September 13, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chu-An Lee, Hui-Chi Huang, Peng-Chung Jangjian
  • Publication number: 20110215011
    Abstract: A retaining structure with double-face carrier function includes a carrier unit, an elastic unit and a retaining unit. The carrier unit has a carrier body and a through hole passing through the carrier body. The elastic unit has a plurality of elastic arms extended from an inner surface of the through hole. The retaining unit has a plurality of retaining elements passing through the through hole. Each retaining element has a retaining portion connected to at least two of the elastic arms and extended above and under the through hole, a pressing portion extended inwards from one end of the retaining portion and at least one protrusion portion disposed on an outer surface of the retaining portion and adjacent to the pressing portion. The pressing portions above the through hole are arranged alternately and the pressing portions under the through hole are arranged alternately.
    Type: Application
    Filed: March 4, 2010
    Publication date: September 8, 2011
    Inventors: CHIN-CHI CHANG, HSUN-CHENG CHAN, HUI-CHI HUANG
  • Publication number: 20080017534
    Abstract: A multiple optical disc storage case includes a upper cover, a lower supporting plate, an outer fastener, and a plurality of inner hooks. The upper cover is hollow, and the lower supporting plate is used to assemble with the upper cover. The outer fastener is positioned at one of the upper cover and a lower supporting plate, and has at least one outer hook, at least one stop block and a plurality of resilient block. The outer hooks and the stop blocks are positioned at one side of the outer fastener, and the resilient blocks are equally separated and positioned at the other side of the outer fastener. The outer fastener also has a plurality of inner hooks positioned at the other of the upper case and the lower supporting plate so that the inner hooks are hooked up with the outer hooks.
    Type: Application
    Filed: July 19, 2006
    Publication date: January 24, 2008
    Inventors: Ming-Chien Lo, Chin-Chi Chang, Hsun-Cheng Chan, Hui-Chi Huang
  • Publication number: 20070158218
    Abstract: A disc box structure according to the present invention includes a shell and an auxiliary support. The shell has a base, and a stand protruding upwardly from the base for accommodating a disc. The auxiliary support includes a pivot connected to the base, a lateral arm arranged to a side of the pivot, a pressing portion disposed over the lateral arm, and a stand connected to an opposite side of the pivot. Therefore, the pressing portion is pressed down to release the disc in order to lift the auxiliary support upwards, so that the disc is raised for easy removal.
    Type: Application
    Filed: January 12, 2006
    Publication date: July 12, 2007
    Inventors: Hsun-Cheng Chan, Chin-Chi Chang, Ming-Chien Lo, Hui-Chi Huang