Patents by Inventor Hui Mei
Hui Mei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170084465Abstract: A method of fabricating a memory device is described. Generally, the method includes forming a channel from a semiconducting material overlying a surface of a substrate, and forming dielectric stack on the channel. A first cap layer is formed over the dielectric stack, and a second cap layer including a nitride formed over the first cap layer. The first and second cap layers and the dielectric stack are then patterned to form a gate stack of a device. The second cap layer is removed and an oxidation process performed to form a blocking oxide over the dielectric stack, wherein the oxidation process consumes the first cap layer. Other embodiments are also described.Type: ApplicationFiled: October 26, 2016Publication date: March 23, 2017Inventors: Krishnaswamy Ramkumar, Hui-Mei Shih
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Patent number: 9496144Abstract: A method of fabricating a memory device is described. Generally, the method includes: forming on a surface of a substrate a dielectric stack including a tunneling dielectric and a charge-trapping layer overlying the tunneling dielectric; depositing a first cap layer comprising an oxide over the dielectric stack; forming a second cap layer comprising a nitride over the first cap layer; patterning the first and second cap layers and the dielectric stack to form a gate stack of a memory device; removing the second cap layer; and performing an oxidation process to form a blocking oxide over the charge-trapping layer, wherein the oxidation process consumes the first cap layer. Other embodiments are also described.Type: GrantFiled: March 31, 2015Date of Patent: November 15, 2016Assignee: Cypress Semiconductor CorporationInventors: Krishnaswamy Ramkumar, Hui-Mei Shih
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Patent number: 9368387Abstract: A method of forming a shallow trench isolation (STI) structure in a substrate includes forming a pad oxide layer over the substrate. The method includes forming a nitride-containing layer over the pad oxide layer, wherein the nitride-containing layer has a first thickness. The method further includes forming the STI structure extending through the nitride-containing layer, into the substrate. The STI structure has a height above a top surface of the pad oxide layer. The method includes establishing a correlation between the first thickness, the height of the STI structure above the top surface of the pad oxide layer, and an offset between the first thickness and the height of the STI structure above the top surface of the pad oxide layer. The method includes calculating the height of the STI structure above the pad oxide layer based on the correlation, and selectively removing a determined thickness of the STI structure.Type: GrantFiled: September 18, 2015Date of Patent: June 14, 2016Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Tai-Yung Yu, Hui Mei Jao, Jin-Lin Liang, Chien-Hua Li, Cheng-Long Tao, Shian Wei Mao, Chien-Chang Fang
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Patent number: 9309127Abstract: A reagent is provided for removing mercury (Hg). The reagent contains metal carbonates compound with layers structure. The contents of metals of reagent can be adjusted using this method. The reagent can be manufactured with kilogram grade per batch. The common ions, like Mg, Ca, Mn, Fe, Co, Ni, Cu, Zn, etc., can be contained in the reagent. The manufacture method provides a low-cost way for the Hg sorbent and the content ratio of metal oxides can be higher than 50 wt %. The manufacture is operated at a temperature more than 200° C. and can be integrated with existing technology such as denitration catalysts in industry for removing Hg. In another word, the present invention fabricates a mercury-removing reagent of metal-M/aluminum carbonates (M-Al—CO3), which can be potentially combined with commercially selective catalytic reduction (SCR) catalysts for developing medium-high-temperature mercury-removing reagent with mercury-removing efficiency further enhanced.Type: GrantFiled: August 4, 2014Date of Patent: April 12, 2016Assignee: INSTITUTE OF NUCLEAR ENERGY RESEARCH, ATOMIC ENERGY COUNCIL, Executive Yuan, R.O.C.Inventors: Ching-Tsung Yu, Han Wen Cheng, Hui-Mei Lin, Shu-San Hsiau
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Publication number: 20160031717Abstract: A reagent is provided for removing mercury (Hg). The reagent contains metal carbonates compound with layers structure. The contents of metals of reagent can be adjusted using this method. The reagent can be manufactured with kilogram grade per batch. The common ions, like Mg, Ca, Mn, Fe, Co, Ni, Cu, Zn, etc., can be contained in the reagent. The manufacture method provides a low-cost way for the Hg sorbent and the content ratio of metal oxides can be higher than 50 wt %. The manufacture is operated at a temperature more than 200° C. and can be integrated with existing technology such as denitration catalysts in industry for removing Hg. In another word, the present invention fabricates a mercury-removing reagent of metal-M/aluminum carbonates (M-Al—CO3), which can be potentially combined with commercially selective catalytic reduction (SCR) catalysts for developing medium-high-temperature mercury-removing reagent with mercury-removing efficiency further enhanced.Type: ApplicationFiled: August 4, 2014Publication date: February 4, 2016Inventors: Ching-Tsung Yu, Han Wen Cheng, Hui-Mei Lin, Shu-San Hsiau
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Publication number: 20160005610Abstract: A method of fabricating a memory device is described. Generally, the method includes: forming on a surface of a substrate a dielectric stack including a tunneling dielectric and a charge-trapping layer overlying the tunneling dielectric; depositing a first cap layer comprising an oxide over the dielectric stack; forming a second cap layer comprising a nitride over the first cap layer; patterning the first and second cap layers and the dielectric stack to form a gate stack of a memory device; removing the second cap layer; and performing an oxidation process to form a blocking oxide over the charge-trapping layer, wherein the oxidation process consumes the first cap layer. Other embodiments are also described.Type: ApplicationFiled: March 31, 2015Publication date: January 7, 2016Inventors: Krishnaswamy Ramkumar, Hui-Mei Shih
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Publication number: 20160005669Abstract: A method of forming a shallow trench isolation (STI) structure in a substrate includes forming a pad oxide layer over the substrate. The method includes forming a nitride-containing layer over the pad oxide layer, wherein the nitride-containing layer has a first thickness. The method further includes forming the STI structure extending through the nitride-containing layer, into the substrate. The STI structure has a height above a top surface of the pad oxide layer. The method includes establishing a correlation between the first thickness, the height of the STI structure above the top surface of the pad oxide layer, and an offset between the first thickness and the height of the STI structure above the top surface of the pad oxide layer. The method includes calculating the height of the STI structure above the pad oxide layer based on the correlation, and selectively removing a determined thickness of the STI structure.Type: ApplicationFiled: September 18, 2015Publication date: January 7, 2016Inventors: Tai-Yung YU, Hui Mei JAO, Jin-Lin LIANG, Chien-Hua LI, Cheng-Long TAO, Shian Wei MAO, Chien-Chang FANG
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Publication number: 20150331176Abstract: A front light guide includes a light guide plate, a light source, a functional material layer and a first adhesive layer. The light guide plate has a side surface, a first surface and a second surface opposite to the first surface. The light guide plate has a first refractive index. The light source faces the side surface and configured to emit light into the light guide plate. The functional material layer is disposed at a side adjacent to the first surface, and has a third refractive index. The first adhesive layer is interposed between the light guide plate and the functional material layer so as to adhere the light guide plate with the functional material layer. The first adhesive layer has a second refractive index. The first refractive index is greater than the second refractive index, and the second refractive index is greater than the third refractive index.Type: ApplicationFiled: February 12, 2015Publication date: November 19, 2015Inventors: I-Jeng CHEN, Sheng-Chieh TAI, Chih-Ching YEN, Chin-Ju HSU, Hui-Mei FANG, Yu-Nan PAO, Shu-Li HSIAO, Chia-Chuang HU
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Publication number: 20150115419Abstract: A method is disclosed that includes the operations outlined below. A plurality of dummy conductive cells that provide different densities are formed in a plurality of empty areas in a plurality of metal layers of a semiconductor device according to overlap conditions of the empty areas between each pair of neighboring metal layers.Type: ApplicationFiled: October 24, 2013Publication date: April 30, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Wei-Yu MA, Hui-Mei CHOU, Kuo-Ji CHEN
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Patent number: 8993457Abstract: A method of fabricating a memory device is described. Generally, the method includes: forming on a surface of a substrate a dielectric stack including a tunneling dielectric and a charge-trapping layer overlying the tunneling dielectric; depositing a first cap layer comprising an oxide over the dielectric stack; forming a second cap layer comprising a nitride over the first cap layer; patterning the first and second cap layers and the dielectric stack to form a gate stack of a memory device; removing the second cap layer; and performing an oxidation process to form a blocking oxide over the charge-trapping layer, wherein the oxidation process consumes the first cap layer. Other embodiments are also described.Type: GrantFiled: September 18, 2014Date of Patent: March 31, 2015Assignee: Cypress Semiconductor CorporationInventors: Krishnaswamy Ramkumar, Hui-Mei (Mei) Shih
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Patent number: 8950022Abstract: A mattress-bearing hospital bed comprises a hospital bed body on which a plurality of hook-and-loop fasteners are installed and a mattress structure which comprises a silicone layer with straight grooves thereon, a polyurethane film covering the silicone layer, and a velvet fabric layer whose one surface is melt to the plane bottom of the polyurethane film covering the silicone layer and other surface contacts the hospital bed body by means of the hook-and-loop fasteners in order to attach the mattress structure to the hospital bed body.Type: GrantFiled: May 28, 2013Date of Patent: February 10, 2015Inventor: Hui-Mei Chen
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Patent number: 8922225Abstract: A sensing pad includes a first sensing layer, a second sensing layer and a spacer layer. The second sensing layer has at least one second sparse sensing zone and at least one second dense sensing zone. The spacer layer is disposed between the first sensing layer and second sensing layer, and includes at least one high pressure spacer zone and at least one low pressure spacer zone. The second sensing layer is pressed downwards upon receiving a load to compress the spacer layer and contact the first sensing layer to generate electric connection, thereby detecting the pressed location. Through the dense sensing zone and sparse sensing zone distributed on the second sensing layer whether a person is lay on a bed can be judged to reduce faulty judgments, and the posture of the person can be detected to better understand conditions of the person lay on the bed.Type: GrantFiled: June 7, 2012Date of Patent: December 30, 2014Assignee: China Medical UniversityInventors: Jin-Chern Chiou, Shih-Che Lo, Hsin-Hsueh Tsai, Jia-Hung Yan, Fong Yuan Chang, Hui-Mei Chang
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Publication number: 20140352066Abstract: A mattress-bearing hospital bed comprises a hospital bed body on which a plurality of hook-and-loop fasteners are installed and a mattress structure which comprises a silicone layer with straight grooves thereon, a polyurethane film covering the silicone layer, and a velvet fabric layer whose one surface is melt to the plane bottom of the polyurethane film covering the silicone layer and other surface contacts the hospital bed body by means of the hook-and-loop fasteners in order to attach the mattress structure to the hospital bed body.Type: ApplicationFiled: May 28, 2013Publication date: December 4, 2014Inventor: Hui-Mei CHEN
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Publication number: 20140266280Abstract: A probe structure is disclosed which includes a metal needle, a soft insulative tube and a metal layer. The metal needle has a first end-portion and a second end-portion opposite to each other. The first end-portion has a tip. The soft insulative tube has a through hole in which the metal needle is partially inserted. The tip of the metal needle protrudes from the through hole. The metal layer is coated on the outer surface of the soft insulative tube and is electrically isolated from the metal needle; the thickness of the metal layer has a thickness no larger than 10 micrometers. Therefore, good resilience and signal integrity could coexist in the probe structure. A probe card including several above-mentioned probe structures and a method for manufacturing the above-mentioned probe structure are also disclosed.Type: ApplicationFiled: March 14, 2014Publication date: September 18, 2014Applicant: WIN Semiconductors Corp.Inventors: Shu Jeng YEH, Min Chang TU, Jo Chang WU, Hui Mei OU, Cheng Ching HSU
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Publication number: 20140259421Abstract: The cushion structure integrated with a body supporting device comprises: a decompression material, which is disposed on the body contacting surface of the cushion structure; a connection member, which connects with a surgical table or a fixture on the surgical table which support patient' entire body or a part of patient's body; and a decompression substrate, which is disposed between the decompression material and the connection member making the three of them as one component, wherein the connection member exposes a portion or a plurality of portions in order to connect with the surgical table or the fixture on the surgical table.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Inventor: Hui-Mei CHEN
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Patent number: 8748885Abstract: A semiconductor device including a first wafer assembly having a first substrate and a first oxide layer over the first substrate. The semiconductor device further includes a second wafer assembly having a second substrate and a second oxide layer over the second substrate. The first oxide layer and the second oxide layer are bonded together by van der Waals bonds or covalent bonds. A method of bonding a first wafer assembly and a second wafer assembly including forming a first oxide layer over a first substrate. The method further includes forming a second oxide layer over a second wafer assembly. The method further includes forming van der Waals bonds or covalent bonds between the first oxide layer and the second oxide layer.Type: GrantFiled: February 10, 2012Date of Patent: June 10, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tung-Ti Yeh, Chung-Yi Huang, Ya Wen Wu, Hui Mei Jao, Ting-Chun Wang, Shiu-Ko JangJian, Chia-Hung Chung
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Publication number: 20130328574Abstract: An induction pad includes a first induction layer, a second induction layer and a spacer layer. The second induction layer has at least one second sparse induction zone and at least one second dense induction zone. The spacer layer is disposed between the first induction layer and second induction layer, and includes at least one high pressure spacer zone and at least one low pressure spacer zone. The second induction layer is pressed downwards upon receiving a load to compress the spacer layer and contact the first induction layer to generate electric connection, thereby detecting the pressed location. Through the dense induction zone and sparse induction zone distributed on the second induction layer whether a person is lay on a bed can be judged to reduce faulty judgments, and the posture of the person can be detected to better understand conditions of the person lay on the bed.Type: ApplicationFiled: June 7, 2012Publication date: December 12, 2013Inventors: Jin-Chern CHIOU, Shih-Che Lo, Hsin-Hsueh Tsai, Jia-Hung Yan, Fong Yuan Chang, Hui-Mei Chang
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Patent number: 8592297Abstract: A wafer including a substrate, a dielectric layer over the substrate, and a conductive layer over the dielectric layer is disclosed. The substrate has a main portion. A periphery of the dielectric layer and the periphery of the main portion of the substrate are separated by a first distance. A periphery of the conductive layer and the periphery of the main portion of the substrate are separated by a second distance. The second distance ranges from about a value that is 0.5% of a diameter of the substrate less than the first distance to about a value that is 0.5% of the diameter greater than the first distance.Type: GrantFiled: December 16, 2011Date of Patent: November 26, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tung-Ti Yeh, Wu-Chang Lin, Chung-Yi Huang, Ya Wen Wu, Hui-Mei Jao, Ting-Chun Wang, Chia-Hung Chung
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Patent number: 8570310Abstract: A display panel have a transmissive region and a reflective region. The display panel comprises a first plate, a second plate opposite to the first plate and a display medium. The first plate comprises a first substrate, a scan line, a data line, an active device, a common electrode, a pixel electrode and a dielectric layer. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device and is electrically insulated from the common electrode. The pixel electrode has slits exposing the common electrode. The dielectric layer is located between the common electrode and the pixel electrode and has first openings in the reflective region. The second plate is opposite to the first plate. The display medium is located between the first plate and the second plate.Type: GrantFiled: April 7, 2011Date of Patent: October 29, 2013Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Jiun-Jr Huang, Chin-Hai Huang, Hui-Mei Hu
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Publication number: 20130207098Abstract: A semiconductor device including a first wafer assembly having a first substrate and a first oxide layer over the first substrate. The semiconductor device further includes a second wafer assembly having a second substrate and a second oxide layer over the second substrate. The first oxide layer and the second oxide layer are bonded together by van der Waals bonds or covalent bonds. A method of bonding a first wafer assembly and a second wafer assembly including forming a first oxide layer over a first substrate. The method further includes forming a second oxide layer over a second wafer assembly. The method further includes forming van der Waals bonds or covalent bonds between the first oxide layer and the second oxide layer.Type: ApplicationFiled: February 10, 2012Publication date: August 15, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Tung-Ti YEH, Chung-Yi HUANG, Ya Wen WU, Hui-Mei JAO, Ting-Chun WANG, Shiu-Ko JiangJian, Chia-Hung CHUNG