Abstract: A method and a product of one-time enveloping silicone gel with plastic films. The surfaces of two films to be in contact with the silicone gel are treated by a plasma casing process (crosslinking by activated species of inert gases) or an electron beam process in advance so as to improve the wetting capability thereof. Thereby the films and the silicone gel are able to tightly combine together without the fear of separation. The operation is carried out under a vacuum environment so that no bubble will be generated therein and the leakage of the silicone gel on welding portions will be prevented.

Abstract: A nematic liquid crystal composition includes a mixture of first component and second component as follows: a first component with at least one first twisted-related characteristic, wherein the first component is from 75% to 90% in total weight of the nematic liquid crystal composition; and a second component with at least one second twisted-related characteristic lower than the first twist-related characteristics, wherein the second component is from 10% to 25% in total weight of the nematic liquid crystal composition.

Abstract: The present invention relates to a web cam coupled to a computer system, an in particular to a web cam with an automatic image angle adjustment device responsive to rotation of a housing of the camera. Once a user rotates the housing of the web cam, the web cam will cause electrical contact or disengagement of a conductor relative to a contact, and thereby generate a feedback signal for enabling the computer system to give a counter rotation to an angled image and align the angled image with a display.

Abstract: This invention relates to a packaging structure and method of an image sensor module. The method comprises: providing a transparent substrate having a first patterned conductive layer; carrying an image sensor integrated circuit chip having a photosensitive active area and at least one passive chip on the transparent substrate, wherein the photosensitive active area faces the transparent substrate; forming an insulating build-up film over the transparent substrate; and forming a plurality of conductive vias in the insulating build-up film wherein the ends of the conductive vias are connected with the passive chip or the first patterned conductive layer of the transparent substrate while the other ends of the conductive vias are exposed on the surface of the insulating build-up film. The packaging method is capable of down-sizing the construction of the image sensor module and simplifying the processing steps.

Abstract: A switching circuit located in a computer system is disclosed in the present invention. The switching circuit comprises a first phase-locked loop generating a first host clock signal, a second phase-locked loop generating a second host clock signal and an output switch unit coupled to the first PLL and the second PLL. When the computer system operates in a first mode, the output switch unit chooses the first host clock signal to be a fundamental clock signal of the front side bus. In the other hand, when the computer system operates in a second mode, the output switch unit chooses the second host clock signal to be a fundamental clock signal of the front side bus.

Abstract: By adjusting a scale factor of a phase locked loop in computers for generating a basic clock signal of a front-side bus, the frequency of the basic clock signal is modulated when the central processing unit of computers operates. By a bridge unit of the present invention, a selecting signal is received so as to output a corresponding adjustment signal to a check unit and then the check unit checks the adjustment signal for outputting a checking signal to a scale parameter adjustment unit. According to the checking signal, the scale parameter adjustment unit adjusts a first scale parameter of the scale factor that the phase locked loop uses now and outputs this parameter to the phase locked loop. Thus after receiving a fixed clock signal for generating the basic clock signal, the phase locked loop generates the basic clock signal of the front-side bus in accordance with the adjusted first scale parameter and further the frequency of the basic clock signal is adjusted.

Abstract: A timing adjustment circuit and method thereof are disclosed. The timing adjustment circuit at least consists of a second timing adjustment unit, a multistage sample circuit, and a decision circuit for adjusting received timing of an output signal transmitted by a first chip and received by a second chip. The method takes advantage of the multistage sample circuit to receive a clock signal of receiving end so as to generate a plurality of sample clock signal. Later, according to the sample clock signals, sample output signals to generate a plurality of sampled signal. At last, make comparison of the sampled signals by the decision circuit in accordance with the output signals to generate a second adjustment signal being transmitted to the second timing adjustment unit for adjusting phase of a base clock to generate an adjusted receiving-end clock signal. Thus the receiving timing of the second chip to receive the output signal is adjusted.

Abstract: A signal adjustment circuit with a reference circuit is proposed in the present invention. The signal adjustment circuit is used to adjust a setting value of a first chip or a second chip. The first chip provides an output signal corresponding to an output value according to the setting value thereof. The second chip receives the output signal of the first chip according to the setting value thereof. The reference circuit has multiple reference voltages and compares the output signal of the first chip with the reference voltages to produce multiple comparison values. The comparison values are then passed to the decision unit. After that, the decision unit checks the comparison values according to the output value and produces an adjustment signal to adjust the setting value of the first chip or the second chip. In this way, the stability of transmission between the first and second chips is maintained.

Abstract: The present invention discloses a portable blackbody furnace comprising a metallic body, a cylindrical cavity with a tapered end in the metallic body, a shielding plate positioned at an open end of the cylindrical cavity, at least a first heaters positioned in the shielding plate, a plurality of second heaters positioned around the metallic body, and a plurality of thermometers positioned in the metallic body. Preferably, the heat capacity of the metallic body is larger than 200 Joules/K, and has radial thickness larger than 5 mm. There are grooves formed on the outer wall of the metallic body, and the second heaters are heating wires embedded inside the grooves. In addition, the flow direction of the current between two adjacent heating wires is opposite to eliminate the magnetic field generated from the current flow.

Abstract: A vertical alignment polyimide for LCD has the following structure: wherein R1 and R2 are same or different tetravalent aromatic residues or alkyl residues; n is an integer, and 24?n?6; a:b=1:9 to 9:1, preferably from 4:1 to 1:1; and a+b=p+q. The polyimide has an inherent viscosity of 0.04–5 dl/g.

Abstract: A method for fabricating a pad redistribution layer. First, at least one bonding pad exposed by a first passivation layer is provided. A diffusion barrier layer and a seed layer are then formed over the first passivation layer and the bonding pad. A patterned mask layer is then formed over the seed layer to expose a portion thereof over the bonding pad, and a metal layer is then formed thereon. A sacrificial layer is then formed over the substrate and the sacrificial layer over the patterned mask layer is removed. The conductive film exposed by the metal layer and the remaining sacrificial layer is then removed, leaving a pad redistribution layer for the bonding pad.

Abstract: A computer-implemented wafer lot split method is disclosed. A database is provided. The database is coupled to manufacturing tools in a wafer manufacturing environment. Split parameters for a wafer lot are predetermined in the database. The wafer lot is split according to the split parameters to acquire child wafer lots.

Abstract: This invention relates to a packaging structure and method of an image sensor module. The method comprises: providing a transparent substrate having a first patterned conductive layer; carrying an image sensor integrated circuit chip having a photosensitive active area and at least one passive chip on the transparent substrate, wherein the photosensitive active area faces the transparent substrate; forming an insulating build-up film over the transparent substrate; and forming a plurality of conductive vias in the insulating build-up film wherein the ends of the conductive vias are connected with the passive chip or the first patterned conductive layer of the transparent substrate while the other ends of the conductive vias are exposed on the surface of the insulating build-up film. The packaging method is capable of down-sizing the construction of the image sensor module and simplifying the processing steps.

Abstract: A method for fabricating a pad redistribution layer. First, at least one bonding pad exposed by a first passivation layer is provided. A diffusion barrier layer and a seed layer are then formed over the first passivation layer and the bonding pad. A patterned mask layer is then formed over the seed layer to expose a portion thereof over the bonding pad, and a metal layer is then formed thereon. A sacrificial layer is then formed over the substrate and the sacrificial layer over the patterned mask layer is removed. The conductive film exposed by the metal layer and the remaining sacrificial layer is then removed, leaving a pad redistribution layer for the bonding pad.

Abstract: A method for improving the accuracy of electrical test results of semiconductor wafers is described. The method introduces a non-contacting physical cleaning process prior to testing. The cleaning process removes micro-contamination on circuit contact pads that has been introduced during semiconductor wafer processing. This results in more accurate electrical probing of the semiconductor wafers.

Abstract: A vertical alignment polyimide for LCD has the following structure: wherein R1 and R2 are same or different tetravalent aromatic residues or alkyl residues; n is an integer, and 24?n?6; a:b=1:9 to 9:1, preferably from 4:1 to 1:1; and a+b=p+q. The polyimide has an inherent viscosity of 0.04-5 d/g.

Abstract: An improved bra cup padding structure comprises essentially a finished bra cup padding and a layer of self-adhesive flexible silicone gel film coated over the inner surface or the exterior surface of said finished bra cup padding, thereby imparting said bra cup padding an adhesiveness such that said improved bra cup padding can stick securely against the female breast or the bra and hence can give the female breast an firm and ample appearance without displacement due to the continual movement of the female chest, and further highlights the bosomy and natural curve of the female chest to the extent that, when viewing either from lateral side or front sight, a naturally, lively and attractively curvaceous beauty is presented.

Abstract: An integration method for different information platforms in a decision-making system is proposed to solve the problem of being unable to integrate information among different platforms in the existing decision-making systems of the manufacturing industry. All information is integrated in a database and then distributed to users through a network and E-mail. The invention includes at least the following steps: the enterprise downloads at least one set of data from an information platform to a shared folder; a database server integrates the data in the shared folder; the computed data are moved to an integration platform; the enterprise selects a particular method to distribute the integrated data; and the user receives the data.

Abstract: A sulfated phosphatidylinositol, pharmaceutical compositions containing a sulfated phosphatidylinositol, and the administration of a sulfated phosphatidylinositol or the pharmaceutical compositions to individuals are disclosed. A sulfated phosphatidylinositol can be used alone to elicit a pharmacologic response, or can be incorporated into a variety of pharmaceutical compositions, both liquid and solid, as a component of a drug delivery system for the administration of a therapeutic agent to an individual.

Abstract: The invention relates to a functional brassiere that provides an adjustable engaging strap on the upper periphery of a human body engineered silicone rubber padding. The strap suspends the silicone rubber padding directly by engaging the adjustable engaging strap onto a shoulder strap so that the weight of the lower portion can be shared as well as assuring that the padding will not dislocate and fall due to swaying. The functional brassiere includes a silicone rubber body, a PU film, a seaming cloth, and an adjustable engaging strap, the silicone rubber body being a flexible and elastic body designed according to human body engineering to be a falsie of a “thinner upper portion and thicker lower portion” share suitable for a woman who has had a mammectomy to wear comfortably and fittably so that it will not dislocate and fall due to swaying and can restore the original plump breast and natural arc shape.