Abstract: Disclosed is a battery system, including: a plurality of battery modules provided in a space formed between an upper casing and a lower casing; connection busbars respectively connected to terminals of the battery modules; an intermediate busbar connected to the connection busbars such that the connection busbars are electrically connected to each other; and an insulation protector provided with opposite end portions attached to the upper casing, and with a holding portion placed below the intermediate busbar at a position between the opposite end portions.

Abstract: A method for manufacturing a semiconductor device includes designing a layout, manufacturing a photomask based on the designed layout, and performing a photolithography process using the photomask to form a pattern on a substrate. The manufacturing of the photomask includes preparing the photomask including first and second chip regions, extracting first and second images from the first and second chip regions, respectively, averaging the first and second images to generate a preliminary standard image including a difference region between the first and second images, inserting a normal image into the difference region based on the layout to generate a standard image, and comparing each of the first and second images with the standard image to detect a defect of the first and/or second chip regions.

Abstract: A semiconductor memory device includes an error correction code (ECC) engine, a memory cell array, an input/output (I/O) gating circuit and a control logic circuit. The memory cell array includes a normal cell region configured to store main data and a parity cell region configured to selectively store parity data which the ECC engine generates based on the main data, and sub data received from outside of the semiconductor memory device. The control logic circuit controls the ECC engine to selectively perform an ECC encoding and an ECC decoding on the main data and controls the I/O gating circuit to store the sub data in at least a portion of the parity cell region.

Abstract: A vehicular air conditioning system includes an air conditioner case, a blower configured to blow an air to an internal air flow path of the air conditioner case, a microphone provided in the internal air flow path on a downstream side of the blower and configured to detect noise, and a speaker configured to output sound waves having a phase opposite to a phase of the noise detected by the microphone,

Abstract: A display device includes a display area and a non-display area at least partially surrounding the display area. A first display substrate includes a plurality of thin film transistors. A second display substrate is disposed opposite to the first display substrate. A seal member is disposed within the non-display area and is disposed between the first display substrate and the second display substrate. The seal member is configured to attach the first display substrate to the second display substrate. Each of the plurality of thin film transistors includes a gate electrode. The gate electrode of at least one of the plurality of thin film transistors overlaps the seal member in a thickness direction of the display device.

Abstract: A method for detecting biomaterial by means of a dye having a linear upconversion fluorescent property is provided. The method includes the steps of: i) preparing a fluorophore having a linear upconversion fluorescent property; ii) reacting the fluorophore and biomaterial to obtain a reaction complex thereof; iii) exciting the reaction complex by means of a light source having a longer wavelength than the maximum light-emitting wavelength of the fluorophore; and iv) detecting and measuring the light-emitting signal having a shorter wavelength than the wavelength of the excited light emitted from the excited reaction complex. A system and a kit for detecting biomaterial using a dye having a linear upconversion fluorescent property are also provided.

Abstract: A semiconductor memory device includes an error correction code (ECC) engine, a memory cell array, an input/output (I/O) gating circuit and a control logic circuit. The memory cell array includes a normal cell region configured to store main data and a parity cell region configured to selectively store parity data which the ECC engine generates based on the main data, and sub data received from outside of the semiconductor memory device. The control logic circuit controls the ECC engine to selectively perform an ECC encoding and an ECC decoding on the main data and controls the I/O gating circuit to store the sub data in at least a portion of the parity cell region.

Abstract: A head mounted display device is provided. The head mounted display device includes a left eye display unit which displays an image for a left eye and is disposed along a trajectory of a left eye ellipse having a first eccentricity, and a left eye lens which faces the left eye display unit and refracts the image for the left eye in a direction of a user's left eye.