Abstract: A device is described in one embodiment that includes a micro-electro-mechanical systems (MEMS) device disposed on a first substrate and a semiconductor device disposed on a second substrate. A bond electrically connects the MEMS device and the semiconductor device. The bond includes an interface between a first bonding layer including silicon on the first substrate and a second bonding layer including aluminum on the second substrate. The physical interface between the aluminum and silicon (e.g., amorphous silicon) can provide an electrical connection.

Abstract: The present disclosure provides a method of bonding a plurality of substrates. In an embodiment, a first substrate includes a first bonding layer. The second substrate includes a second bonding layer. The first bonding layer includes silicon; the second bonding layer includes aluminum. The first substrate and the second substrate are bonded forming a bond region having an interface between the first bonding layer and the second bonding layer. A device having a bonding region between substrates is also provided. The bonding region includes an interface between a layer including silicon and a layer including aluminum.

Abstract: Systems and methods of separating bonded wafers are disclosed. In one embodiment, a system for separating bonded wafers includes a support for the bonded wafers and means for applying a sheer force to the bonded wafers. The system also includes means for applying a vacuum to the bonded wafers.

Abstract: A method for forming a support structure for supporting and handling a semiconductor wafer containing vertical FETs formed at the front surface thereof is provided. In one embodiment, a semiconductor wafer is provided having a front surface and a rear surface, wherein the front surface comprises one or more dies separated by dicing lines. The wafer is thinned to a predetermined thickness. A plurality of patterned metal features are formed on a thinned rear surface to provide support for the wafer, wherein each of the plurality of patterned metal features covers substantially one die, leaving the dicing lines substantially uncovered. The wafer is thereafter diced along the dicing lines to separate the one or more dies for later chip packaging.

Abstract: A device includes a substrate, a routing conductive line over the substrate, a dielectric layer over the routing conductive line, and an etch stop layer over the dielectric layer. A Micro-Electro-Mechanical System (MEMS) device has a portion over the etch stop layer. A contact plug penetrates through the etch stop layer and the dielectric layer. The contact plug connects the portion of the MEMS device to the routing conductive line. An escort ring is disposed over the etch stop layer and under the MEMS device, wherein the escort ring encircles the contact plug.

Abstract: A method of forming of biological sensing structures including a portion of a substrate is recessed to form a plurality of mesas in the substrate. Each of the plurality of mesas has a top surface and a sidewall surface. A first light reflecting layer is deposited over the top surface and the sidewall surface of each mesa. A filling material is formed over a first portion of the first light reflecting layer. A stop layer is deposited over the filling material and a second portion of the first light reflecting layer. A sacrificial layer is formed over the stop layer and is planarized exposing the stop layer. A first opening is formed in the stop layer and the first light reflecting layer. A second light reflecting layer is deposited over the first opening. A second opening is formed in the second light reflecting layer.

Abstract: A device is provided which includes a transparent substrate. An opaque layer is disposed on the transparent substrate. A conductive layer disposed on the opaque layer. The opaque layer and the conductive layer form a handling layer, which may be used to detect and/or align the transparent wafer during fabrication processes. In an embodiment, the conductive layer includes a highly-doped silicon layer. In an embodiment, the opaque layer includes a metal. In embodiment, the device may include a MEMs device.

Abstract: A bond free of an anti-stiction layer and bonding method is disclosed. An exemplary method includes forming a first bonding layer; forming an interlayer over the first bonding layer; forming an anti-stiction layer over the interlayer; and forming a liquid from the first bonding layer and interlayer, such that the anti-stiction layer floats over the first bonding layer. A second bonding layer can be bonded to the first bonding layer while the anti-stiction layer floats over the first bonding layer, such that a bond between the first and second bonding layers is free of the anti-stiction layer.

Abstract: The present disclosure provide a method of manufacturing a microelectronic device. The method includes forming a bonding pad on a first substrate; forming wiring pads on the first substrate; forming a protection material layer on the first substrate, on sidewalls and top surfaces of the wiring pads, and on sidewalls of the bonding pad, such that a top surface of the bonding pad is at least partially exposed; bonding the first substrate to a second substrate through the bonding pad; opening the second substrate to expose the wiring pads; and removing the protection material layer.

Abstract: A device is provided which includes a transparent substrate. An opaque layer is disposed on the transparent substrate. A conductive layer disposed on the opaque layer. The opaque layer and the conductive layer form a handling layer, which may be used to detect and/or align the transparent wafer during fabrication processes. In an embodiment, the conductive layer includes a highly-doped silicon layer. In an embodiment, the opaque layer includes a metal. In embodiment, the device may include a MEMs device.

Abstract: The present disclosure provides a method of bonding a plurality of substrates. In an embodiment, a first substrate includes a first bonding layer. The second substrate includes a second bonding layer. The first bonding layer includes silicon; the second bonding layer includes aluminum. The first substrate and the second substrate are bonded forming a bond region having an interface between the first bonding layer and the second bonding layer. A device having a bonding region between substrates is also provided. The bonding region includes an interface between a layer including silicon and a layer including aluminum.

Abstract: A method for forming a support structure for supporting and handling a semiconductor wafer containing vertical FETs formed at the front surface thereof is provided. In one embodiment, a semiconductor wafer is provided having a front surface and a rear surface, wherein the front surface comprises one or more dies separated by dicing lines. The wafer is thinned to a predetermined thickness. A plurality of patterned metal features are formed on a thinned rear surface to provide support for the wafer, wherein each of the plurality of patterned metal features covers substantially one die, leaving the dicing lines substantially uncovered. The wafer is thereafter diced along the dicing lines to separate the one or more dies for later chip packaging.