Patents by Inventor Hung Hung

Hung Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210194475
    Abstract: Provided is a semiconductor device including: a normally-off transistor having a first electrode, a second electrode, and a first control electrode; a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode; a first capacitor having a first end and a second end electrically connected to the second control electrode; a Zener diode having a first anode and a first cathode, the first anode being electrically connected to the second end and the second control electrode, and the first cathode being electrically connected to the third electrode; a first resistor having a third end and a fourth end electrically connected to the first control electrode; a first diode having a second anode and a second cathode, the second anode being electrically connected to the third end; a second resistor having a fifth end electrically connected to the second cathode and a sixth end electrically connected to the fourth end and the first cont
    Type: Application
    Filed: September 4, 2020
    Publication date: June 24, 2021
    Inventors: Hung Hung, Yasuhiro Isobe, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura, Hitoshi Kobayashi, Tetsuya Ohno
  • Patent number: 11014118
    Abstract: A float bath coating system includes at least one nanoparticle coater located in a float bath. The at least one nanoparticle coater includes a housing, a nanoparticle discharge slot, a first combustion slot, and a second combustion slot. The nanoparticle discharge slot is connected to a nanoparticle source and a carrier fluid source. The first combustion slot is connected to a fuel source and an oxidizer source. The second combustion slot is connected to a fuel source and an oxidizer source.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: May 25, 2021
    Assignee: Vitro Flat Glass LLC
    Inventors: James W. McCamy, Cheng-Hung Hung, Mehran Arbab, Abhinav Bhandari
  • Publication number: 20210148506
    Abstract: A bracket structure is provided. The bracket structure includes a base, a connection pipe and at least one cascade member. The base includes a base body, a first connection protrusion and a second connection protrusion. The first connection protrusion and the second connection protrusion are affixed to the base body. The first connection protrusion includes a first contact surface. The second connection protrusion includes a second contact surface. The first contact surface faces the second contact surface. The connection pipe includes an extending section, a fitting section and a pivot section. The cascade member pivots on the first connection protrusion, the pivot section and the second connection protrusion. The pivot section includes a first abutting surface and a second abutting surface. The first abutting surface forms a surface-to-surface contact with the first contact surface. The second abutting surface forms a surface-to-surface contact with the second contact surface.
    Type: Application
    Filed: September 2, 2020
    Publication date: May 20, 2021
    Inventors: Lan-Chun YANG, Yi-Chieh LIN, Ming-Hung HUNG, Chun-Wei WANG
  • Publication number: 20210148539
    Abstract: A vehicle lamp includes a housing including a compartment having an opening. A reflective unit and a lighting unit are mounted in the compartment. The lighting unit includes a first circuit board and a first LED. A lens is mounted to a front end of the housing and covers the opening of the compartment. The reflective unit reflects light rays from the first LED to transmit through the lens. A heating unit includes a substrate made of a light transmittable material and a heating layer disposed on the substrate. A sensor is mounted in the compartment for detecting temperature. When the detected temperature is lower than a first predetermined temperature, the heating layer is activated to proceed with an electrical heating operation. When the detected temperature is higher than a second predetermined temperature, the electrical heating operation of the heating layer is stopped or gradually reduced.
    Type: Application
    Filed: December 18, 2019
    Publication date: May 20, 2021
    Inventors: Ming-Hung Ting, Jui-Hung Hung
  • Publication number: 20210134864
    Abstract: A manufacturing method of an image sensor including the following steps is provided. A substrate is provided. A light sensing device is formed in the substrate. A storage node is formed in the substrate. The storage node and the light sensing device are separated from each other. A buried gate structure is formed in the substrate. The buried gate structure includes a buried gate and a first dielectric layer. The buried gate is disposed in the substrate and covers at least a portion of the storage node. The first dielectric layer is disposed between the buried gate and the substrate. A first light shielding layer is formed on the buried gate. The first light shielding layer is located above the storage node and electrically connected to the buried gate.
    Type: Application
    Filed: January 11, 2021
    Publication date: May 6, 2021
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shih-Ping Lee, Pin-Chieh Huang, Jui-Hung Hung, Yi-Chen Yeh, Cheng-Han Yang, Wen-Hao Huang
  • Patent number: 10998433
    Abstract: A semiconductor device of an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer placed on the first nitride semiconductor layer; a first electrode placed on the second nitride semiconductor layer; a second electrode placed on the first nitride semiconductor layer; a gate electrode placed between the first electrode and the second electrode; a first field plate electrode placed on the second nitride semiconductor layer, the first field plate electrode having the same height as the gate electrode; and a second field plate electrode provided on an upper side of the first field plate electrode, the second field plate electrode being placed on a side of the second electrode compared to the first field plate electrode.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: May 4, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hung Hung, Yasuhiro Isobe, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura
  • Publication number: 20210083102
    Abstract: A semiconductor device of an embodiment includes: a first nitride semiconductor layer of a first conductive type; a second nitride semiconductor layer which is the first conductive type and is provided on the first nitride semiconductor layer; a third nitride semiconductor layer which is a second conductive type and is provided on the second nitride semiconductor layer; a fourth nitride semiconductor layer which is the first conductive type and is provided on the third nitride semiconductor layer; and a first electrode provided in a trench provided in the second nitride semiconductor layer, the third nitride semiconductor layer, and the fourth nitride semiconductor layer, via a first insulating film.
    Type: Application
    Filed: February 25, 2020
    Publication date: March 18, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yasuhiro ISOBE, Hung Hung, Masaaki Onomura
  • Publication number: 20210083577
    Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is deno
    Type: Application
    Filed: January 17, 2020
    Publication date: March 18, 2021
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Akira YOSHIOKA, Toru SUGIYAMA, Masaaki IWAI, Naonori HOSOKAWA, Masaaki ONOMURA, Hung HUNG, Yasuhiro ISOBE
  • Patent number: 10937819
    Abstract: An image sensor including a substrate, a light sensing device, a storage node, a buried gate structure, and a first light shielding layer is provided. The light sensing device is disposed in the substrate. The storage node is disposed in the substrate. The storage node and the light sensing device are separated from each other. The buried gate structure includes a buried gate and a first dielectric layer. The buried gate is disposed in the substrate and covers at least a portion of the storage node. The first dielectric layer is disposed between the buried gate and the substrate. The first light shielding layer is disposed on the buried gate and is located above the storage node. The first light shielding layer is electrically connected to the buried gate.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: March 2, 2021
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shih-Ping Lee, Pin-Chieh Huang, Jui-Hung Hung, Yi-Chen Yeh, Cheng-Han Yang, Wen-Hao Huang
  • Patent number: 10922071
    Abstract: A centralized flash memory module is provided. The centralized flash memory module includes flash memory components, a flash memory management controller (FMMC), and a complex programmable logic device (CPLD). Each of the flash memory components is connected to a server device separate from the centralized flash memory module. The FMMC is configured to connect to the flash memory components and to a rack management device, separate from the centralized flash memory module. The CPLD is configured to connect the FMMC to the flash memory components and connect the server device to the flash memory components.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: February 16, 2021
    Assignee: QUANTA COMPUTER INC.
    Inventors: Ming-Hung Hung, Hsin-Hung Kuo, Chin-Fu Ou
  • Publication number: 20210038567
    Abstract: The present invention relates to a method for inhibiting a cancer metastasis in a subject in need thereof, comprising administering to said subject a cancer metastasis-inhibiting effective amount of: Camphorataimide B; or a composition comprising Camphorataimide B and a pharmaceutically acceptable adjuvant, vehicle, or carrier.
    Type: Application
    Filed: August 9, 2019
    Publication date: February 11, 2021
    Applicant: Chung Shan Medical University
    Inventors: Chau-Jong Wang, Chia-Hung Hung
  • Patent number: 10912760
    Abstract: The present invention relates to a method for inhibiting a cancer metastasis in a subject in need thereof, comprising administering to said subject a cancer metastasis-inhibiting effective amount of: Camphorataimide B; or a composition comprising Camphorataimide B and a pharmaceutically acceptable adjuvant, vehicle, or carrier.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: February 9, 2021
    Assignee: Chung Shan Medical University
    Inventors: Chau-Jong Wang, Chia-Hung Hung
  • Publication number: 20210019352
    Abstract: A text comparison method is adapted for comparing a query file with an existing file. The text comparison method includes: converting the existing file, by an irreversible method, to obtain a first intermediate file, wherein the first intermediate file includes a plurality of characters, and a number of different characters of the plurality of characters is a predetermined value; receiving a second intermediate file which is a file converted from the query file by the irreversible method; and according to a predetermined string length, comparing the second intermediate file with the first intermediate file by a high repeating-character comparison method to output a comparison result. Therefore, the second intermediate file can be created offline and then only the second intermediate file but not the original query file is submitted through interne for private text comparison.
    Type: Application
    Filed: October 16, 2019
    Publication date: January 21, 2021
    Applicants: National Tsing Hua University, National Chiao Tung University
    Inventors: Lee-Wei Yang, Jui-Hung Hung, Oluwatobi-Emmanuel Salawu, Yuan-Yu Chang
  • Patent number: 10868163
    Abstract: A semiconductor device includes first and second nitride semiconductor layers, a first electrode electrically connected to the first nitride semiconductor layer, a second electrode electrically connected to the first nitride semiconductor layer, a gate electrode between the first and second electrodes, a first field plate electrode electrically connected to the first electrode, a second field plate electrode between the gate electrode and the second electrode and electrically connected to the first electrode, a first conductive layer on the gate electrode, and a second conductive layer on the first conductive layer. A distance between the gate electrode and the second field plate electrode in a lateral direction is shorter than a distance between the first conductive layer and the second field plate electrode in the lateral direction, and is equal to or shorter than a distance between the second conductive layer and the second field plate electrode.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: December 15, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hung Hung, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa
  • Patent number: 10852237
    Abstract: A microarray including a plurality of detection areas and at least one mark is provided. The plurality of the detection areas are arranged in an array. The at least one mark is disposed among or beside the plurality of the detection areas. The at least one mark is configured for at least one of image focusing, positioning and splicing, wherein the at least one mark comprises a plurality of grid dots distributed in an area. The area comprises a plurality of zones arranged in an array, each of the plurality of the grid dots is disposed in one of the plurality of the zones, a number of the plurality of the grid dots is less than a number of the plurality of the zones, and the plurality of the grid dots form a two-dimensional pattern.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: December 1, 2020
    Assignee: Centrillion Technologies Taiwan Co., LTD.
    Inventors: Yao-Kuang Chung, Jui-Hung Hung, Chao-Hsi Lee
  • Publication number: 20200365744
    Abstract: A method of making a coated article includes forming a first coating over a first surface of a substrate; and forming a second coating over a second surface of the substrate. The second coating includes a first conductive layer including tin oxide and at least one material selected from the group consisting of tungsten, molybdenum, and niobium.
    Type: Application
    Filed: March 3, 2020
    Publication date: November 19, 2020
    Inventors: James McCamy, Cheng-Hung Hung, Benjamin Kabagambe, Kwaku K. Koram, Zhixun Ma, Gary J. Nelis
  • Publication number: 20200358075
    Abstract: Electrodepositable compositions including an aqueous medium, an ionic resin and particles including thermally produced graphenic carbon nanoparticles are disclosed. The compositions may also include lithium-containing particles. Electrodeposited coatings comprising a cured ionic resin, thermally produced graphenic carbon nanoparticle and lithium-containing particles are also disclosed. The electrodeposited coatings may be used as coatings for lithium ion battery electrodes.
    Type: Application
    Filed: July 28, 2020
    Publication date: November 12, 2020
    Applicant: PPG Industries Ohio, Inc.
    Inventors: Randy E. Daughenbaugh, Noel R. Vanier, Stuart D. Hellring, Cheng-Hung Hung
  • Publication number: 20200293306
    Abstract: A centralized flash memory module is provided. The centralized flash memory module includes flash memory components, a flash memory management controller (FMMC), and a complex programmable logic device (CPLD). Each of the flash memory components is connected to a server device separate from the centralized flash memory module. The FMMC is configured to connect to the flash memory components and to a rack management device, separate from the centralized flash memory module. The CPLD is configured to connect the FMMC to the flash memory components and connect the server device to the flash memory components.
    Type: Application
    Filed: March 13, 2019
    Publication date: September 17, 2020
    Inventors: Ming-Hung HUNG, Hsin-Hung KUO, Chin-Fu OU
  • Publication number: 20200295204
    Abstract: A solar cell includes a first substrate having a first surface and a second surface. An underlayer is located over the second surface. A first conductive layer is located over the underlayer. An overlayer is located over the first conductive layer. A semiconductor layer is located over the conductive oxide layer. A second conductive layer is located over the semiconductor layer. The first conductive layer includes a conductive oxide and at least one dopant selected from the group consisting of tungsten, molybdenum, niobium, and/or fluorine.
    Type: Application
    Filed: April 20, 2020
    Publication date: September 17, 2020
    Inventors: James W. McCamy, Cheng-Hung Hung, Benjamin Kabagambe, Kwaku K. Koram, Zhixun Ma, Gary J. Nelis
  • Publication number: 20200295171
    Abstract: A semiconductor device of an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer placed on the first nitride semiconductor layer; a first electrode placed on the second nitride semiconductor layer; a second electrode placed on the first nitride semiconductor layer; a gate electrode placed between the first electrode and the second electrode; a first field plate electrode placed on the second nitride semiconductor layer, the first field plate electrode having the same height as the gate electrode; and a second field plate electrode provided on an upper side of the first field plate electrode, the second field plate electrode being placed on a side of the second electrode compared to the first field plate electrode.
    Type: Application
    Filed: September 3, 2019
    Publication date: September 17, 2020
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hung Hung, Yasuhiro Isobe, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura