Patents by Inventor Hung Hung

Hung Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10112209
    Abstract: A glass drawdown coating system includes a container defining a glass ribbon path having a first side and a second side. At least one nanoparticle coater is located adjacent the first side and/or the second side of the glass ribbon path.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: October 30, 2018
    Inventors: James W. McCamy, Cheng-Hung Hung, Mehran Arbab, Abhinav Bhandari
  • Publication number: 20180308940
    Abstract: According to one embodiment, a semiconductor wafer includes a substrate, an AlN buffer layer, a foundation layer, a first high Ga composition layer, a high Al composition layer, a low Al composition layer, an intermediate unit and a second high Ga composition layer. The first layer is provided on the foundation layer. The high Al composition layer is provided on the first layer. The low Al composition layer is provided on the high Al composition layer. The intermediate unit is provided on the low Al composition layer. The second layer is provided on the intermediate unit. The first layer has a first tensile strain and the second layer has a second tensile strain larger than the first tensile strain. Alternatively, the first layer has a first compressive strain and the second layer has a second compressive strain smaller than the first compressive strain.
    Type: Application
    Filed: May 18, 2018
    Publication date: October 25, 2018
    Applicant: ALPAD CORPORATION
    Inventors: Yoshiyuki Harada, Toshiki Hikosaka, Hisashi Yoshida, Hung Hung, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 10074739
    Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer containing aluminum located on the first nitride semiconductor layer, one or more nitride layers containing aluminum located on the second nitride semiconductor layer, a source electrode located on the second nitride semiconductor layer, a drain electrode located on one of the second nitride semiconductor layer or the nitride layer, and a gate electrode located between the source electrode and the drain electrode. An end of the nitride layer on the source electrode side thereof is located between the gate electrode and the drain electrode.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: September 11, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira Yoshioka, Kohei Oasa, Hung Hung, Yasuhiro Isobe
  • Patent number: 10008571
    Abstract: According to one embodiment, a semiconductor wafer includes a substrate, an AlN buffer layer, a foundation layer, a first high Ga composition layer, a high Al composition layer, a low Al composition layer, an intermediate unit and a second high Ga composition layer. The first layer is provided on the foundation layer. The high Al composition layer is provided on the first layer. The low Al composition layer is provided on the high Al composition layer. The intermediate unit is provided on the low Al composition layer. The second layer is provided on the intermediate unit. The first layer has a first tensile strain and the second layer has a second tensile strain larger than the first tensile strain. Alternatively, the first layer has a first compressive strain and the second layer has a second compressive strain smaller than the first compressive strain.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: June 26, 2018
    Assignee: ALPAD CORPORATION
    Inventors: Yoshiyuki Harada, Toshiki Hikosaka, Hisashi Yoshida, Hung Hung, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 9988551
    Abstract: Thermally produced graphenic carbon particles for use as black pigments are disclosed. The pigments may be used in coatings and bulk articles to provide desirable jetness characteristics and absorbance at visible wavelengths.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: June 5, 2018
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Noel R. Vanier, Eldon L. Decker, Stephen B. Istivan, Cheng-Hung Hung, Gina R. Bonnett
  • Publication number: 20180137047
    Abstract: A backup method for the mapping table of a solid state disk is provided. When access of a user data and writing of backup data units are processed at the same time, by adjusting a data volume of each of the backup data units and a length of a time lag interval, the data volume of the backup data units to be processed is reduced. More capacity will be available for processing access of the user data. Thus, the access efficiency of the user data is maintained.
    Type: Application
    Filed: September 1, 2017
    Publication date: May 17, 2018
    Inventors: An-Te LIU, Chun-Hung HUNG, Jin-Shing HSIEH
  • Patent number: 9954727
    Abstract: A baseboard management controller (BMC) of a system can retrieve logged system events from a non-volatile storage of the BMC and receive a command from an administrator device for the BMC to collect system debug information. The BMC can obtain debug information from a component of the system, in response to receiving the command. The BMC can save the debug information to a debug file and send the debug file to the administrator device.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: April 24, 2018
    Assignee: QUANTA COMPUTER INC.
    Inventors: Mei-Lin Su, Ming-Hung Hung, Wei-Yu Chien
  • Patent number: 9938416
    Abstract: Thermally produced graphenic carbon particles for use as absorptive pigments are disclosed. The pigments may be used in coatings and bulk articles to provide favorable absorbance characteristics at various wavelengths including visible and infrared regions.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: April 10, 2018
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Noel R. Vanier, Eldon L. Decker, Stephen B. Istivan, Cheng-Hung Hung, Gina R. Bonnett
  • Patent number: 9932539
    Abstract: A method for extracting lipid from wet biomass includes a step in which a wet biomass and a first solvent are mixed to prepare a mixture. The method continues with a step in which said mixture is separated to obtain a solution containing said first solvent and a concentrated biomass. The method continues with a step in which a liquefied gas is added into said concentrated biomass subjected to mechanical dispersion means to obtain lipid.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: April 3, 2018
    Assignee: METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTRE
    Inventors: Chi-Hui Chen, Chun-Hung Hung, Tzu-Chen Kuo
  • Patent number: 9921915
    Abstract: A method for recovering a baseboard management controller (BMC) by determining, by a basic input/output system (BIOS), whether a BMC recovery mode is generated by a recovery mode jumper being triggered. The system performing the method can further install, if the recovery jumper is not triggered, a BMC firmware update driver and detect, if the recovery jumper is not triggered, a BMC image. The system that performs the method can further update, if the recovery jumper is not triggered, the BMC firmware and copy to a backup image, if the recovery jumper is not triggered, the BMC firmware update.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: March 20, 2018
    Assignee: QUANTA COMPUTER INC.
    Inventor: Ming-Hung Hung
  • Publication number: 20180066205
    Abstract: A method for extracting lipid from wet biomass includes a step in which a wet biomass and a first solvent are mixed to prepare a mixture. The method continues with a step in which said mixture is separated to obtain a solution containing said first solvent and a concentrated biomass. The method continues with a step in which a liquefied gas is added into said concentrated biomass subjected to mechanical dispersion means to obtain lipid.
    Type: Application
    Filed: November 29, 2016
    Publication date: March 8, 2018
    Inventors: CHI-HUI CHEN, CHUN-HUNG HUNG, TZU-CHEN KUO
  • Patent number: 9887281
    Abstract: A semiconductor device includes a first stacked portion above a substrate, the first stacked portion comprising a first nitride semiconductor layer containing aluminum and a second nitride semiconductor layer containing carbon, a third nitride semiconductor layer on the first stacked portion, the third nitride semiconductor layer containing carbon and having a greater thickness than each of the first and second nitride semiconductor layers, the third nitride semiconductor layer having a lower carbon concentration than the second nitride semiconductor layer, a second stacked portion on the third nitride semiconductor, the second stacked portion comprising a fourth nitride semiconductor layer containing aluminum and a fifth nitride semiconductor layer containing carbon, a sixth nitride semiconductor layer on the second stacked portion, a seventh nitride semiconductor layer on the sixth nitride semiconductor layer and containing aluminum, and a first electrode on the seventh nitride layer.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: February 6, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiro Isobe, Hung Hung, Akira Yoshioka
  • Publication number: 20170343028
    Abstract: A connecting structure connecting a first device and a second device rigidly but readily demountably comprises a housing having a top cover and a bottom cover to form an internal space. A connector which has an engagement block, a sliding block, and an insert block engages with the second device. A push button having a knob movably mounted on the housing, a sprung hooking structure having a guiding slot engaging with the sliding block, and a hook engaging with the second device provide demountable. The push button resists the engagement block via a through hole of the top cover, the connecting structure being combined with the connector to link with the hooking structure.
    Type: Application
    Filed: May 30, 2016
    Publication date: November 30, 2017
    Inventors: HSING-HSU CHEN, CHIA-HUNG HUNG, SHIH-WEI LIN
  • Patent number: 9832818
    Abstract: Resistive heating assemblies comprising a substrate, a conductive coating comprising graphenic carbon particles applied to at least a portion of the substrate, and a source of electrical current connected to the conductive coating are disclosed. Conductive coatings comprising graphenic carbon particles having a thickness of less than 100 microns and an electrical conductivity of greater than 10,000 S/m are also disclosed.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: November 28, 2017
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Eldon L. Decker, Noel R. Vanier, John M. Furar, Stephen B. Istivan, Cheng-Hung Hung
  • Patent number: 9818888
    Abstract: A method of forming a coating layer on a glass substrate in a glass manufacturing process includes: providing a first coating precursor material for a selected coating layer composition to at least one multislot coater to form a first coating region of the selected coating layer; and providing a second coating precursor material for the selected coating layer composition to the multislot coater to form a second coating region of the selected coating layer over the first region. The first coating precursor material is different than the second precursor coating material.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: November 14, 2017
    Assignee: Vitro, S.A.B. de C.V.
    Inventors: James W. McCamy, Zhixun Ma, Benjamin Kabagambe, Kwaku K. Koram, Cheng-Hung Hung, Gary J. Nelis
  • Publication number: 20170271493
    Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer containing aluminum located on the first nitride semiconductor layer, a third nitride semiconductor layer with an aluminum concentration higher than that of the second nitride semiconductor layer located on the second nitride semiconductor layer, a drain electrode and a source electrode provided on one of the second nitride semiconductor layer and on the third nitride semiconductor layer, and a gate electrode located between the drain electrode and the source electrode.
    Type: Application
    Filed: August 8, 2016
    Publication date: September 21, 2017
    Inventors: Akira YOSHIOKA, Takuo KIKUCHI, Junji KATAOKA, Naoharu SUGIYAMA, Hung HUNG, Yasuhiro ISOBE
  • Publication number: 20170271495
    Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer containing aluminum located on the first nitride semiconductor layer, one or more nitride layers containing aluminum located on the second nitride semiconductor layer, a source electrode located on the second nitride semiconductor layer, a drain electrode located on one of the second nitride semiconductor layer or the nitride layer, and a gate electrode located between the source electrode and the drain electrode. An end of the nitride layer on the source electrode side thereof is located between the gate electrode and the drain electrode.
    Type: Application
    Filed: August 22, 2016
    Publication date: September 21, 2017
    Inventors: Akira YOSHIOKA, Kohei OASA, Hung HUNG, Yasuhiro ISOBE
  • Publication number: 20170263741
    Abstract: A semiconductor device includes a first stacked portion above a substrate, the first stacked portion comprising a first nitride semiconductor layer containing aluminum and a second nitride semiconductor layer containing carbon, a third nitride semiconductor layer on the first stacked portion, the third nitride semiconductor layer containing carbon and having a greater thickness than each of the first and second nitride semiconductor layers, the third nitride semiconductor layer having a lower carbon concentration than the second nitride semiconductor layer, a second stacked portion on the third nitride semiconductor, the second stacked portion comprising a fourth nitride semiconductor layer containing aluminum and a fifth nitride semiconductor layer containing carbon, a sixth nitride semiconductor layer on the second stacked portion, a seventh nitride semiconductor layer on the sixth nitride semiconductor layer and containing aluminum, and a first electrode on the seventh nitride layer.
    Type: Application
    Filed: August 8, 2016
    Publication date: September 14, 2017
    Inventors: Yasuhiro ISOBE, Hung HUNG, Akira YOSHIOKA
  • Patent number: 9761903
    Abstract: Lithium ion battery electrodes including graphenic carbon particles are disclosed. Lithium ion batteries containing such electrodes are also disclosed. The graphenic carbon particles may be used in cathodes of such batteries by depositing a graphenic carbon particle-containing coating of a conductive substrate such as a metal foil The use of graphenic carbon particles in the cathodes results in improved performance of the lithium ion batteries.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: September 12, 2017
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Stuart D. Hellring, Randy E. Daughenbaugh, Noel R. Vanier, Cheng-Hung Hung, John W. Burgman
  • Publication number: 20170256637
    Abstract: A semiconductor device includes a substrate, and a stacked portion over the substrate, the stacked structure including a first nitride semiconductor layer containing aluminum, a second nitride semiconductor layer containing carbon, and a third nitride semiconductor layer whose carbon concentration is lower than carbon concentration of the second nitride semiconductor layer. A fourth nitride semiconductor layer whose carbon concentration is lower than carbon concentration of the second nitride semiconductor layer and whose thickness is greater than the thickness of each of the first to third nitride semiconductor layers is provided on an upper surface of the stacked portion. A fifth nitride semiconductor layer containing aluminum is provided on an upper surface of the fourth nitride semiconductor layer. A first electrode is provided on an upper surface of the fifth nitride semiconductor layer.
    Type: Application
    Filed: August 22, 2016
    Publication date: September 7, 2017
    Inventors: Yasuhiro ISOBE, Hung HUNG, Akira YOSHIOKA