Patents by Inventor Hung Lin

Hung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12124995
    Abstract: A computer-implemented method for optimizing a design of a physical object comprises: obtaining a data representation of the design of the physical object, including a plurality of elements, determining plural element clusters comprising a plurality of elements and estimating a cost model for the physical object. The method determines derivatives of the cost model with respect to a material density of each cluster. At least one analytical derivative of a performance metric for each element is computed. The design is optimized by iteratively performing: varying the material density of at least one element based on the analytical derivative and the estimated derivatives of the cost model, estimating the cost using the cost model based on the data representation with varied material density. The method generates and outputs a signal comprising the optimized data representation in case a termination criterion has been met.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: October 22, 2024
    Assignees: Honda Research Institute Europe GmbH, Honda Motor Co., Ltd.
    Inventors: Mariusz Bujny, Hung Lin, Nathan Zurbrugg, Duane Detwiler, Stefan Menzel
  • Publication number: 20230196290
    Abstract: A computer-implemented method for optimizing a design of a physical object comprises: obtaining a data representation of the design of the physical object, including a plurality of elements, determining plural element clusters comprising a plurality of elements and estimating a cost model for the physical object. The method determines derivatives of the cost model with respect to a material density of each cluster. At least one analytical derivative of a performance metric for each element is computed. The design is optimized by iteratively performing: varying the material density of at least one element based on the analytical derivative and the estimated derivatives of the cost model, estimating the cost using the cost model based on the data representation with varied material density. The method generates and outputs a signal comprising the optimized data representation in case a termination criterion has been met.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 22, 2023
    Applicants: Honda Research Institute Europe GmbH, Honda Motor Co., Ltd.
    Inventors: Mariusz Bujny, Hung Lin, Nathan Zurbrugg, Duane Detwiler, Stefan Menzel
  • Patent number: 11610596
    Abstract: An adjustment method of sound output is disclosed. The adjustment method includes the following steps of: receiving an audio message having a vowel message; determining whether the audio message is a whispered voice message; if the audio message is a whispered voice message, outputting a normal voice message, wherein the spoken content of the normal voice message is the same as that of the audio message, and the normal voice message has a normal voice vowel message, wherein the sound energy of the low-frequency part of the normal voice vowel message is 1.5-1,000,000 times that of the vowel message.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: March 21, 2023
    Assignee: AIROHA TECHNOLOGY CORP.
    Inventors: Kuan-Li Chao, Wei-Ren Lan, Hung Lin, Kuo-Ping Yang
  • Publication number: 20220084533
    Abstract: An adjustment method of sound output is disclosed. The adjustment method includes the following steps of: receiving an audio message having a vowel message; determining whether the audio message is a whispered voice message; if the audio message is a whispered voice message, outputting a normal voice message, wherein the spoken content of the normal voice message is the same as that of the audio message, and the normal voice message has a normal voice vowel message, wherein the sound energy of the low-frequency part of the normal voice vowel message is 1.5-1,000,000 times that of the vowel message.
    Type: Application
    Filed: September 17, 2020
    Publication date: March 17, 2022
    Inventors: Kuan-Li CHAO, Wei-Ren LAN, Hung LIN, Kuo-Ping YANG
  • Patent number: 10143057
    Abstract: A board-mounted parallel circuit structure with efficient power utilization includes a first substrate, a first constant voltage layer and a second constant voltage layer. The first and second constant voltage layers are connected to a power supply respectively through two power connection points. The first constant voltage layer has at least one insulating zone. Each insulating zone has a light-emitting unit formed therein. One electrode of the light-emitting unit is connected to the first constant voltage layer, and the other electrode thereof is connected to the second constant voltage layer through a conducting wire. When the power supply outputs a low voltage to the first constant voltage layer, resistance values everywhere on the first constant voltage layer are identical. Accordingly, given any distance between a light-emitting unit and a corresponding power connection point, lighting efficiency of the light-emitting unit is not affected and effective power utilization can be ensured.
    Type: Grant
    Filed: January 5, 2015
    Date of Patent: November 27, 2018
    Inventor: Hung Lin
  • Patent number: 10072830
    Abstract: A uniform luminance light-emitting diode (LED) circuit board includes a first primary trace and a second primary trace mounted on a substrate along a direction and are spaced apart, multiple LED strings mounted on the substrate along the direction and parallelly connected between the first primary trace and the second primary trace, a first power trace and a second power trace respectively connected to the first primary trace and the second primary trace, and a first auxiliary trace with two ends respectively connected to the second primary trace and the second power trace. By adjusting trace widths of the first primary trace and the second primary trace to limit current passing through each LED string and using the first auxiliary trace to provide an additional current path, identical current flowing through all the LED strings results in uniform luminance of the LED strings.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: September 11, 2018
    Inventor: Hung Lin
  • Publication number: 20170321872
    Abstract: A uniform luminance light-emitting diode (LED) circuit board includes a first primary trace and a second primary trace mounted on a substrate along a direction and are spaced apart, multiple LED strings mounted on the substrate along the direction and parallelly connected between the first primary trace and the second primary trace, a first power trace and a second power trace respectively connected to the first primary trace and the second primary trace, and a first auxiliary trace with two ends respectively connected to the second primary trace and the second power trace. By adjusting trace widths of the first primary trace and the second primary trace to limit current passing through each LED string and using the first auxiliary trace to provide an additional current path, identical current flowing through all the LED strings results in uniform luminance of the LED strings.
    Type: Application
    Filed: May 6, 2016
    Publication date: November 9, 2017
    Inventor: Hung LIN
  • Publication number: 20160198539
    Abstract: A board-mounted parallel circuit structure with efficient power utilization includes a first substrate, a first constant voltage layer and a second constant voltage layer. The first and second constant voltage layers are connected to a power supply respectively through two power connection points. The first constant voltage layer has at least one insulating zone. Each insulating zone has a light-emitting unit formed therein. One electrode of the light-emitting unit is connected to the first constant voltage layer, and the other electrode thereof is connected to the second constant voltage layer through a conducting wire. When the power supply outputs a low voltage to the first constant voltage layer, resistance values everywhere on the first constant voltage layer are identical. Accordingly, given any distance between a light-emitting unit and a corresponding power connection point, lighting efficiency of the light-emitting unit is not affected and effective power utilization can be ensured.
    Type: Application
    Filed: January 5, 2015
    Publication date: July 7, 2016
    Inventor: Hung Lin
  • Patent number: 8410709
    Abstract: A circuit board of a parallel light-emitting circuit of parallel LED light-emitting device has an electrical insulation board, two wire patterns and at least two power wires. The two wire patterns are oppositely formed on the electrical insulation board. Each wire pattern is connected to the corresponding power wire and has a matrix main loop having closed loops and a plurality of sub-wires formed inside the corresponding closed loop. A plurality of LEDs are respectively mounted on the corresponding closed loop and electrically connect with the two sub-wires of the two wire patterns. When a DC power supply is inputted to the power wires, a current of the DC power supply uniformly flows through the matrix main loop and the sub-wires, so that the LEDs electrically connected to the corresponding sub-wires receive approximately equal current to further emit light with uniform brightness.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: April 2, 2013
    Inventor: Hung Lin
  • Patent number: 8324837
    Abstract: A circuit board of a parallel light-emitting circuit of parallel LED light-emitting device has an electrical insulation board, two wire patterns and at least two power wires. The two wire patterns are oppositely formed on the electrical insulation board. Each wire pattern is connected to the corresponding power wire and has a matrix main loop having closed loops and a plurality of sub-wires formed inside the corresponding closed loop. A plurality of LEDs are respectively mounted on the corresponding closed loop and electrically connect with the two sub-wires of the two wire patterns. When a DC power supply is inputted to the power wires, a current of the DC power supply uniformly flows through the matrix main loop and the sub-wires, so that the LEDs electrically connected to the corresponding sub-wires receive approximately equal current to further emit light with uniform brightness.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: December 4, 2012
    Inventor: Hung Lin
  • Publication number: 20110253427
    Abstract: A circuit board of a parallel light-emitting circuit of parallel LED light-emitting device has an electrical insulation board, two wire patterns and at least two power wires. The two wire patterns are oppositely formed on the electrical insulation board. Each wire pattern is connected to the corresponding power wire and has a matrix main loop having closed loops and a plurality of sub-wires formed inside the corresponding closed loop. A plurality of LEDs are respectively mounted on the corresponding closed loop and electrically connect with the two sub-wires of the two wire patterns. When a DC power supply is inputted to the power wires, a current of the DC power supply uniformly flows through the matrix main loop and the sub-wires, so that the LEDs electrically connected to the corresponding sub-wires receive approximately equal current to further emit light with uniform brightness.
    Type: Application
    Filed: June 29, 2011
    Publication date: October 20, 2011
    Inventor: Hung LIN
  • Publication number: 20110043131
    Abstract: A circuit board of a parallel light-emitting circuit of parallel LED light-emitting device has an electrical insulation board, two wire patterns and at least two power wires. The two wire patterns are oppositely formed on the electrical insulation board. Each wire pattern is connected to the corresponding power wire and has a matrix main loop having closed loops and a plurality of sub-wires formed inside the corresponding closed loop. A plurality of LEDs are respectively mounted on the corresponding closed loop and electrically connect with the two sub-wires of the two wire patterns. When a DC power supply is inputted to the power wires, a current of the DC power supply uniformly flows through the matrix main loop and the sub-wires, so that the LEDs electrically connected to the corresponding sub-wires receive approximately equal current to further emit light with uniform brightness.
    Type: Application
    Filed: August 18, 2009
    Publication date: February 24, 2011
    Inventor: Hung Lin
  • Publication number: 20100038226
    Abstract: An illuminated keyboard module has a base, a film circuit membrane, a illuminator membrane, multiple supporting frames, multiple keys and multiple illuminator. The film circuit membrane is attached onto the base. The illuminator membrane is attached onto the film circuit membrane and has multiple wires. The multiple supporting frames are attached onto the illuminator membrane and are connected to the base. Each key is attached onto the top of a supporting frame and has a light permitting portion. Each illuminator is attached to the illuminator membrane under a key and electrically connected to the wires. The illuminator irradiates lights going through the light permitting portions of one key to provide satisfying illuminating effect.
    Type: Application
    Filed: August 18, 2008
    Publication date: February 18, 2010
    Inventor: Hung Lin
  • Publication number: 20080036067
    Abstract: The present invention provides a package structure with lead-frame on stacked chips, comprising: a lead-frame, composed of a plurality of outer leads arranged in rows facing each other and a plurality of inner leads arranged in rows facing each other formed by a plurality of wires, wherein the plurality of inner leads are divided into first inner leads and second inner leads, and the length of the first inner leads is greater than that of the second inner leads; and a plurality of semiconductor chip devices. The active surface of each chip faces upward and chips are misaligned to form offset stacked structure, wherein the semiconductor chip device stacked uppermost is fixedly connected under said first inner leads, and the plurality of semiconductor chip devices are electrically connected to the first inner leads and the second inner leads on the same side edge.
    Type: Application
    Filed: August 6, 2007
    Publication date: February 14, 2008
    Inventor: Hung Lin
  • Publication number: 20070177064
    Abstract: A supporting structure comprises a base, a moveable unit and a first fine-tuning unit. The base comprises a body, a shaft, a first pivoting portion and a first groove, wherein the first pivoting portion and the first groove are disposed on the body. The moveable unit comprises a second pivoting portion and a positioning element, wherein the shaft passes the first and second pivoting portions to connect the moveable unit and the base, and the positioning element passes the first groove to position the moveable unit on the base. The first fine-tuning unit connects the base and the moveable unit, wherein the first fine-tuning unit rotates the moveable unit relative to the base.
    Type: Application
    Filed: July 10, 2006
    Publication date: August 2, 2007
    Applicant: WISTRON NEWEB CORP.
    Inventors: Hung Lin, San Kuo
  • Publication number: 20070075826
    Abstract: The present invention discloses methods for manufacturing chip resistor networks, which are free from the short circuit owing to electron migration of the silver electrodes. In one embodiment of the present invention, a barrier layer is formed to prevent the silver electrodes from electron migration. In another embodiment of the present invention, copper or nickel electrodes are formed to replace silver electrodes. These methods for manufacturing chip resistor networks are the ways to solve the short circuit caused by electron migration of the silver electrodes.
    Type: Application
    Filed: June 16, 2006
    Publication date: April 5, 2007
    Inventors: Chun-Tiao Liu, Minhor-Hsiao, Hung Lin, Peng Wen-Lung, Liu Hau
  • Publication number: 20070070617
    Abstract: A hand toll equipped with an illuminator has a conductive assembly settled within the handle to provide power to a lamp assembly which can lighten the operating end of the hand tool. A user can push a switch back and fort to operate the conductive assembly and in turn switch on/off the illuminator.
    Type: Application
    Filed: May 31, 2006
    Publication date: March 29, 2007
    Inventor: Hung Lin
  • Publication number: 20060236522
    Abstract: A method for manufacturing a tool handle includes preparing a handle member having one or more projections, attaching a panel onto the projection of the handle member, attaching a covering onto the panel and the projection, the covering includes a peripheral flange. An outer sleeve is then molded onto the handle member, and is engaged with the peripheral flange of the covering, to retain the covering and the panel to the handle member. A peripheral groove may be formed on the handle member and around the projection, to receive the peripheral flange of the covering. A concave chamber may be formed in the covering, to receive the panel and the projection of the handle member.
    Type: Application
    Filed: December 22, 2004
    Publication date: October 26, 2006
    Inventor: Hung Lin
  • Publication number: 20060040047
    Abstract: Disclosed is a method of manufacturing an optical film, in which a transparent cycloolefin copolymer (COC) material is used as a raw material thereof and solved in a solvent to constitute a solution for forming the optical film. The thus formed optical film may have optical characteristics similar to those of prior-art optical film. Therefore, a retardation film or a protective film may be manufactured using cheaper and more accessible raw materials.
    Type: Application
    Filed: November 19, 2004
    Publication date: February 23, 2006
    Inventors: Kuang Lee, Hung Lin, Chien Wang, Bor Wang
  • Publication number: 20050231621
    Abstract: The present invention describes an integrated image detecting apparatus with low noise, which transforms optical current to voltage and comprises an optical detecting element, an integrated circuit, a correlated double sampling circuit, and an output circuit. The present invention is a CMOS process and is designed for different CMOS image application systems, which keeps the advantages of low power consumption and better integration. Shifts of circuit characteristics caused by process variation are furthermore eliminated.
    Type: Application
    Filed: April 20, 2004
    Publication date: October 20, 2005
    Inventors: Wen Su, Chun Hsu, Hung Lin, Kai Hsiao