Abstract: A vapor chamber includes a shell body, a wick structure, a single-piece support structure and a working fluid. The shell body includes a first shell and a second shell. A chamber is formed between the first shell and the second shell. The wick structure is disposed in the chamber and attached on the shell body. The single-piece support structure is disposed in the chamber and between the first shell and the second shell, and includes support bodies and ribs. Each support body includes a hollow rod and an annular seat. Any adjacent two of the annular seats are connected by one of the ribs. The support body are arranged at an interval. The ribs are arranged along the support bodies to form hollow portions between each support body and each rib. The working fluid is disposed in the chamber.

Abstract: A circuitry includes a multi-mode switching multiplexer, a control circuit and a receiver. The multi-mode switching multiplexer is arranged to receive multiple mode settings, and select one of the multiple mode settings as an output mode setting. The control circuit is arranged to generate a mode switching signal to control the multi-mode switching multiplexer. The receiver is arranged to set its internal components according to the output mode setting.

Abstract: Buffing of a footwear component allows for an alteration of the component surface to achieve an intended surface for aesthetics and/or manufacturing purposes. The buffing is performed in a system having a vision module, a sidewall buffing module, an up surface buffing module, and a down surface buffing module. Each of the buffing modules are adapted for the unique shape and sizes of a footwear component to effectively and automatically buff the footwear component.

Abstract: Bipolar junction transistor (BJT) structures are provided. A BJT structure includes a semiconductor substrate, a collector region formed in the semiconductor substrate, a plurality of base regions formed over the collector region, a plurality of emitter regions formed over the collector region, a ring-shaped shallow trench isolation (STI) region formed in the collector region, a plurality of base conductive layers formed over the collector region and on opposite sides of the base regions, a plurality of sidewall dielectric layers formed on top surfaces of the base conductive layers and disposed vertically between the base conductive layers and upper portions of the emitter regions, and a plurality of base contacts formed on the base conductive layers. The base contacts are divided into a first group of base contacts disposed between the base regions and a second group of base contacts disposed between the base regions and the STI region.

Abstract: An electronic device is provided and includes a first conductive structure, a second conductive structure, a third conductive structure, a first insulating layer, a second insulating layer, a conductive element, an electronic component, and a plurality of passive components. The first insulating layer is disposed between the first conductive structure and the second conductive structure, and the second insulating layer is disposed between the second conductive structure and the third conductive structure. The second conductive structure is electrically connected to the first conductive structure at a first position, and the third conductive structure is electrically connected to the second conductive structure at a second position, wherein a center point of the first position and a center point of the second position is misaligned along a normal direction of a surface of the first insulating layer.

Abstract: A semiconductor package includes a photonic integrated circuit (PIC) die having a photonic layer, and an electronic integrated circuit (EIC) die bonded to the PIC die. The EIC die includes an optical region that allows the transmission of optical signals through the optical region towards the photonic layer, and a peripheral region outside of the optical region. The optical region includes optical concave/convex structures, a protection film and optically transparent material layers. The optical concave/convex structures are formed in the semiconductor structure. The protection film is conformally disposed over the optical concave/convex structures. The optically transparent material layers are disposed over the protection film and filling up the optical region. The peripheral region includes first bonding pads bonded to the photonic integrated circuit die, and via structures connected to the first bonding pads, wherein the protection film is laterally surrounding sidewalls of the via structures.

Abstract: A foldable electronic device includes a first body having an end and a first inclined surface, a second body having a second inclined surface, and a hinge module. The end includes an accommodating area. A virtual shaft line exists between sides of the first inclined surface and the second inclined surface that are closest to each other. The second body rotates relative to the first body through the virtual shaft line. The hinge module includes a first bracket adjacent to the first inclined surface, connected to the first body, and located in the accommodating area, a second bracket adjacent to the second inclined surface and connected to the second body, and a third bracket including a first end and a second end. The first bracket is connected to the first end through a first torsion assembly. The second bracket is connected to the second end through a second torsion assembly.

Abstract: A method for cell swapping is provided. A location for swapping a first cell is determined. One or more legal positions for cell placement are determined at the location. A plurality of cells is determined for of the plurality of legal positions. A second cell from the plurality of cells is determined based on timing information associated with each of the plurality. The first cell is swapped with the second cell.

Abstract: A semiconductor device includes an integrated circuit structure and a thermal pillar over the integrated circuit structure. The integrated circuit structure includes a semiconductor substrate including circuitry, a dielectric layer over the semiconductor substrate, an interconnect structure over the dielectric layer, and a first thermal fin extending through the semiconductor substrate, the dielectric layer, and the interconnect structure. The first thermal fin is electrically isolated from the circuitry. The thermal pillar is thermally coupled to the first thermal fin.

Abstract: An infrared sensor uses an infrared lens with infrared filtering and focusing functions. Thus, an infrared filter can be omitted to reduce the costs and volume. In addition, a getter on the inside of a metal cover of the infrared sensor can be activated when the metal cover is soldered to the substrate of the infrared sensor. Therefore, the packaging process of the infrared sensor can be simplified.

Abstract: A controller for controlling a blocking switch of a power converter is provided. The controller includes a control pin and a sensing circuit. The control pin is coupled to a control terminal of the blocking switch and an output terminal of the blocking switch. The sensing circuit includes a control switch, a variable resistance circuit, and a judgment circuit. A first terminal of the control switch is coupled to the control pin. The variable resistance circuit is coupled between a second terminal of the control switch and a reference low voltage. The judgment circuit controls the variable resistance circuit to provide a detection resistance value with a minimum value, and turns on the control switch to obtain a sensing voltage value. When the detection resistance value has a maximum value and the sensing voltage value is lower than a reference voltage value, the judgment circuit provides a notification signal.

Abstract: A method performed by a User Equipment (UE) for a Layer1/Layer2 Triggered Mobility (LTM) operation is provided. The method receives, from a source cell, an LTM cell switch command Medium Access Control (MAC) Control Element (CE) including a Timing Advance Command (TAC) field. The method switches from the source cell to a target cell in response to receiving the LTM cell switch command MAC CE. In a case that the TAC field is set to an invalid value, the method performs a Random Access (RA) procedure with the target cell upon switching to the target cell, where a type of the RA procedure depends on whether the LTM cell switch command MAC CE further includes a Contention-Free Random Access (CFRA)-related field. In a case that the TAC field is set to a valid value, the method skips the RA procedure with the target cell upon switching to the target cell.

Abstract: A method performed by a User Equipment (UE) for Layer 1/Layer 2 Triggered Mobility (LTM) is provided. The method receives, from a source cell, a Cell Switch Command (CSC) Medium Access Control (MAC) Control Element (CE), the CSC MAC CE indicating a target cell, Timing Advance (TA) information, and a Transmission Configuration Indicator (TCI) state. The method determines whether the TA information is valid. In a case that the TA information is valid, the method determines a pathloss based on a pathloss reference signal associated with the TCI state. In a case that the TA information is not valid, the method determines whether the CSC MAC CE includes Contention-Free Random Access (CFRA) information, and then determines the pathloss based on a Synchronized Signal Block (SSB) indicated in the CFRA information in a case that the CSC MAC CE includes the CFRA information.

Abstract: A controller for controlling a blocking switch of a power converter is provided. The controller includes a control pin and a sensing circuit. The control pin is coupled to a control terminal of the blocking switch and an output terminal of the blocking switch. The sensing circuit includes a control switch and a judgment circuit. A first terminal of the control switch is coupled to the control pin. A second terminal of the control switch is coupled to a reference low voltage. The judgment circuit turns on the control switch during a period when the blocking switch is turned off to obtain a sensing current value of a current flowing through the control switch. When the sensing current value is lower than a reference current value, the judgment circuit provides a notification signal for allowing the blocking switch to be turned on.

Abstract: A filter mesh frame is provided. The filter mesh frame includes a first mesh and a second mesh. The first mesh surrounds to form a cylinder with respect to a first pivot direction. The second mesh surrounds the first mesh with respect to a first pivot direction and includes a plurality of bar structures, where the bar structures protrude outward with respect to the first mesh and are disposed parallel to the first pivot direction. A groove parallel to the first pivot direction is formed on one side of each bar structure with respect to the first mesh.

Abstract: A heat exchange device and a cooling system are provided. The heat exchange device includes a low-pressure chamber and a high-pressure chamber disposed in the low-pressure chamber. The low-pressure chamber has a first wall for enabling heat exchange and an output portion in communication with the outside to output the low-pressure fluid. The high-pressure chamber has an input portion in communication with the outside to admit the high-pressure fluid and nozzles in communication with the low-pressure chamber. The fluid discharged from the nozzles undergoes a pressure drop and undergoes heat exchange through the first wall. Cooling capability is developed in the heat exchange device and works in the heat exchange device to thereby dispense with a pipeline which must be otherwise provided to link an expansion process and an evaporation process of the fluid and may otherwise cause cooling capability loss, so as to greatly enhance heat exchange capability and cooling efficiency.

Abstract: A method for configuring a subsequent conditional primary secondary cell addition/change (S-CPAC) to a UE is provided. The method receives from a source cell an S-CPAC configuration that includes an RRC configuration for a primary secondary cell (PSCell) and a set of conditions for switching to the PSCell. The method receives a secondary key (SK)-counter list associated with the S-CPAC. The list includes one or more SK-counter entries arranged in an order. The method stores the S-CPAC configuration and the SK-counter list. After determining that one or more of the set of conditions are satisfied, the method selects a first SK-counter entry of the SK-counter list and configures the UE with the S-CPAC configuration to switch from another PSCell to the PSCell. In configuring the UE with the S-CPAC configuration, the first SK-counter entry is applied. The method then removes the first SK-counter entry from the SK-counter list.

Abstract: A semiconductor chiplet device includes a first die, a second die, a decoupling circuit and an interposer. The interposer includes a plurality of power traces and a plurality of ground traces. The first die and the second die are arranged on a first side of the interposer according to a configuration direction, and are coupled to the power traces and the ground traces. The decoupling circuit is arranged on a second side of the interposer, and is coupled to the power traces and the ground traces. The power traces and the ground traces are staggered with each other, and an extending direction of the ground traces and the power traces is the same as the configuration direction.

Abstract: A user equipment (UE) and a method for beam indication in a multi-transmission and reception point (MTRP) are provided. The method includes: receiving, from a base station (BS), first downlink control information (DCI) including a first transmission configuration indication (TCI) field indicating a first TCI state, the first DCI being associated with a first value; receiving, from the BS, second DCI including a second TCI field indicating a second TCI state, the second DCI being associated with a second value; performing, based on the first TCI state, a first uplink (UL) transmission; and performing, based on the second TCI state, a second UL transmission. The first UL transmission is scheduled by third DCI associated with the first value, and the second UL transmission is scheduled by fourth DCI associated with the second value.