Abstract: A three-level power factor rectifier includes a diode bridge arm, a bridge arm assembly, an input inductor, a capacitor bank, and a controller. The first bridge arm includes a first switch, a second switch, a third switch, and a fourth switch connected in series and in sequence. When the controller determines that a loading is less than a load threshold, the controller controls the three-level power factor rectifier entering a burst mode. In the burst sleep period, when a voltage value of an AC power source is greater than a first threshold, the first switch and the second switch are turned off; when the voltage value is less than a second threshold, the third switch and the fourth switch are turned on. When entering the burst period from the burst sleep period, the controller turns on the second switch and the third switch for a specific time period.

Abstract: The present invention provides a probe card. The probe card comprises a circuit board, a cantilever-type space transformer electrically connected to the circuit board, and a vertical probe head electrically connected to the cantilever-type space transformer. The vertical probe head comprises a probe base and a plurality of vertical probes. The cantilever-type space transformer comprises a mounting base and a plurality of cantilever converting probes, wherein each cantilever converting probe has a fixed segment and an exposed segment. The fixed segment is secured to the mounting base, and the exposed segment is located outside the mounting base. The fixing segment enters from the side of the mounting base and forms a contact at the bottom of the mounting base.

Abstract: A modular circuit board, a non-contact switch system, and a switch detection method are provided. The non-contact switch system includes multiple modular circuit boards. The modular circuit board includes: a non-contact switch set configured to receive a sensing signal of a sensed target; and a processing unit configured to perform a general program. The processing unit includes a detection unit, and the detection unit includes a first common lead. The general program includes a single-board detection process and a multi-board detection process. The single-board detection process includes: determining whether only one non-contact switch receives the sensing signal, and entering the multi-board detection process if a determining result is yes; or providing, by the detection unit, a marked potential if the determining result is no. The multi-board detection process includes: determining whether a first interconnected potential of the first common lead is the marked potential.

Abstract: A method for detecting an analyte comprises the following steps: providing a SERS-active substrate and a Raman spectra database; applying a sample onto the SERS-active substrate; applying an incident light by a Raman spectrometer onto the SERS-active substrate to generate a Raman spectrum of the sample; and comparing the Raman spectrum of the sample with a Raman spectra database to identify an analyte in the sample. The SERS-active substrate comprises: a support; a first dielectric layer disposed on the support, wherein the first dielectric layer is formed by a plurality of first nanofibers; and a plurality of noble metal particles formed on the plurality of first nanofibers.

Abstract: A power supply circuit for stably supplying power to loads of a vehicle comprises a battery pack, a switch circuit, a first control circuit, a detection circuit, and a second control circuit. The first control circuit is configured to output a first control signal to turn on the switch circuit and the battery pack can supply power to the loads when the vehicle is in a first state. The detection circuit is configured to detect whether the first control circuit normally outputs the first control signal during the first state and output a trigger signal to the second control circuit in response to the first control circuit does not output the first control signal. The second control circuit outputs a second control signal according to the trigger signal to control the switch circuit to be turned on. A power supply method and the vehicle are also disclosed.

Abstract: A resin composition is provided, which comprises: 100 parts by weight of resin A including vinyl group-containing polyphenylene ether resin or maleimide resin; 5 parts by weight to 15 parts by weight of a compound having a structure represented by Formula (1); and 2 parts by weight to 15 parts by weight of a compound B including a compound having a structure represented by Formula (2), a compound having a structure represented by Formula (3) or a compound having a structure represented by Formula (4). Also, a product made from the aforesaid resin composition is provided, including a resin-coated copper, a laminate or a printed circuit board.

Abstract: The present application discloses a semiconductor device. The semiconductor device includes a memory stacking pair. The memory stacking pair includes a first memory semiconductor structure and a second memory semiconductor structure. The first memory semiconductor structure has a first front side and a first back side opposite to the first front side. The second memory semiconductor structure has a second front side and a second back side opposite to the second front side. The first memory semiconductor structure is bonded to the second memory semiconductor structure, and the first front side of the first memory semiconductor structure is proximal to the second front side of the second memory semiconductor structure, and the first back side is distal to the second back side.

Abstract: A biomimetic turtle includes a trunk, a head movably connected with a front end of the trunk in the front-rear direction, two front limbs disposed on a front section of the trunk and each rotatable relative to the trunk to sway in an up-down direction, and a driving module to drive the head and the front limbs. Each front limb has a curve-shaped rigid portion with a recess, and a deformable flipper portion engaged in the recess and extending rearwardly. With the deformable flipper portion deformed and bent during swaying of the front limbs, a forward propelling force is generated to propel the biomimetic turtle forwardly. The head is operably movable to vary the center of gravity of 10 the biomimetic turtle 100 in the water, and thus the front portion of the biomimetic turtle is inclined upwardly or downwardly to facilitate ascending or descending of the biomimetic turtle.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of nanostructures formed over a substrate, and a gate structure formed on the nanostructures. The semiconductor structure includes a source/drain (S/D) structure formed adjacent to the gate structure, and a fin spacer layer adjacent to the S/D structure. The bottom surface of the fin spacer layer is lower than a bottom surface of the S/D structure.

Abstract: A treatment method for waste water is provided. The method includes providing the waste water. The waste water includes monoethanolamine, and COD of the wastewater is in a range between 5000 mg/L and 30000 mg/L. The method further includes adjusting pH value of the wastewater to be not smaller than 11.5; transferring the wastewater to a tank, and controlling a temperature of the tank to 20° C. to 32° C.; and adding hydrogen peroxide solution and ozone into the tank, thereby obtaining degraded waste water. By controlling treatment condition of the waste water, the waste water with the monoethanolamine and high COD can be degraded by using the hydrogen peroxide solution and the ozone.

Abstract: This disclosure is directed to an electrical connector having an insulative seat, a first terminal group and a second terminal group. The first terminal group has first terminals embedded in the insulative seat, the first terminals are separated from each other, and each first terminal has a first wiring end. The second terminal group is separated from the first terminal group, the second terminal group has second terminals and a connecting strip, the second terminals are embedded in the insulative seat, each second terminal has a second wiring end. The first and the second terminals are arranged on a reference plane, the first and the second terminals protrude from one side of the insulative seat, and the second terminals are bent to deviate from the reference plane, and the connecting strip is connected with the second terminals to make the second terminals be electrically connected with each other.

Abstract: A calibration method for emulating a Group III-V semiconductor device, a method for determining trap location within a Group III-V semiconductor device and method for manufacturing a Group III-V semiconductor device are provided. Actual tape-out is performed according to an actual process flow of the Group III-V semiconductor device for manufacturing the Group III-V semiconductor devices and PCM Group III-V semiconductor device. Actual electrical performances of the Group III-V semiconductor devices and the PCM Group III-V semiconductor device are obtained and the actual electrical performances of the Group III-V semiconductor devices and the PCM Group III-V semiconductor device are compared to determine locations where one or more traps appear.

Abstract: The present disclosure provides a charging management system including a memory device and a processor. The memory device is configured to store a plurality of preset algorithms and a plurality of custom algorithms. The processor determines at least one of the preset algorithms and at least one of the custom algorithms according to a distribution strategy associated with a charging hub, to allocate an available power to a plurality of charging points of the charging hub. The processor allocates a partial amount of the available power to the charging points according to the first subset of the preset algorithms, and distributes a remaining amount of the available power to the charging points according to the first subset of the custom algorithms, in which the remaining amount of the available power is derived by subtracting the partial amount of the available power from the available power.

Abstract: A package structure includes a carrier substrate and a die. The carrier substrate includes through carrier vias (TCV). The die is disposed over the carrier substrate. The die includes a semiconductor substrate and conductive posts disposed over the semiconductor substrate. The semiconductor substrate is located between the conductive posts and the carrier substrate.

Abstract: A redundant system and a redundancy method of a fronthaul network are provided. The redundant system includes a first fronthaul multiplexer. The first fronthaul multiplexer includes a first group port, a second group port, a first cascade port, a first protect port, a first active port, and a first uplink circuit. The first uplink circuit includes a first summation circuit and a second summation circuit. A plurality of input terminals of the first summation circuit are coupled to the first group port and the second group port respectively, and an output terminal of the first summation circuit is coupled to the first protect port. A plurality of input terminals of the second summation circuit are coupled to the first cascade port and the output terminal of the first summation circuit respectively, and an output terminal of the second summation circuit is coupled to the first active port.

Abstract: Disclosed herein is a proximity effect correction method based on shape adjustment for fabricating an imaging structure. The imaging structure comprises a bottom layer arranged on a substrate, and a top layer arranged on the upper surface of the bottom layer. The position of a surrounding frame of the top layer is closed to an edge of the bottom layer, which has a width value and a space value between the top and bottom layers. Additionally, the method combines with the use of increased particle beam sizes to improve the throughput, imaging fidelity and contrast of a particle beam lithography system. The method is applicable to any particle beam lithography machine or system, and does not require any internal hardware and software modifications to the machine or system.

Abstract: A memory device includes a memory die, a non-volatile memory circuit, and a logic die. The memory die includes a first memory space and a second memory space. The non-volatile memory circuit stores a repair table file corresponding to the first memory space. The logic die is coupled to the memory die and the non-volatile memory. The logic die selectively accesses the first memory space or the second memory space of the memory die according a comparing result of an input address and the repair table file. The memory die and is different from the logic die.

Abstract: An electrical connector and a cable grounding structure thereof are disclosed. A grounding structure is bridged between a connection body of the electrical connector and each cable, and includes a bridging portion, at least one clamping portion, at least one docking portion, and an elastic portion. The clamping portion is disposed on the bridging portion for clamping a covering layer of each cable, and the docking portion is extended from the bridging portion toward the connection body and electrically connected to connection body, and the elastic portion is attached and pressed against the covering layer of each cable, so as to provide good grounding contact and prevent the issue of skewing the cables and other factors that affects the soldering yield.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC comprises a substrate. A resistor overlies the substrate. The resistor comprises a first metal nitride structure, a second metal nitride structure spaced from the first metal nitride structure, and a metal structure disposed between the first metal nitride structure and the second metal nitride structure. A first dielectric structure is disposed over the substrate and the resistor.

Abstract: An electronic device is provided. The electronic device includes a substrate, a first optical film and a second optical film. The first optical film is disposed on the substrate, and the first optical film includes an engaging portion. The second optical film is disposed on the substrate and having an upper surface and a lower surface opposite to each other, and the second optical film is in mutual interference with the engaging portion of the first optical film. The engaging portion includes a first portion, a second portion and an engaging structure, and the first portion and second portion are disposed on opposite sides of the engaging structure, and one of the first portion and the second portion is disposed on the upper surface of the second optical film and the other one is disposed below the lower surface of the second optical film.