Patents by Inventor Hung Liu

Hung Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240079451
    Abstract: A semiconductor device includes a substrate, first and second stacks of semiconductor nanosheets, a gate structure, first and second strained layers and first and second dielectric walls. The substrate includes first and second fins. The first and second stacks of semiconductor nanosheets are disposed on the first and second fins respectively. The gate structure wraps the first and second stacks of semiconductor nanosheets. The first and second strained layers are respectively disposed on the first and second fins and abutting the first and second stacks of semiconductor nanosheets. The first dielectric wall is disposed on the substrate and located between the first and second strained layers. The second dielectric wall is disposed on the first dielectric wall and located between the first and second strained layers. A top surface of the second dielectric wall is lower than top surfaces of the first and second strained layers.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ta-Chun Lin, Tzu-Hung Liu, Chun-Jun LIN, Chih-Hao Chang, Jhon Jhy Liaw
  • Publication number: 20240077697
    Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion used for connecting an optical element, a fixed portion, and a driving assembly used for driving the movable portion to move relative to the fixed portion. The movable portion is movable relative to the fixed portion.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 7, 2024
    Inventors: Po-Xiang ZHUANG, Chen-Hung CHAO, Wei-Jhe SHEN, Shou-Jen LIU, Kun-Shih LIN, Yi-Ho CHEN
  • Publication number: 20240077914
    Abstract: A foldable electronic device includes a first body having an end and a first inclined surface, a second body having a second inclined surface, and a hinge module. The end includes an accommodating area. A virtual shaft line exists between sides of the first inclined surface and the second inclined surface that are closest to each other. The second body rotates relative to the first body through the virtual shaft line. The hinge module includes a first bracket adjacent to the first inclined surface, connected to the first body, and located in the accommodating area, a second bracket adjacent to the second inclined surface and connected to the second body, and a third bracket including a first end and a second end. The first bracket is connected to the first end through a first torsion assembly. The second bracket is connected to the second end through a second torsion assembly.
    Type: Application
    Filed: April 27, 2023
    Publication date: March 7, 2024
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Chih-Han Chang, Tsung-Ju Chiang, Chi-Hung Lin, Yen-Ting Liu
  • Publication number: 20240074826
    Abstract: A surgical robot including at least one contact module, a control connection module, at least one first robotic arm, and at least one grip control device. A first transmission member of the control connection module drives the control module through a first transmission connecting member. A first shaft member of the first robotic arm is connected with the first transmission member while the grip control device is connected with the first robotic arm by a transmission interface. A force sensing member of the first robotic arm detects a first reaction force from the contact module so that the first robotic arm sends a feedback control signal to the grip control device to control a grip driving member to generate a force feedback for allowing a grip portion to move. Thereby, users can feel movement of the grip portion caused by the force feedback to avoid accidental iatrogenic injuries.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 7, 2024
    Inventors: PO-YUN LIU, CHUN-HUNG KUO, CHIH-CHENG CHIEN, YEN-CHIEH WANG
  • Publication number: 20240077745
    Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion used for connecting an optical element, a fixed portion, and a driving assembly used for driving the movable portion to move relative to the fixed portion. The movable portion is movable relative to the fixed portion.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 7, 2024
    Inventors: Po-Xiang ZHUANG, Chen-Hung CHAO, Yen-Sheng LIU, Shou-Jen LIU, Yi-Ho CHEN, Yung-Hsien YEH
  • Publication number: 20240077744
    Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion used for connecting an optical element, a fixed portion, and a driving assembly used for driving the movable portion to move relative to the fixed portion. The movable portion is movable relative to the fixed portion.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 7, 2024
    Inventors: Po-Xiang ZHUANG, Chen-Hung CHAO, Wei-Jhe SHEN, Shou-Jen LIU, Kun-Shih LIN, Yi-Ho CHEN
  • Patent number: 11923886
    Abstract: An antenna device and a method for configuring the same are provided. The antenna device includes a grounding metal, a grounding part, a radiating part, a feeding part, a proximity sensor, and a sensing metal. The radiating part is electrically connected to the grounding metal through the grounding part. The feeding part is coupled to the grounding metal through a feeding point. The sensing metal is electrically connected to the proximity sensor. The sensing metal is separated from the radiating part at a distance. The distance is less than or equal to one thousandth of a wavelength corresponding to an operating frequency of the antenna device.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: March 5, 2024
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Jhih-Ciang Chen, Shih-Chia Liu, Yen-Hao Yu, Li-Chun Lee, Yan-Ming Lin, Jui-Hung Lai
  • Patent number: 11923403
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC comprises a substrate. A resistor overlies the substrate. The resistor comprises a first metal nitride structure, a second metal nitride structure spaced from the first metal nitride structure, and a metal structure disposed between the first metal nitride structure and the second metal nitride structure. A first dielectric structure is disposed over the substrate and the resistor.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Szu-Hsien Lo, Che-Hung Liu, Tzu-Chung Tsai
  • Patent number: 11916025
    Abstract: A device die including a first semiconductor die, a second semiconductor die, an anti-arcing layer and a first insulating encapsulant is provided. The second semiconductor die is stacked over and electrically connected to the first semiconductor die. The anti-arcing layer is in contact with the second semiconductor die. The first insulating encapsulant is disposed over the first semiconductor die and laterally encapsulates the second semiconductor die. Furthermore, methods for fabricating device dies are provided.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Wei Chen, Tzuan-Horng Liu, Chia-Hung Liu, Hao-Yi Tsai
  • Patent number: 11899367
    Abstract: An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Shih-Ming Chang, Wen Lo, Chun-Hung Liu, Chia-Hua Chang, Hsin-Wei Wu, Ta-Wei Ou, Chien-Chih Chen, Chien-Cheng Chen
  • Publication number: 20240047508
    Abstract: A semiconductor structure includes an inductive metal line located in a dielectric material layer that overlies a semiconductor substrate and laterally encloses a first area; and an array of first ferromagnetic plates including a first ferromagnetic material and overlying or underlying the inductive metal line. For any first point that is selected within volumes of the first ferromagnetic plates, a respective second point exists within a horizontal surface of the inductive metal line such that a line connecting the first point and the second point is vertical or has a respective first taper angle that is less than 20 degrees with respective to a vertical direction. The magnetic field passing through the first ferromagnetic plates is applied generally along a hard direction of magnetization and the hysteresis effect is minimized.
    Type: Application
    Filed: August 8, 2022
    Publication date: February 8, 2024
    Inventors: Yu-Sheng Chen, Hsien Jung Chen, Kuen-Yi Chen, Chien Hung Liu, Yi Ching Ong, Yu-Jen Wang, Kuo-Ching Huang, Harry-Hak-Lay Chuang
  • Patent number: 11894425
    Abstract: A method of forming a semiconductor arrangement includes forming a gate dielectric layer over a semiconductor layer. A gate electrode layer is formed over the gate dielectric layer. A first gate mask is formed over the gate electrode layer. The gate electrode layer is etched using the first gate mask as an etch template to form a first gate electrode. A first dopant is implanted into the semiconductor layer using the first gate mask and the first gate electrode as an implantation template to form a first doped region in the semiconductor layer.
    Type: Grant
    Filed: February 6, 2023
    Date of Patent: February 6, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yun-Chi Wu, Tsung-Yu Yang, Cheng-Bo Shu, Chien Hung Liu
  • Patent number: 11873665
    Abstract: The disclosure discloses a bike lock used to lock the bike to prevent bike theft. A first shaft and a second shaft of the bike lock are connected to the handlebar and the front wheel of the bike, respectively. When the bike lock is in a locking mode, the first shaft is not linked to move with the second shaft, preventing the user from controlling the front wheel by the handle effectively. When the bike lock is in an unlocking mode, the first shaft is linked to move with the second shaft. The first shaft can be linked to move with the second shaft by two different linkage mechanisms. One is to link the first shaft with the second shaft with a pin; the other is to firmly engage an engaging structure of one of the shafts to another.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: January 16, 2024
    Assignee: TEAM YOUNG TECHNOLOGY CO., LTD.
    Inventor: Chih-Hung Liu
  • Publication number: 20240014604
    Abstract: This disclosure is directed to an electrical connector having an insulative seat, a first terminal group and a second terminal group. The first terminal group has first terminals embedded in the insulative seat, the first terminals are separated from each other, and each first terminal has a first wiring end. The second terminal group is separated from the first terminal group, the second terminal group has second terminals and a connecting strip, the second terminals are embedded in the insulative seat, each second terminal has a second wiring end. The first and the second terminals are arranged on a reference plane, the first and the second terminals protrude from one side of the insulative seat, and the second terminals are bent to deviate from the reference plane, and the connecting strip is connected with the second terminals to make the second terminals be electrically connected with each other.
    Type: Application
    Filed: September 6, 2022
    Publication date: January 11, 2024
    Inventors: Ching-Hung LIU, Ming-Yang YUAN
  • Publication number: 20240004237
    Abstract: An electronic device includes: a back plate; an optical film disposed on the back plate; and a support module disposed between the back plate and the optical film, wherein the support module comprises a base and a support unit between the base and the optical film, the base comprises a curved surface away from the back plate, the support unit is connected to an upper surface of the base, and the upper surface comprises the curved surface; wherein a hollow space is enclosed by the base.
    Type: Application
    Filed: September 12, 2023
    Publication date: January 4, 2024
    Inventors: Ming-Tien WANG, Chin-Tu TSAI, Chih-Hung HSU, Chih-Hung LIU, Hsiang-Yu JUAN
  • Patent number: 11860477
    Abstract: An electronic device includes: a back plate; an optical film disposed on the back plate; and a support module disposed between the back plate and the optical film, wherein the support module includes a base, and the base includes a hollow space and a curved surface away from the back plate.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: January 2, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Ming-Tien Wang, Chin-Tu Tsai, Chih-Hung Hsu, Chih-Hung Liu, Hsiang-Yu Juan
  • Patent number: 11855232
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Patent number: 11854625
    Abstract: A device is disclosed herein. The device includes at least two transmit portions and at least one contact portion. Each of the at least two transmit portions is configured to receive a bit line signal. The at least one contact portion is couple to the at least two transmit portions respectively and configured to transmit the bit line signals from the least two transmit portions to a source line.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Pin Chang, Chien-Hung Liu, Chih-Wei Hung
  • Publication number: 20230411872
    Abstract: An electrical connector and a cable grounding structure thereof are disclosed. A grounding structure is bridged between a connection body of the electrical connector and each cable, and includes a bridging portion, at least one clamping portion, at least one docking portion, and an elastic portion. The clamping portion is disposed on the bridging portion for clamping a covering layer of each cable, and the docking portion is extended from the bridging portion toward the connection body and electrically connected to connection body, and the elastic portion is attached and pressed against the covering layer of each cable, so as to provide good grounding contact and prevent the issue of skewing the cables and other factors that affects the soldering yield.
    Type: Application
    Filed: September 6, 2022
    Publication date: December 21, 2023
    Inventors: Ching-Hung LIU, Ming-Yang YUAN
  • Publication number: 20230408414
    Abstract: A method for detecting an analyte comprises the following steps: providing a SERS-active substrate and a Raman spectra database; applying a sample onto the SERS-active substrate; applying an incident light by a Raman spectrometer onto the SERS-active substrate to generate a Raman spectrum of the sample; and comparing the Raman spectrum of the sample with a Raman spectra database to identify an analyte in the sample. The SERS-active substrate comprises: a support; a first dielectric layer disposed on the support, wherein the first dielectric layer is formed by a plurality of first nanofibers; and a plurality of noble metal particles formed on the plurality of first nanofibers.
    Type: Application
    Filed: June 8, 2023
    Publication date: December 21, 2023
    Inventors: Jiunn-Der LIAO, Han LEE, Kuan-Hung LIU